Add debug counter for ivar inline cache misses that could hit

This commit adds a debug counter for the case where the inline cache
*missed* but the ivar index table has an entry for that ivar.  This is a
case where a polymorphic cache could help
This commit is contained in:
Aaron Patterson 2020-11-09 11:59:18 -08:00 коммит произвёл Aaron Patterson
Родитель f259906eab
Коммит 4219cb7adb
2 изменённых файлов: 2 добавлений и 0 удалений

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@ -123,6 +123,7 @@ RB_DEBUG_COUNTER(ivar_set_ic_hit)
RB_DEBUG_COUNTER(ivar_set_ic_miss)
RB_DEBUG_COUNTER(ivar_set_ic_miss_serial)
RB_DEBUG_COUNTER(ivar_set_ic_miss_unset)
RB_DEBUG_COUNTER(ivar_set_ic_miss_iv_hit)
RB_DEBUG_COUNTER(ivar_set_ic_miss_noobject)
RB_DEBUG_COUNTER(ivar_get_base)
RB_DEBUG_COUNTER(ivar_set_base)

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@ -1246,6 +1246,7 @@ vm_setivar(VALUE obj, ID id, VALUE val, const rb_iseq_t *iseq, IVC ic, const str
ptr = ROBJECT_IVPTR(obj);
}
RB_OBJ_WRITE(obj, &ptr[index], val);
RB_DEBUG_COUNTER_INC(ivar_set_ic_miss_iv_hit);
return val;
}