Fix backend transform bug, add test

This commit is contained in:
Maxime Chevalier-Boisvert 2022-06-21 17:01:26 -04:00 коммит произвёл Takashi Kokubun
Родитель 4c0a440b18
Коммит f1b188143b
Не найден ключ, соответствующий данной подписи
Идентификатор ключа GPG: 6FFC433B12EE23DD
2 изменённых файлов: 22 добавлений и 9 удалений

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@ -324,7 +324,7 @@ impl Assembler
Opnd::InsnOut{ idx, .. } => {
self.live_ranges[*idx] = insn_idx;
}
Opnd::Mem( Mem { base: MemBase::InsnOut(idx), .. }) => {
Opnd::Mem(Mem { base: MemBase::InsnOut(idx), .. }) => {
self.live_ranges[*idx] = insn_idx;
}
_ => {}
@ -424,17 +424,21 @@ impl Assembler
label_names: self.label_names,
};
// indices maps from the old instruction index to the new instruction
// Indices maps from the old instruction index to the new instruction
// index.
let mut indices: Vec<usize> = Vec::default();
// Map an operand to the next set of instructions by correcting previous
// InsnOut indices.
fn map_opnd(opnd: Opnd, indices: &mut Vec<usize>) -> Opnd {
if let Opnd::InsnOut{ idx, num_bits } = opnd {
Opnd::InsnOut{ idx: indices[idx], num_bits }
} else {
opnd
match opnd {
Opnd::InsnOut{ idx, num_bits } => {
Opnd::InsnOut{ idx: indices[idx], num_bits }
}
Opnd::Mem(Mem{ base: MemBase::InsnOut(idx), disp, num_bits, }) => {
Opnd::Mem(Mem{ base:MemBase::InsnOut(indices[idx]), disp, num_bits })
}
_ => opnd
}
}
@ -531,6 +535,8 @@ impl Assembler
/// instruction. This is our implementation of the linear scan algorithm.
pub(super) fn alloc_regs(mut self, regs: Vec<Reg>) -> Assembler
{
//dbg!(&self);
// First, create the pool of registers.
let mut pool: u32 = 0;
@ -585,7 +591,7 @@ impl Assembler
if let Opnd::Reg(reg) = asm.insns[start_index].out {
dealloc_reg(&mut pool, &regs, &reg);
} else {
unreachable!("no register allocated for insn");
unreachable!("no register allocated for insn {:?}", op);
}
}
}

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@ -173,12 +173,19 @@ fn test_base_insn_out()
{
let (mut asm, mut cb) = setup_asm();
// Forced register to be reused
// This also causes the insn sequence to change length
asm.mov(
Opnd::mem(64, SP, 8),
Opnd::mem(64, SP, 0)
);
// Load the pointer into a register
let ptr_reg = asm.load(Opnd::const_ptr(0 as *const u8));
let ptr_reg = asm.load(Opnd::const_ptr(4351776248 as *const u8));
let counter_opnd = Opnd::mem(64, ptr_reg, 0);
// Increment and store the updated value
asm.incr_counter(counter_opnd, 1.into() );
asm.incr_counter(counter_opnd, 1.into());
asm.compile_with_num_regs(&mut cb, 1);
}