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12 Коммитов

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Paul E. Murphy 1bb480fc25 ppc64/ppc64asm: add ISA 3.1B support
The new ISA fixes a couple typos, and adds special hashing
instructions to support ROP exploitation.

The hash instructions encode a negative offset in a novel
way which requires a bit of special handling.

Change-Id: I9491e10ac87efe37d93b6efaf7f108ae3a4402fd
Reviewed-on: https://go-review.googlesource.com/c/arch/+/418859
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
Reviewed-by: Joedian Reid <joedian@golang.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Run-TryBot: Paul Murphy <murp@ibm.com>
Reviewed-by: Bryan Mills <bcmills@google.com>
2022-11-16 20:18:07 +00:00
Paul E. Murphy 44deed0493 ppc64/ppc64map: add encoder functionality
Use the ISA information to generate bits for supporting ISA 3.1
(POWER10) instructions. This creates a new file asm9_gtables.go
to allow assembly of instructions defined in pp64.csv.

This uses the input pp64.csv file to generate an encoding function
for each "type" of instruction. Some encoder functions can be
shared (e.x fpr/gpr/vsr opcodes which share similar encoding). These
are named based on the oldest instruction which uses the function,
like "type_xxspltiw".

All functions share two tables which store the fixed bits of an
instruction. Non-prefixed instructions use GenOpcodes exclusively,
prefixed opcodes use the GenPfxOpcodes table to hold the suffix
instruction word bits. These are used to populate the instruction
specific encoding bits for a particular type.

Likewise, the function opsetGen is created to map opcodes which share
identical argument types. This plugs into the buildop function in
asm9.go.

Change-Id: I50cddfcec86b667774af858fb8efe8910dfe80b8
Reviewed-on: https://go-review.googlesource.com/c/arch/+/350609
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Run-TryBot: Paul Murphy <murp@ibm.com>
Reviewed-by: Michael Knyszek <mknyszek@google.com>
Reviewed-by: Heschi Kreinick <heschi@google.com>
2022-09-15 21:17:55 +00:00
Paul E. Murphy ada1728ceb ppc64/ppc64asm,ppc64map: fix BHRBE argument translation
BHRBE stands for "branch history rolling buffer entry". This is not
an SPR. Treat it as an unsigned immediate type argument.

Similarly, DCRN, SR, TMR, PMRN fields are no longer present in ISA 3.1,
they can be removed and nearby code simplified.

Fix ppc64map and update tables.go.

Change-Id: Ie779d24ae9d24541db6565ea169be0d80b893ff8
Reviewed-on: https://go-review.googlesource.com/c/arch/+/418858
Reviewed-by: Ian Lance Taylor <iant@google.com>
Reviewed-by: Cherry Mui <cherryyz@google.com>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
Run-TryBot: Paul Murphy <murp@ibm.com>
2022-08-23 14:41:27 +00:00
Dan Kortschak fc48f9fe4c ppc64,x86: fix code generation notice
Change-Id: I6de117af0ae5f9ccb0dbecad53bebf6241a13e38
Reviewed-on: https://go-review.googlesource.com/c/arch/+/399274
Reviewed-by: Ian Lance Taylor <iant@golang.org>
Run-TryBot: Ian Lance Taylor <iant@golang.org>
TryBot-Result: Gopher Robot <gobot@golang.org>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Reviewed-by: Ian Lance Taylor <iant@google.com>
Auto-Submit: Ian Lance Taylor <iant@google.com>
2022-04-12 00:13:46 +00:00
Paul E. Murphy 4d4a2a2eb4 ppc64asm,ppc64map: enable prefixed insn decoding support
ISA 3.1 introduces prefixed instructions. These are 64b
instructions which look like 2 consecutive instructions.
These allow 34 bit constant displancements and PC-relative
addressing. When decoded into an Inst structure, we place
the prefix inside the Enc field. The prefix opcode is unique,
and thus cannot be confused with any existing ISA 3.1
instruction. The second instruction word (the "suffix") is
placed into a new field named SuffixEnc.

Rework the decoder table to use 64 bit instruction sizes, and
shift the regular instructions into the upper 32 bits.

Likewise, extend bitfield parsing to support 2 words and
aggregate values beyond 32 bits (prefixed add and load
generate 34 bit constants/displacements).

Likewise, support nop extended mnemonic. These show
up when fixing prefixed instructions to avoid crossing
a 64B boundary. This happens in the generated decoding
test cases.

Likewise, handle pcrel and prefixed load address extended
mnemonics to match objdump.

Finally, fix some broken documentation propagated from
the parser generation. YMSK should only be the upper two
bits of the field described as 4 bits. These fixups have
been backported to the ISA parser tool.

Change-Id: I21e311f93014cf176f3f6b155849a7359af54763
Reviewed-on: https://go-review.googlesource.com/c/arch/+/307353
Run-TryBot: Paul Murphy <murp@ibm.com>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: Carlos Eduardo Seo <carlos.seo@linaro.org>
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
Trust: Carlos Eduardo Seo <carlos.seo@linaro.org>
2021-04-27 11:49:10 +00:00
Paul E. Murphy 8ee3ab241e ppc64asm,ppc64map: enable parsing of prefixed ISA 3.1 insn entries
ppc64map is modified to store a second set of Mask/Value/DontCare
fields in its internal Inst structure.  The existing fields are
used to store the prefix, and the newly added fields store similar
information about the second instruction word. It is worth noting
that prefixed instructions are 64 bits long, but are encoded like
a pair of regular (32 bit) instructions.

This requires some refactoring of ppc64map to support decoding fields
from the second instruction word.  To do this, we add a Word field
as needed to indicate the instruction word (0 == prefix, 1 == suffix),
and field names are updated to reflect bit positions as if such insn
extended to 64 bits.

All prefixed instructions share the same primary opcode, so the
decode logic will need to be updated in a subsequent patch to choose
the correct prefixed instruction when decoding.

Note, that while enabling prefix support, a few ISA bugs were found
and reported. YMSK should be 2 bits, not 4. Likewise, the nop
extended mnemonic is added as it shows up more frequently when
prefixed instructions need to be moved to avoid crossing a 64B
boundary.

Change-Id: I8fd43bbd05738e8d70267efed447022c36c4616f
Reviewed-on: https://go-review.googlesource.com/c/arch/+/307352
Run-TryBot: Carlos Eduardo Seo <carlos.seo@linaro.org>
TryBot-Result: Go Bot <gobot@golang.org>
Trust: Emmanuel Odeke <emmanuel@orijtech.com>
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
2021-04-22 03:13:29 +00:00
Paul E. Murphy d48d9c4a19 ppc64asm,ppc64map: update for ISA 3.1
Likewise, add all missing ISA 3.0 instructions.

This table is generated in a two-step process.

1. Parse ISA 3.1 Appendix F.
2. Scan ISA for descriptions
3. Sort to match old ISA (and check for bugs)
   and append new insn to bottom

A second patch will reformat these instructions into
a sorting order of the ISA 3.1 appendix F, that is
by version then alphabetically. This intermediate
patch ensures we don't regress, and helped catch
quite a few ISA 3.1 typos.

The tooling is left in another repo, and is loosely
based on the spec.go tooling for ppc64.

Notably, transaction memory instructions are effectively
removed in ISA 3.1, and some shuffling of descriptions
has result in cmp*/li/lis becoming extended mnemonics
instead, thus they go away. VLE/SPE/embedded instructions
are also removed. They were never used, and have been
removed since ISA 3.0.

Similarly, the new ISA introduces prefixed instructions
using opcode 1. They are encoded like two instruction
words. However, it should be noted prefixes cannot be
applied to any instruction, only those specifically
enumerated in the documentation. Likewise, what would
be the primary opcode of the suffixed instruction is
not always identical to it's non-prefixed counterpart.

A number of small changes have been made to the parser
to accomodate new instructions and minor changes to
existing ones.

Note, DCBI was a book iii-e instruction in ISA 2.07, and
only emulated on P8, and the opcode is reserved in newer
ISAs.

Note, isel BI decoding is slightly different than gnu.
It is much more readable to decode like other condition
register BI fields. Similarly, paste. and mtfsf* like
instruction decoding is improved to match the newer ISA.

Note, book ii extended mnemonics are mostly ignored.
These are inconsistently described in the documentation,
and most should never appear in golang compiled code.
We do handle the exceptional cases for some, such as the
hwsync/lwsync and the l*arx instructions.

Change-Id: I41711807a5fbdbdd22a2bde4159a09dad5382691
Reviewed-on: https://go-review.googlesource.com/c/arch/+/298793
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
Reviewed-by: Carlos Eduardo Seo <carlos.seo@linaro.org>
Trust: Carlos Eduardo Seo <carlos.seo@linaro.org>
2021-03-24 14:21:54 +00:00
Paul E. Murphy a3652b17be ppc64asm,ppc64map: improve gnu branch decoding, and other misc
Rewrite the branch decoding to be more consistent with objdump.
Comments are taken from ISA 3.1 sections on the BO field (book i, 2.4),
and Appendix C.2 for extended branch mnemonics.  Also, generate all
interesting cases to verify.  Interesting cases are those which
don't choke objdump (e.g not setting z bits in BO, or setting at to
0b01).

Likewise, fixup handling of mtfs* instructions.  The field names are
similar to condition registers, but these operate on FPSCR bits and
fields.  Decode them as immediates, similar to objdump.

Likewise, when printing CR bits, use gnu/ISA syntax of 4*crN+B when
N > 0, and B is a named CR bit.

Likewise, when running testcode, track the "PC".  This keeps the
generated tests working without hacks.  This requires fixing up
some offsets in the handwritten tests.  Similarly, allow testing
of multiple files in the test directory which are prefixed with
"decode".

Likewise, allow appropriately prefixed to run these tests too.  This
allows running tests on non-native systems (e.g with IBM's advance
toolchain on an x86 host).

Change-Id: I1d6b2fc78a22a182524fdec596f05a10d25363c5
Reviewed-on: https://go-review.googlesource.com/c/arch/+/293270
Trust: Carlos Eduardo Seo <carlos.seo@linaro.org>
Run-TryBot: Carlos Eduardo Seo <carlos.seo@linaro.org>
TryBot-Result: Go Bot <gobot@golang.org>
Reviewed-by: Lynn Boger <laboger@linux.vnet.ibm.com>
2021-02-22 21:50:09 +00:00
Lynn Boger 5a4828bb70 ppc64: fixes for ppc64 objdump
The current output for the Go objdump on ppc64 is not correct
in many cases, generating opcodes that are not acceptable by the
Go assembler, and generating operands in the wrong order.

This adds some changes to generate an objdump for ppc64 code so that
the instructions generated are acceptable by the Go assembler,
and where some of the non-obvious operands have more meaningful names.

This includes the following changes:
- Correct some errors in ppc64map to make it work.
- Make a minor update to ppc64.csv to add the Go opcodes that have been
added to the Go assembler that were not in the table.
- Fix ppc64map to generate correct Go opcodes for ppc64 opcodes that end with '.'
indicating condition codes are set. The previous ppc64map was adding '_' at the end
for this case, but then had to be translated in plan9.go to 'CC' and many were not
being translated. This generates the correct suffix in the first step when
generating tables.go.
- Handle compare instructions correctly, since the names don't quite match
and the CR was not always handled correctly.
- Handle index loads and stores correctly, including VMX and VSX.
- Add mappings for all the names where the Go opcode does not match the ppc64 opcode.
- Handle all CR values, not just CR0 for those instructions that use them.
- Provide more information on BC instructions and generate the correct
branch mnemonic (BEQ, BNE, etc.) where possible.
- Make the output more consistent in spacing.
- Add some more testcases to testdata/decode.txt.
- If the instruction word is all 0s, the Go assembler will output WORD $0,
otherwise unrecognized instructions will be identified with '?'. For GNU,
all 0s will decode to .long 0x0 like the binutils objdump. This can happen
following a call to a panic or throw as a trap, or at the end of a function
for alignment purposes.

Note: the decoder does not handle extended opcodes correctly yet. I will add
that support in the next release and add the corresponding testcases.

We are working on an updated ppc64.csv, but I believe what is
there now covers the opcodes that are supported by the Go assembler.

Change-Id: If7fe1a2205512b476f4fb6b29a21f5459430e50c
Reviewed-on: https://go-review.googlesource.com/c/148574
Run-TryBot: Lynn Boger <laboger@linux.vnet.ibm.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Cherry Zhang <cherryyz@google.com>
2018-12-03 22:54:21 +00:00
Cherry Zhang dda8112e05 all: fix/silence vet errors
Change-Id: I04d12297538c6308bc7d7b14c9d50ff7f87eba0a
Reviewed-on: https://go-review.googlesource.com/79579
Run-TryBot: Cherry Zhang <cherryyz@google.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: Ian Lance Taylor <iant@golang.org>
2017-11-23 03:17:08 +00:00
Lynn Boger fcea5eadff ppc64/ppc64asm,ppc64/ppc64map: fixes for ppc64 disassembly
This adds some fixes to the ppc64 disassembly:
- Add support for VSX registers, by updating the map
function to recognize them, regenerating tables.go
to include them with VSX instructions, and adding the
defines needed to display them correctly.
- Change the path to the system objdump in the testcase
for use in comparing the decoded machine instructions.
- Add mappings for missing opcodes in plan9.go.
- Disable the testcase that generates words with random
bit settings for use in decoding. This will be replaced
later by an assembler testcase that decodes and compares
the result with the system objdump.

Fixes golang/go#17447

Change-Id: I23bf276ea7fcf0b54abb3dccca8b41c221c81c94
Reviewed-on: https://go-review.googlesource.com/31146
Run-TryBot: Lynn Boger <laboger@linux.vnet.ibm.com>
TryBot-Result: Gobot Gobot <gobot@golang.org>
Reviewed-by: David Chase <drchase@google.com>
2016-10-24 16:09:17 +00:00
Russ Cox 21375ab36a ppc64: add, from github.com/minux/power64
This is a direct copy of github.com/minux/power64,
which in turn was forked from rsc.io/power64,
which was using Mercurial and is gone.
The code in those places was reviewed via code review
and is by Minux and me under the usual Go CLA.

I've done a global search and replace of power64 to ppc64
and checked that everything still builds. Any further fixes
will be in followup CLs.

(The arch subrepo did not exist when this code was written.)

Change-Id: I80ea16ca689c9fc51a7501c3492099f19aa30873
Reviewed-on: https://go-review.googlesource.com/30932
Run-TryBot: Russ Cox <rsc@golang.org>
Reviewed-by: Brad Fitzpatrick <bradfitz@golang.org>
2016-10-12 18:28:02 +00:00