Added NEON support where SSE is supported (#1150)
* Added NEON support where SSE is supported * Adding Tests * Fixed x86 flag * Co-authored-by: Wes Barcalow <wesbarc@microsoft.com>
This commit is contained in:
Tomoaki Teshima
GitHub
Родитель
e287f73b03
Коммит
b033d2e552
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@ -8,11 +8,14 @@
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#include <limits.h>
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#include <math.h>
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#if defined(__amd64__) || defined(_M_AMD64) || defined(__i386__) || defined(_M_X86)
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#if defined(__amd64__) || defined(_M_AMD64) || defined(__i386__) || defined(_M_IX86)
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#define K4A_USING_SSE
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#include <emmintrin.h> // SSE2
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#include <tmmintrin.h> // SSE3
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#include <smmintrin.h> // SSE4.1
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#elif defined(__aarch64__) || defined(_M_ARM64)
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#define K4A_USING_NEON
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#include <arm_neon.h>
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#endif
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typedef struct _k4a_transformation_input_image_t
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@ -57,6 +60,28 @@ typedef struct _k4a_bounding_box_t
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int bottom_right[2];
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} k4a_bounding_box_t;
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// g_transformation_instruction_type is set to SSE, NEON, None, or NULL
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static char g_transformation_instruction_type[5] = { 0 };
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// Share g_transformation_instruction_type with tests to confirm this is built correctly.
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char *transformation_get_instruction_type(void);
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char *transformation_get_instruction_type(void)
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{
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return g_transformation_instruction_type;
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}
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// Set the special instruction
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static void set_special_instruction_optimization(char *opt)
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{
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// Only set this once
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if (g_transformation_instruction_type[0] == '\0')
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{
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size_t sz = MIN(sizeof(opt), sizeof(g_transformation_instruction_type) - 1);
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memcpy(g_transformation_instruction_type, opt, sz);
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LOG_INFO("Compiled special instruction type is: %s\n", opt);
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}
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}
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static k4a_transformation_image_descriptor_t
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transformation_init_image_descriptor(int width, int height, int stride, k4a_image_format_t format)
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{
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@ -1058,7 +1083,7 @@ k4a_buffer_result_t transformation_color_image_to_depth_camera_internal(
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return K4A_BUFFER_RESULT_SUCCEEDED;
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}
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#if !defined(K4A_USING_SSE)
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#if !defined(K4A_USING_SSE) && !defined(K4A_USING_NEON)
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// This is the same function as transformation_depth_to_xyz without the SSE
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// instructions. This code is kept here for readability.
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static void transformation_depth_to_xyz(k4a_transformation_xy_tables_t *xy_tables,
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@ -1069,6 +1094,8 @@ static void transformation_depth_to_xyz(k4a_transformation_xy_tables_t *xy_table
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int16_t *xyz_data_int16 = (int16_t *)xyz_image_data;
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int16_t x, y, z;
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set_special_instruction_optimization("None");
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for (int i = 0; i < xy_tables->width * xy_tables->height; i++)
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{
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float x_tab = xy_tables->x_table[i];
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@ -1092,7 +1119,68 @@ static void transformation_depth_to_xyz(k4a_transformation_xy_tables_t *xy_table
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}
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}
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#else
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#elif defined(K4A_USING_NEON)
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// convert from float to int using NEON is round to zero
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// make separate function to do floor
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static inline int32x4_t neon_floor(float32x4_t v)
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{
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int32x4_t v0 = vcvtq_s32_f32(v);
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int32x4_t a0 = vreinterpretq_s32_u32(vcgtq_f32(vcvtq_f32_s32(v0), v));
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return vaddq_s32(v0, a0);
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}
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static void transformation_depth_to_xyz(k4a_transformation_xy_tables_t *xy_tables,
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const void *depth_image_data,
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void *xyz_image_data)
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{
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float *x_tab = (float *)xy_tables->x_table;
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float *y_tab = (float *)xy_tables->y_table;
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const uint16_t *depth_image_data_uint16 = (const uint16_t *)depth_image_data;
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int16_t *xyz_data_int16 = (int16_t *)xyz_image_data;
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float32x4_t half = vdupq_n_f32(0.5f);
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set_special_instruction_optimization("NEON");
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for (int i = 0; i < xy_tables->width * xy_tables->height / 8; i++)
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{
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// 8 elements in 1 loop
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int offset = i * 8;
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float32x4_t x_tab_lo = vld1q_f32(x_tab + offset);
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float32x4_t x_tab_hi = vld1q_f32(x_tab + offset + 4);
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// equivalent to isnan
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uint32x4_t valid_lo = vceqq_f32(x_tab_lo, x_tab_lo);
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uint32x4_t valid_hi = vceqq_f32(x_tab_hi, x_tab_hi);
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// each element in valid is a mask which corresponds to isnan
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uint16x8_t valid = vcombine_u16(vmovn_u32(valid_lo), vmovn_u32(valid_hi));
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uint16x8_t v_0 = vandq_u16(vld1q_u16(depth_image_data_uint16 + offset), valid);
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// v_z corresponds to z in naive code
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int16x8_t v_z = vreinterpretq_s16_u16(v_0);
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// expand v_z to compute x and y
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float32x4_t v_z_lo = vcvtq_f32_u32(vmovl_u16(vget_low_u16(v_0)));
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float32x4_t v_z_hi = vcvtq_f32_u32(vmovl_u16(vget_high_u16(v_0)));
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// load x_table and y_table
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float32x4_t t_x_lo = vld1q_f32(x_tab + offset);
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float32x4_t t_x_hi = vld1q_f32(x_tab + offset + 4);
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float32x4_t t_y_lo = vld1q_f32(y_tab + offset);
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float32x4_t t_y_hi = vld1q_f32(y_tab + offset + 4);
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// main computation of x and y
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int32x4_t v_x_lo = neon_floor(vmlaq_f32(half, v_z_lo, t_x_lo));
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int32x4_t v_x_hi = neon_floor(vmlaq_f32(half, v_z_hi, t_x_hi));
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int32x4_t v_y_lo = neon_floor(vmlaq_f32(half, v_z_lo, t_y_lo));
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int32x4_t v_y_hi = neon_floor(vmlaq_f32(half, v_z_hi, t_y_hi));
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int16x8_t v_x = vcombine_s16(vmovn_s32(v_x_lo), vmovn_s32(v_x_hi));
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int16x8_t v_y = vcombine_s16(vmovn_s32(v_y_lo), vmovn_s32(v_y_hi));
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// use scatter store instruction
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int16x8x3_t store;
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store.val[0] = v_x; // x0 x1 .. x14 x15
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store.val[1] = v_y; // y0 y1 .. y14 y15
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store.val[2] = v_z; // z0 z1 .. z14 z15
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// x0 y0 z0 x1 y1 z1 .. x15 y15 z15
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vst3q_s16(xyz_data_int16 + offset * 3, store);
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}
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}
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#else /* defined(K4A_USING_SSE) */
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static void transformation_depth_to_xyz(k4a_transformation_xy_tables_t *xy_tables,
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const void *depth_image_data,
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@ -1110,6 +1198,8 @@ static void transformation_depth_to_xyz(k4a_transformation_xy_tables_t *xy_table
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__m128 *y_table_m128 = (__m128 *)y_table;
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__m128i *xyz_data_m128i = (__m128i *)xyz_image_data;
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set_special_instruction_optimization("SSE");
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const int16_t pos0 = 0x0100;
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const int16_t pos1 = 0x0302;
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const int16_t pos2 = 0x0504;
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@ -84,6 +84,9 @@ protected:
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ASSERT_EQ_FLT(A[2], B[2]) \
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}
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// Export function from transformation.c to snoop on the compiler setting used.
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extern "C" char *transformation_get_instruction_type();
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static k4a_transformation_image_descriptor_t image_get_descriptor(const k4a_image_t image)
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{
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k4a_transformation_image_descriptor_t descriptor;
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@ -405,6 +408,27 @@ TEST_F(transformation_ut, transformation_depth_image_to_point_cloud)
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ASSERT_EQ(check_sum, reference_val);
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}
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{
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// Are we compiled for the correct instruction type
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#if defined(__amd64__) || defined(_M_AMD64) || defined(__i386__) || defined(_M_IX86)
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#define SPECIAL_INSTRUCTION_OPTIMIZATION "SSE\0"
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#elif defined(__aarch64__) || defined(_M_ARM64)
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#define SPECIAL_INSTRUCTION_OPTIMIZATION "NEON"
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#else
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// Omit defining this when not SSE or NEON. Should result in a build break. We are either SSE or Neon.
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//#define SPECIAL_INSTRUCTION_OPTIMIZATION "None"
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#endif
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char *compile_type = transformation_get_instruction_type();
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ASSERT_NE(compile_type, (char *)nullptr);
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ASSERT_NE(compile_type[0], '\0');
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std::cout << "*** K4A Sensor SDK Compile type is: " << compile_type << " ***\n";
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ASSERT_TRUE(memcmp(compile_type, SPECIAL_INSTRUCTION_OPTIMIZATION, strlen(compile_type)) == 0)
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<< "Expecting " << SPECIAL_INSTRUCTION_OPTIMIZATION << " but compiled for " << compile_type << "\n";
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ASSERT_TRUE(memcmp(compile_type, SPECIAL_INSTRUCTION_OPTIMIZATION, strlen(compile_type)) == 0)
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<< "Expecting " << SPECIAL_INSTRUCTION_OPTIMIZATION << " but compiled for " << compile_type << "\n";
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ASSERT_EQ(strlen(compile_type), strlen(SPECIAL_INSTRUCTION_OPTIMIZATION));
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}
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image_dec_ref(depth_image);
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image_dec_ref(xyz_image);
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transformation_destroy(transformation_handle);
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@ -523,13 +523,13 @@ TEST_F(multidevice_sync_ft, multi_sync_validation)
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if (g_frame_rate != K4A_FRAMES_PER_SECOND_5 && g_frame_rate != K4A_FRAMES_PER_SECOND_15 &&
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g_frame_rate != K4A_FRAMES_PER_SECOND_30)
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{
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#if defined(__amd64__) || defined(_M_AMD64) || defined(__i386__) || defined(_M_X86)
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printf("Using 5, 15, or 30FPS for AMD64/x86 build\n");
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int frame_rate_rand = (int)RAND_VALUE(0, 2);
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#else
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#if defined(__aarch64__) || defined(_M_ARM64)
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// Jetson Nano can't handle 2 30FPS streams
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printf("Using 5 or 15FPS for ARM64 build\n");
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int frame_rate_rand = (int)RAND_VALUE(0, 1);
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#else
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printf("Using 5, 15, or 30FPS for AMD64/x86 build\n");
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int frame_rate_rand = (int)RAND_VALUE(0, 2);
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#endif
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switch (frame_rate_rand)
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{
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