Integrate chazhang/asym2 into master
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bed4cc9aa7
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@ -195,6 +195,22 @@ private:
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shape = TensorShape(dims);
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}
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protected:
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// infer reduction dimensions if m_convolution2D is true, for legacy NDL branch
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void InferConvolution2DReductionDims(const TensorShape& inputShape, size_t numChannels)
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{
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size_t kW = m_kernelShape[0];
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size_t kH = m_kernelShape[1];
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size_t sW = m_stride[0];
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size_t sH = m_stride[1];
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m_kernelShape = TensorShape(kW, kH, numChannels);
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m_stride = TensorShape(sW, sH, numChannels);
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size_t filterRank = 2;
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FixVectorShape(filterRank, inputShape.size(), m_autoPad, false);
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FixTensorShape(filterRank, inputShape.size(), m_lowerPad, 0);
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FixTensorShape(filterRank, inputShape.size(), m_upperPad, 0);
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FixVectorShape(filterRank, inputShape.size(), m_sharing, true);
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}
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// infer reduction dimensions if not given
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void InferReductionDims(const TensorShape& inputShape, const TensorShape& fromShape)
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{
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@ -270,6 +286,7 @@ protected: \
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using Base::m_tempMatrixForward; \
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using Base::m_tempMatrixBackward; \
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using Base::m_convEng; \
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using Base::InferConvolution2DReductionDims; \
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using Base::InferReductionDims; \
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public:
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@ -439,13 +456,10 @@ public:
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auto inDims = ImageDimensions(GetInputSampleLayout(inputIdx), m_imageLayout);
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// inputShape is used in ConvolveGeometry which supports only CHW layout.
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inputShape = inDims.AsTensorShape(ImageLayoutKind::CHW);
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InferConvolution2DReductionDims(inputShape, inDims.m_numChannels);
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size_t kW = m_kernelShape[0];
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size_t kH = m_kernelShape[1];
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size_t sW = m_stride[0];
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size_t sH = m_stride[1];
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m_kernelShape = TensorShape(kW, kH, inDims.m_numChannels);
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m_stride = TensorShape(sW, sH, inDims.m_numChannels);
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size_t mapCount = m_mapCount.GetNumElements();
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size_t weightCols = kW * kH * inDims.m_numChannels;
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@ -664,15 +664,17 @@ bool CuDnnConvolutionEngineFactory<ElemType>::IsSupported(DEVICEID_TYPE deviceId
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(poolKind == PoolKind::None ||
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inputRank <= 3 && (kernelRank < 3 || kernel[2] == 1)));
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// cuDNN as of version 6.0 does not handle asymmetric padding for convolution correctly. We need to detect asymmetric
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// cuDNN as of version 6.0 does not handle asymmetric padding for even size kernel convolution correctly. We need to detect asymmetric
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// padding due to auto-padding and choose the reference convolution implementation instead
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if (poolKind == PoolKind::None) // only for convolution, pooling seems fine
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{
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for (int i = 0; i < kernelRank; i++)
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{
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if (geometry->GetLowerPad(i) < geometry->GetUpperPad(i))
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auto lowerPad = geometry->GetLowerPad(i);
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auto upperPad = geometry->GetUpperPad(i);
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if (kernel[i] % 2 == 0 && lowerPad < upperPad)
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{
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fprintf(stderr, "Detected asymmetric padding issue (lowerPad < higherPad), cuDNN will not be able to produce correct result. Switch to reference engine (VERY SLOW). \n");
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fprintf(stderr, "WARNING: Detected asymmetric padding issue with even kernel size and lowerPad (%d) < higherPad (%d) (i=%d), cuDNN will not be able to produce correct result. Switch to reference engine (VERY SLOW). \n", lowerPad, upperPad, i);
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retVal = false;
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break;
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}
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