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Merge branch 'master' of https://git01.codeplex.com/cntk into bmitra/Changes

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bmitra 2016-01-04 10:23:01 -08:00
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Коммит fd47759b0a
91 изменённых файлов: 8453 добавлений и 2463 удалений
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12
Examples/Image/Miscellaneous/CIFAR-10/03_ProjWeightsGen.py Normal file
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@ -0,0 +1,12 @@
import sys
import numpy as np
def writeConvWeights(fname, cmapIn):
cmapOut = 2 * cmapIn
w = np.eye(cmapOut, cmapIn)
np.savetxt(fname, w, fmt = '%d', delimiter = ' ')
if __name__ == "__main__":
cmapIn = int(sys.argv[1])
fname = sys.argv[2]
writeConvWeights(fname, cmapIn)

5
Examples/Image/Miscellaneous/CIFAR-10/03_ResNet.config
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@ -17,6 +17,9 @@ command=Train:AddBNEval:Test
stderr=$OutputDir$/03_ResNet
traceLevel=1
Proj16to32Filename = $ConfigDir$/16to32.txt
Proj32to64Filename = $ConfigDir$/32to64.txt
Train=[
action=train
modelPath=$ModelDir$/03_ResNet
@ -39,7 +42,7 @@ Train=[
distributedMBReading=true
parallelizationStartEpoch=1
DataParallelSGD=[
gradientBits=32
gradientBits=1
]
]

22
Examples/Image/Miscellaneous/CIFAR-10/03_ResNet.ndl
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@ -32,20 +32,22 @@ DNN=[
cMap1 = 16
conv1 = ConvBNReLULayer2(featScaled, cMap1, 27, kW, kH, hStride1, vStride1, convWScale, convBValue, scValue)
rn1_1 = ResNetNode2(conv1, cMap1, 144, kW, kH, convWScale, convBValue, scValue)
rn1_2 = ResNetNode2(rn1_1, cMap1, 144, kW, kH, convWScale, convBValue, scValue)
rn1_3 = ResNetNode2(rn1_2, cMap1, 144, kW, kH, convWScale, convBValue, scValue)
rn1_1 = ResNetNode2(conv1, cMap1, 144, kW, kH, convWScale, convBValue, scValue)
rn1_2 = ResNetNode2(rn1_1, cMap1, 144, kW, kH, convWScale, convBValue, scValue)
rn1_3 = ResNetNode2(rn1_2, cMap1, 144, kW, kH, convWScale, convBValue, scValue)
cMap2 = 32
rn2_1 = ResNetNode2Reduce(rn1_3, cMap2, 144, 288, 16384, 8192, kW, kH, convWScale, convBValue, scValue)
rn2_2 = ResNetNode2(rn2_1, cMap2, 288, kW, kH, convWScale, convBValue, scValue)
rn2_3 = ResNetNode2(rn2_2, cMap2, 288, kW, kH, convWScale, convBValue, scValue)
rn2_1_Wproj = Parameter(cMap2, cMap1, init = fromFile, initFromFilePath = "$Proj16to32Filename$", needGradient = false)
rn2_1 = ResNetNode2Conv(rn1_3, cMap2, 144, 288, kW, kH, convWScale, convBValue, scValue, rn2_1_Wproj)
rn2_2 = ResNetNode2(rn2_1, cMap2, 288, kW, kH, convWScale, convBValue, scValue)
rn2_3 = ResNetNode2(rn2_2, cMap2, 288, kW, kH, convWScale, convBValue, scValue)
cMap3 = 64
rn3_1 = ResNetNode2Reduce(rn2_3, cMap3, 288, 576, 8192, 4096, kW, kH, convWScale, convBValue, scValue)
rn3_2 = ResNetNode2(rn3_1, cMap3, 576, kW, kH, convWScale, convBValue, scValue)
rn3_3 = ResNetNode2(rn3_2, cMap3, 576, kW, kH, convWScale, convBValue, scValue)
rn3_1_Wproj = Parameter(cMap3, cMap2, init = fromFile, initFromFilePath = "$Proj32to64Filename$", needGradient = false)
rn3_1 = ResNetNode2Conv(rn2_3, cMap3, 288, 576, kW, kH, convWScale, convBValue, scValue, rn3_1_Wproj)
rn3_2 = ResNetNode2(rn3_1, cMap3, 576, kW, kH, convWScale, convBValue, scValue)
rn3_3 = ResNetNode2(rn3_2, cMap3, 576, kW, kH, convWScale, convBValue, scValue)
# pool
poolW = 3
poolH = 3

32
Examples/Image/Miscellaneous/CIFAR-10/16to32.txt Normal file
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@ -0,0 +1,32 @@
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64
Examples/Image/Miscellaneous/CIFAR-10/32to64.txt Normal file
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@ -0,0 +1,64 @@
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18
Examples/Image/Miscellaneous/CIFAR-10/Macros.ndl
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@ -28,7 +28,7 @@ ConvBNReLULayer2(inp, outMap, inWCount, kW, kH, hStride, vStride, wScale, bValue
isd = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c = Convolution(W, inp, kW, kH, outMap, hStride, vStride, zeroPadding = true)
bn = BatchNormalization(c, sc, b, m, isd, eval = false, spatial = true)
bn = BatchNormalization(c, sc, b, m, isd, eval = false, spatial = true, expAvgFactor = 1.0)
y = RectifiedLinear(bn);
}
@ -41,7 +41,7 @@ ResNetNode2(inp, outMap, inWCount, kW, kH, wScale, bValue, scValue)
isd1 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c1 = Convolution(W1, inp, kW, kH, outMap, 1, 1, zeroPadding = true)
bn1 = BatchNormalization(c1, sc1, b1, m1, isd1, eval = false, spatial = true)
bn1 = BatchNormalization(c1, sc1, b1, m1, isd1, eval = false, spatial = true, expAvgFactor = 1.0)
y1 = RectifiedLinear(bn1);
W2 = Parameter(outMap, inWCount, init = Gaussian, initValueScale = wScale)
@ -51,12 +51,12 @@ ResNetNode2(inp, outMap, inWCount, kW, kH, wScale, bValue, scValue)
isd2 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c2 = Convolution(W2, y1, kW, kH, outMap, 1, 1, zeroPadding = true)
bn2 = BatchNormalization(c2, sc2, b2, m2, isd2, eval = false, spatial = true)
bn2 = BatchNormalization(c2, sc2, b2, m2, isd2, eval = false, spatial = true, expAvgFactor = 1.0)
p = Plus(bn2, inp)
y2 = RectifiedLinear(p);
}
ResNetNode2Reduce(inp, outMap, inWCount, wCount, inDim, outDim, kW, kH, wScale, bValue, scValue)
ResNetNode2Conv(inp, outMap, inWCount, wCount, kW, kH, wScale, bValue, scValue, Wproj)
{
W1 = Parameter(outMap, inWCount, init = Gaussian, initValueScale = wScale)
b1 = Parameter(outMap, 1, init = fixedValue, value = bValue)
@ -65,7 +65,7 @@ ResNetNode2Reduce(inp, outMap, inWCount, wCount, inDim, outDim, kW, kH, wScale,
isd1 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c1 = Convolution(W1, inp, kW, kH, outMap, 2, 2, zeroPadding = true)
bn1 = BatchNormalization(c1, sc1, b1, m1, isd1, eval = false, spatial = true)
bn1 = BatchNormalization(c1, sc1, b1, m1, isd1, eval = false, spatial = true, expAvgFactor = 1.0)
y1 = RectifiedLinear(bn1);
W2 = Parameter(outMap, wCount, init = Gaussian, initValueScale = wScale)
@ -75,10 +75,10 @@ ResNetNode2Reduce(inp, outMap, inWCount, wCount, inDim, outDim, kW, kH, wScale,
isd2 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c2 = Convolution(W2, y1, kW, kH, outMap, 1, 1, zeroPadding = true)
bn2 = BatchNormalization(c2, sc2, b2, m2, isd2, eval = false, spatial = true)
WP = Parameter(outDim, inDim)
t = Times(WP, inp, init = Gaussian, initValueScale = wScale)
p = Plus(bn2, t)
bn2 = BatchNormalization(c2, sc2, b2, m2, isd2, eval = false, spatial = true, expAvgFactor = 1.0)
cproj = Convolution(Wproj, inp, 1, 1, outMap, 2, 2, zeroPadding = false)
p = Plus(bn2, cproj)
y2 = RectifiedLinear(p);
}

2048
Examples/Image/Miscellaneous/ImageNet/ResNet/1024to2048.txt Normal file
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Разница между файлами не показана из-за своего большого размера Загрузить разницу

256
Examples/Image/Miscellaneous/ImageNet/ResNet/128to256.txt Normal file
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@ -0,0 +1,256 @@
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Просмотреть файл

Разница между файлами не показана из-за своего большого размера Загрузить разницу

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Просмотреть файл

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Examples/Image/Miscellaneous/ImageNet/ResNet/Macros.ndl Normal file
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ConvBNReLULayer(inp, outMap, inWCount, kW, kH, hStride, vStride, wScale, bValue, scValue)
{
W = Parameter(outMap, inWCount, init = Gaussian, initValueScale = wScale)
b = Parameter(outMap, 1, init = fixedValue, value = bValue)
sc = Parameter(outMap, 1, init = Gaussian, initValueScale = scValue)
m = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
isd = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c = Convolution(W, inp, kW, kH, outMap, hStride, vStride, zeroPadding = true)
bn = BatchNormalization(c, sc, b, m, isd, eval = false, spatial = true, expAvgFactor = 1.0)
y = RectifiedLinear(bn);
}
# Standard building block for ResNet.
ResNetNode2(inp, outMap, inWCount, kW, kH, wScale, bValue, scValue)
{
W1 = Parameter(outMap, inWCount, init = Gaussian, initValueScale = wScale)
b1 = Parameter(outMap, 1, init = fixedValue, value = bValue)
sc1 = Parameter(outMap, 1, init = Gaussian, initValueScale = scValue)
m1 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
isd1 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c1 = Convolution(W1, inp, kW, kH, outMap, 1, 1, zeroPadding = true)
bn1 = BatchNormalization(c1, sc1, b1, m1, isd1, eval = false, spatial = true, expAvgFactor = 1.0)
y1 = RectifiedLinear(bn1);
W2 = Parameter(outMap, inWCount, init = Gaussian, initValueScale = wScale)
b2 = Parameter(outMap, 1, init = fixedValue, value = bValue)
sc2 = Parameter(outMap, 1, init = Gaussian, initValueScale = scValue)
m2 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
isd2 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c2 = Convolution(W2, y1, kW, kH, outMap, 1, 1, zeroPadding = true)
bn2 = BatchNormalization(c2, sc2, b2, m2, isd2, eval = false, spatial = true, expAvgFactor = 1.0)
p = Plus(bn2, inp)
y2 = RectifiedLinear(p);
}
# Standard building block for ResNet with padding.
ResNetNode2Conv(inp, outMap, inWCount, wCount, kW, kH, wScale, bValue, scValue, Wproj)
{
W1 = Parameter(outMap, inWCount, init = Gaussian, initValueScale = wScale)
b1 = Parameter(outMap, 1, init = fixedValue, value = bValue)
sc1 = Parameter(outMap, 1, init = Gaussian, initValueScale = scValue)
m1 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
isd1 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c1 = Convolution(W1, inp, kW, kH, outMap, 2, 2, zeroPadding = true)
bn1 = BatchNormalization(c1, sc1, b1, m1, isd1, eval = false, spatial = true, expAvgFactor = 1.0)
y1 = RectifiedLinear(bn1);
W2 = Parameter(outMap, wCount, init = Gaussian, initValueScale = wScale)
b2 = Parameter(outMap, 1, init = fixedValue, value = bValue)
sc2 = Parameter(outMap, 1, init = Gaussian, initValueScale = scValue)
m2 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
isd2 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c2 = Convolution(W2, y1, kW, kH, outMap, 1, 1, zeroPadding = true)
bn2 = BatchNormalization(c2, sc2, b2, m2, isd2, eval = false, spatial = true, expAvgFactor = 1.0)
cproj = Convolution(Wproj, inp, 1, 1, outMap, 2, 2, zeroPadding = false)
p = Plus(bn2, cproj)
y2 = RectifiedLinear(p);
}
# Bottleneck building block for ResNet.
ResNetNode3(inp, inMap, convMap, outMap, convWCount, wScale, bValue, scValue)
{
# 1x1 reducing convolution.
W1 = Parameter(convMap, inMap, init = Gaussian, initValueScale = wScale)
b1 = Parameter(convMap, 1, init = fixedValue, value = bValue)
sc1 = Parameter(convMap, 1, init = Gaussian, initValueScale = scValue)
m1 = Parameter(convMap, 1, init = fixedValue, value = 0, needGradient = false)
isd1 = Parameter(convMap, 1, init = fixedValue, value = 0, needGradient = false)
c1 = Convolution(W1, inp, 1, 1, convMap, 1, 1, zeroPadding = false)
bn1 = BatchNormalization(c1, sc1, b1, m1, isd1, eval = false, spatial = true)
y1 = RectifiedLinear(bn1);
# 3x3 convolution.
W2 = Parameter(convMap, convWCount, init = Gaussian, initValueScale = wScale)
b2 = Parameter(convMap, 1, init = fixedValue, value = bValue)
sc2 = Parameter(convMap, 1, init = Gaussian, initValueScale = scValue)
m2 = Parameter(convMap, 1, init = fixedValue, value = 0, needGradient = false)
isd2 = Parameter(convMap, 1, init = fixedValue, value = 0, needGradient = false)
c2 = Convolution(W2, y1, 3, 3, convMap, 1, 1, zeroPadding = true)
bn2 = BatchNormalization(c2, sc2, b2, m2, isd2, eval = false, spatial = true, expAvgFactor = 1.0)
y2 = RectifiedLinear(bn2);
# 1x1 expanding convolution.
W3 = Parameter(outMap, convMap, init = Gaussian, initValueScale = wScale)
b3 = Parameter(outMap, 1, init = fixedValue, value = bValue)
sc3 = Parameter(outMap, 1, init = Gaussian, initValueScale = scValue)
m3 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
isd3 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c3 = Convolution(W3, y2, 1, 1, outMap, 1, 1, zeroPadding = false)
bn3 = BatchNormalization(c3, sc3, b3, m3, isd3, eval = false, spatial = true)
p = Plus(bn3, inp)
y3 = RectifiedLinear(p);
}
ResNetNode3Inc(inp, inMap, convMap, outMap, convWCount, wScale, bValue, scValue, wProj)
{
# 1x1 reducing convolution.
W1 = Parameter(convMap, inMap, init = Gaussian, initValueScale = wScale)
b1 = Parameter(convMap, 1, init = fixedValue, value = bValue)
sc1 = Parameter(convMap, 1, init = Gaussian, initValueScale = scValue)
m1 = Parameter(convMap, 1, init = fixedValue, value = 0, needGradient = false)
isd1 = Parameter(convMap, 1, init = fixedValue, value = 0, needGradient = false)
c1 = Convolution(W1, inp, 1, 1, convMap, 1, 1, zeroPadding = false)
bn1 = BatchNormalization(c1, sc1, b1, m1, isd1, eval = false, spatial = true)
y1 = RectifiedLinear(bn1);
# 3x3 convolution.
W2 = Parameter(convMap, convWCount, init = Gaussian, initValueScale = wScale)
b2 = Parameter(convMap, 1, init = fixedValue, value = bValue)
sc2 = Parameter(convMap, 1, init = Gaussian, initValueScale = scValue)
m2 = Parameter(convMap, 1, init = fixedValue, value = 0, needGradient = false)
isd2 = Parameter(convMap, 1, init = fixedValue, value = 0, needGradient = false)
c2 = Convolution(W2, y1, 3, 3, convMap, 2, 2, zeroPadding = true)
bn2 = BatchNormalization(c2, sc2, b2, m2, isd2, eval = false, spatial = true, expAvgFactor = 1.0)
y2 = RectifiedLinear(bn2);
# 1x1 expanding convolution.
W3 = Parameter(outMap, convMap, init = Gaussian, initValueScale = wScale)
b3 = Parameter(outMap, 1, init = fixedValue, value = bValue)
sc3 = Parameter(outMap, 1, init = Gaussian, initValueScale = scValue)
m3 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
isd3 = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c3 = Convolution(W3, y2, 1, 1, outMap, 1, 1, zeroPadding = false)
bn3 = BatchNormalization(c3, sc3, b3, m3, isd3, eval = false, spatial = true)
# Increasing input dimension convolution
cProj = Convolution(wProj, inp, 1, 1, outMap, 2, 2, zeroPadding = false)
p = Plus(bn3, cProj)
y3 = RectifiedLinear(p);
}
DnnLayer(hiddenDim, labelDim, x, wScale, bValue)
{
W = Parameter(labelDim, hiddenDim, init = Gaussian, initValueScale = wScale)
b = Parameter(labelDim, init = fixedValue, value = bValue)
t = Times(W, x)
z = Plus(t, b)
}

12
Examples/Image/Miscellaneous/ImageNet/ResNet/ProjWeightsGen.py Normal file
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@ -0,0 +1,12 @@
import sys
import numpy as np
def writeConvWeights(fname, cmapIn, cmapOut):
w = np.eye(cmapOut, cmapIn)
np.savetxt(fname, w, fmt = '%d', delimiter = ' ')
if __name__ == "__main__":
cmapIn = int(sys.argv[1])
cmapOut = int(sys.argv[2])
fname = sys.argv[3]
writeConvWeights(fname, cmapIn, cmapOut)

123
Examples/Image/Miscellaneous/ImageNet/ResNet/ResNet_152.config Normal file
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RootDir = "."
ConfigDir = "$RootDir$"
DataDir = "$RootDir$"
OutputDir = "$RootDir$/Output"
ModelDir = "$OutputDir$/Models"
ndlMacros=$ConfigDir$/Macros.ndl
precision=float
deviceId=Auto
command=Train:AddTop5Eval:Test
parallelTrain=false
stderr=$OutputDir$/ResNet_152
traceLevel=1
Proj64to256Filename = $ConfigDir$/64to256.txt
Proj256to512Filename = $ConfigDir$/256to512.txt
Proj512to1024Filename = $ConfigDir$/512to1024.txt
Proj1024to2048Filename = $ConfigDir$/1024to2048.txt
Train=[
action=train
modelPath=$ModelDir$/ResNet_152
NDLNetworkBuilder=[
networkDescription=$ConfigDir$/ResNet_152.ndl
]
SGD=[
epochSize=0
minibatchSize=2
learningRatesPerMB=0.1*20:0.03*10:0.01*30:0.003
momentumPerMB=0.9
maxEpochs=100
gradUpdateType=None
L2RegWeight=0.0001
dropoutRate=0
ParallelTrain=[
parallelizationMethod=DataParallelSGD
distributedMBReading=true
parallelizationStartEpoch=1
DataParallelSGD=[
gradientBits=1
]
]
numMBsToShowResult=100
]
reader=[
readerType=ImageReader
# Map file which maps images to labels using the following format:
# <full path to image><tab><numerical label (0-based class id)>
# Example:
# C:\Data\ImageNet\2012\train\n01440764\n01440764_10026.JPEG<tab>0
file=$DataDir$/train_map.txt
# Randomize images before every epoch. Possible values: None, Auto. Default: Auto.
randomize=Auto
features=[
# Below are the required parameters.
width=224
height=224
channels=3
# Below are the optional parameters.
# Possible values: Center, Random. Default: Center
cropType=Random
# Horizontal random flip, will be enabled by default if cropType=Random
#hflip=0
# Crop scale ratio. Examples: cropRatio=0.9, cropRatio=0.7:0.9. Default: 1.
cropRatio=0.875
# Crop scale ratio jitter type.
# Possible values: None, UniRatio, UniLength, UniArea. Default: UniRatio
jitterType=UniRatio
# Interpolation to use when scaling image to width x height size.
# Possible values: nearest, linear, cubic, lanczos. Default: linear.
interpolations=Linear
# Stores mean values for each pixel in OpenCV matrix XML format.
meanFile=$ConfigDir$/ImageNet1K_mean.xml
]
labels=[
labelDim=1000
]
]
]
AddTop5Eval=[
action=edit
CurModel=$ModelDir$/ResNet_152
NewModel=$ModelDir$/ResNet_152.Top5
editPath=$ConfigDir$/add_top5_layer.mel
]
Test=[
action=test
modelPath=$ModelDir$/ResNet_152.Top5
# Set minibatch size for testing.
minibatchSize=128
NDLNetworkBuilder=[
networkDescription=$ConfigDir$/ResNet_152.ndl
]
reader=[
readerType=ImageReader
file=$DataDir$/val_map.txt
randomize=None
features=[
width=224
height=224
channels=3
cropType=Center
meanFile=$ConfigDir$/ImageNet1K_mean.xml
]
labels=[
labelDim=1000
]
]
]

112
Examples/Image/Miscellaneous/ImageNet/ResNet/ResNet_152.ndl Normal file
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load=ndlMacros
run=DNN
ndlMacros = [
ImageW = 224
ImageH = 224
ImageC = 3
LabelDim = 1000
features = ImageInput(ImageW, ImageH, ImageC, tag = feature)
featOffs = Const(0, rows = 150528)
featScaled = Plus(features, featOffs)
labels = Input(LabelDim, tag = label)
# Kernels width and height.
kW = 3
kH = 3
# Kernel stride.
hs = 1
vs = 1
# Pooling settings.
poolW = 2
poolH = 2
poolhs = 2
poolvs = 2
# Initial parameter values.
convWScale = 7.07
convBValue = 0
scValue = 0.03
fcWScale = 3.0
fcBValue = 1
]
DNN=[
cMap1 = 64
cMap2 = 128
cMap3 = 256
cMap4 = 512
cMap5 = 1024
cMap6 = 2048
conv1 = ConvBNReLULayer(featScaled, cMap1, 147, 7, 7, 2, 2, convWScale, convBValue, scValue)
pool1 = MaxPooling(conv1, poolW, poolH, poolhs, poolvs)
rn1_1_Wproj = Parameter(cMap3, cMap1, init = fromFile, initFromFilePath = "$Proj64to256Filename$", needGradient = false)
rn1_1 = ResNetNode3Inc(pool1, cMap1, cMap1, cMap3, 576, convWScale, convBValue, scValue, rn1_1_Wproj)
rn1_2 = ResNetNode3(rn1_1, cMap3, cMap1, cMap3, 576, convWScale, convBValue, scValue)
rn1_3 = ResNetNode3(rn1_2, cMap3, cMap1, cMap3, 576, convWScale, convBValue, scValue)
rn2_1_Wproj = Parameter(cMap4, cMap3, init = fromFile, initFromFilePath = "$Proj256to512Filename$", needGradient = false)
rn2_1 = ResNetNode3Inc(rn1_3, cMap3, cMap2, cMap4, 1152, convWScale, convBValue, scValue, rn2_1_Wproj)
rn2_2 = ResNetNode3(rn2_1, cMap4, cMap2, cMap4, 1152, convWScale, convBValue, scValue)
rn2_3 = ResNetNode3(rn2_2, cMap4, cMap2, cMap4, 1152, convWScale, convBValue, scValue)
rn2_4 = ResNetNode3(rn2_3, cMap4, cMap2, cMap4, 1152, convWScale, convBValue, scValue)
rn2_5 = ResNetNode3(rn2_4, cMap4, cMap2, cMap4, 1152, convWScale, convBValue, scValue)
rn2_6 = ResNetNode3(rn2_5, cMap4, cMap2, cMap4, 1152, convWScale, convBValue, scValue)
rn2_7 = ResNetNode3(rn2_6, cMap4, cMap2, cMap4, 1152, convWScale, convBValue, scValue)
rn2_8 = ResNetNode3(rn2_7, cMap4, cMap2, cMap4, 1152, convWScale, convBValue, scValue)
rn3_1_Wproj = Parameter(cMap5, cMap4, init = fromFile, initFromFilePath = "$Proj512to1024Filename$", needGradient = false)
rn3_1 = ResNetNode3Inc(rn2_8, cMap4, cMap3, cMap5, 2304, convWScale, convBValue, scValue, rn3_1_Wproj)
rn3_2 = ResNetNode3(rn3_1, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_3 = ResNetNode3(rn3_2, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_4 = ResNetNode3(rn3_3, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_5 = ResNetNode3(rn3_4, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_6 = ResNetNode3(rn3_5, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_7 = ResNetNode3(rn3_6, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_8 = ResNetNode3(rn3_7, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_9 = ResNetNode3(rn3_8, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_10= ResNetNode3(rn3_9, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_11= ResNetNode3(rn3_10, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_12= ResNetNode3(rn3_11, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_13= ResNetNode3(rn3_12, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_14= ResNetNode3(rn3_13, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_15= ResNetNode3(rn3_14, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_16= ResNetNode3(rn3_15, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_17= ResNetNode3(rn3_16, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_18= ResNetNode3(rn3_17, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_19= ResNetNode3(rn3_18, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_20= ResNetNode3(rn3_19, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_21= ResNetNode3(rn3_20, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_22= ResNetNode3(rn3_21, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_23= ResNetNode3(rn3_22, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_24= ResNetNode3(rn3_23, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_25= ResNetNode3(rn3_24, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_26= ResNetNode3(rn3_25, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_27= ResNetNode3(rn3_26, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_28= ResNetNode3(rn3_27, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_29= ResNetNode3(rn3_28, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_30= ResNetNode3(rn3_29, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_31= ResNetNode3(rn3_30, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_32= ResNetNode3(rn3_31, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_33= ResNetNode3(rn3_32, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_34= ResNetNode3(rn3_33, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_35= ResNetNode3(rn3_34, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn3_36= ResNetNode3(rn3_35, cMap5, cMap3, cMap5, 2304, convWScale, convBValue, scValue)
rn4_1_Wproj = Parameter(cMap6, cMap5, init = fromFile, initFromFilePath = "$Proj1024to2048Filename$", needGradient = false)
rn4_1 = ResNetNode3Inc(rn3_36, cMap5, cMap4, cMap6, 4608, convWScale, convBValue, scValue, rn4_1_Wproj)
rn4_2 = ResNetNode3(rn4_1, cMap6, cMap4, cMap6, 4608, convWScale, convBValue, scValue)
rn4_3 = ResNetNode3(rn4_2, cMap6, cMap4, cMap6, 4608, convWScale, convBValue, scValue)
pool5 = AveragePooling(rn4_3, poolW, poolH, poolhs, poolvs)
ol = DnnLayer(8192, labelDim, pool5, fcWScale, fcBValue)
CE = CrossEntropyWithSoftmax(labels, ol, tag = Criteria)
Err = ErrorPrediction(labels, ol, tag = Eval)
OutputNodes = ol
]

122
Examples/Image/Miscellaneous/ImageNet/ResNet/ResNet_34.config Normal file
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@ -0,0 +1,122 @@
RootDir = "."
ConfigDir = "$RootDir$"
DataDir = "$RootDir$"
OutputDir = "$RootDir$/Output"
ModelDir = "$OutputDir$/Models"
ndlMacros=$ConfigDir$/Macros.ndl
precision=float
deviceId=Auto
command=Train:AddTop5Eval:Test
parallelTrain=false
stderr=$OutputDir$/ResNet_34
traceLevel=1
Proj64to128Filename = $ConfigDir$/64to128.txt
Proj128to256Filename = $ConfigDir$/128to256.txt
Proj256to512Filename = $ConfigDir$/256to512.txt
Train=[
action=train
modelPath=$ModelDir$/ResNet_34
NDLNetworkBuilder=[
networkDescription=$ConfigDir$/ResNet_34.ndl
]
SGD=[
epochSize=0
minibatchSize=64
learningRatesPerMB=0.1*20:0.03*10:0.01*30:0.003
momentumPerMB=0.9
maxEpochs=100
gradUpdateType=None
L2RegWeight=0.0001
dropoutRate=0
ParallelTrain=[
parallelizationMethod=DataParallelSGD
distributedMBReading=true
parallelizationStartEpoch=1
DataParallelSGD=[
gradientBits=1
]
]
numMBsToShowResult=100
]
reader=[
readerType=ImageReader
# Map file which maps images to labels using the following format:
# <full path to image><tab><numerical label (0-based class id)>
# Example:
# C:\Data\ImageNet\2012\train\n01440764\n01440764_10026.JPEG<tab>0
file=$DataDir$/train_map.txt
# Randomize images before every epoch. Possible values: None, Auto. Default: Auto.
randomize=Auto
features=[
# Below are the required parameters.
width=224
height=224
channels=3
# Below are the optional parameters.
# Possible values: Center, Random. Default: Center
cropType=Random
# Horizontal random flip, will be enabled by default if cropType=Random
#hflip=0
# Crop scale ratio. Examples: cropRatio=0.9, cropRatio=0.7:0.9. Default: 1.
cropRatio=0.875
# Crop scale ratio jitter type.
# Possible values: None, UniRatio, UniLength, UniArea. Default: UniRatio
jitterType=UniRatio
# Interpolation to use when scaling image to width x height size.
# Possible values: nearest, linear, cubic, lanczos. Default: linear.
interpolations=Linear
# Stores mean values for each pixel in OpenCV matrix XML format.
meanFile=$ConfigDir$/ImageNet1K_mean.xml
]
labels=[
labelDim=1000
]
]
]
AddTop5Eval=[
action=edit
CurModel=$ModelDir$/ResNet_34
NewModel=$ModelDir$/ResNet_34.Top5
editPath=$ConfigDir$/add_top5_layer.mel
]
Test=[
action=test
modelPath=$ModelDir$/ResNet_34.Top5
# Set minibatch size for testing.
minibatchSize=128
NDLNetworkBuilder=[
networkDescription=$ConfigDir$/ResNet_34.ndl
]
reader=[
readerType=ImageReader
file=$DataDir$/val_map.txt
randomize=None
features=[
width=224
height=224
channels=3
cropType=Center
meanFile=$ConfigDir$/ImageNet1K_mean.xml
]
labels=[
labelDim=1000
]
]
]

74
Examples/Image/Miscellaneous/ImageNet/ResNet/ResNet_34.ndl Normal file
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@ -0,0 +1,74 @@
load=ndlMacros
run=DNN
ndlMacros = [
ImageW = 224
ImageH = 224
ImageC = 3
LabelDim = 1000
features = ImageInput(ImageW, ImageH, ImageC, tag = feature)
featOffs = Const(0, rows = 150528)
featScaled = Plus(features, featOffs)
labels = Input(LabelDim, tag = label)
# Kernels width and height.
kW = 3
kH = 3
# Kernel stride.
hs = 1
vs = 1
# Pooling settings.
poolW = 2
poolH = 2
poolhs = 2
poolvs = 2
# Initial parameter values.
convWScale = 7.07
convBValue = 0
scValue = 0.03
fcWScale = 3.0
fcBValue = 1
]
DNN=[
cMap1 = 64
conv1 = ConvBNReLULayer(featScaled, cMap1, 147, 7, 7, 2, 2, convWScale, convBValue, scValue)
pool1 = MaxPooling(conv1, poolW, poolH, poolhs, poolvs)
rn1_1 = ResNetNode2(pool1, cMap1, 576, kW, kH, convWScale, convBValue, scValue)
rn1_2 = ResNetNode2(rn1_1, cMap1, 576, kW, kH, convWScale, convBValue, scValue)
rn1_3 = ResNetNode2(rn1_2, cMap1, 576, kW, kH, convWScale, convBValue, scValue)
cMap2 = 128
rn2_1_Wproj = Parameter(cMap2, cMap1, init = fromFile, initFromFilePath = "$Proj64to128Filename$", needGradient = false)
rn2_1 = ResNetNode2Conv(rn1_3, cMap2, 576, 1152, kW, kH, convWScale, convBValue, scValue, rn2_1_Wproj)
rn2_2 = ResNetNode2(rn2_1, cMap2, 1152, kW, kH, convWScale, convBValue, scValue)
rn2_3 = ResNetNode2(rn2_2, cMap2, 1152, kW, kH, convWScale, convBValue, scValue)
rn2_4 = ResNetNode2(rn2_3, cMap2, 1152, kW, kH, convWScale, convBValue, scValue)
cMap3 = 256
rn3_1_Wproj = Parameter(cMap3, cMap2, init = fromFile, initFromFilePath = "$Proj128to256Filename$", needGradient = false)
rn3_1 = ResNetNode2Conv(rn2_4, cMap3, 1152, 2304, kW, kH, convWScale, convBValue, scValue, rn3_1_Wproj)
rn3_2 = ResNetNode2(rn3_1, cMap3, 2304, kW, kH, convWScale, convBValue, scValue)
rn3_3 = ResNetNode2(rn3_2, cMap3, 2304, kW, kH, convWScale, convBValue, scValue)
rn3_4 = ResNetNode2(rn3_3, cMap3, 2304, kW, kH, convWScale, convBValue, scValue)
rn3_5 = ResNetNode2(rn3_4, cMap3, 2304, kW, kH, convWScale, convBValue, scValue)
rn3_6 = ResNetNode2(rn3_5, cMap3, 2304, kW, kH, convWScale, convBValue, scValue)
cMap4 = 512
rn4_1_Wproj = Parameter(cMap4, cMap3, init = fromFile, initFromFilePath = "$Proj256to512Filename$", needGradient = false)
rn4_1 = ResNetNode2Conv(rn3_6, cMap4, 2304, 4608, kW, kH, convWScale, convBValue, scValue, rn4_1_Wproj)
rn4_2 = ResNetNode2(rn4_1, cMap4, 4608, kW, kH, convWScale, convBValue, scValue)
rn4_3 = ResNetNode2(rn4_2, cMap4, 4608, kW, kH, convWScale, convBValue, scValue)
pool5 = AveragePooling(rn4_3, poolW, poolH, poolhs, poolvs)
ol = DnnLayer(4608, labelDim, pool5, fcWScale, fcBValue)
CE = CrossEntropyWithSoftmax(labels, ol, tag = Criteria)
Err = ErrorPrediction(labels, ol, tag = Eval)
OutputNodes = ol
]

6
Examples/Image/Miscellaneous/ImageNet/ResNet/add_top5_layer.mel Normal file
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@ -0,0 +1,6 @@
m1=LoadModel($CurModel$, format=cntk)
SetDefaultModel(m1)
ErrTop5 = ErrorPrediction(labels, OutputNodes.z, Const(5), tag = Eval)
SaveModel(m1, $NewModel$, format=cntk)

27
Examples/Image/Miscellaneous/ImageNet/VGG/Macros.ndl
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@ -8,6 +8,20 @@ DnnReLULayer(inDim, outDim, x, wScale, bValue)
y = RectifiedLinear(z)
}
# Fully-connected layer with batch normalization and ReLU activation.
DnnBNReLULayer(inDim, outDim, x, wScale, bValue)
{
W = Parameter(outDim, inDim, init = Gaussian, initValueScale = wScale)
b = Parameter(inDim, 1, init = fixedValue, value = bValue)
sc = Parameter(inDim, 1, init = Gaussian, initValueScale = 0.01)
m = Parameter(inDim, 1, init = fixedValue, value = 0, needGradient = false)
isd = Parameter(inDim, 1, init = fixedValue, value = 0, needGradient = false)
bn = BatchNormalization(x, sc, b, m, isd, eval = false, spatial = false)
t = Times(W, bn)
y = RectifiedLinear(t)
}
# Fully-connected layer.
DnnLayer(inDim, outDim, x, wScale, bValue)
{
@ -27,3 +41,16 @@ ConvReLULayer(inp, outMap, inWCount, kW, kH, hStride, vStride, wScale, bValue)
y = RectifiedLinear(z);
}
# Convolutional layer with batch normalization and ReLU activation.
ConvBNReLULayer(inp, outMap, inWCount, kW, kH, hStride, vStride, wScale, bValue, scValue)
{
W = Parameter(outMap, inWCount, init = Gaussian, initValueScale = wScale)
b = Parameter(outMap, 1, init = fixedValue, value = bValue)
sc = Parameter(outMap, 1, init = Gaussian, initValueScale = scValue)
m = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
isd = Parameter(outMap, 1, init = fixedValue, value = 0, needGradient = false)
c = Convolution(W, inp, kW, kH, outMap, hStride, vStride, zeroPadding = true)
bn = BatchNormalization(c, sc, b, m, isd, eval = false, spatial = true)
y = RectifiedLinear(bn);
}

2
Examples/Image/Miscellaneous/ImageNet/VGG/VGG_E.config
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@ -67,7 +67,7 @@ Train=[
# Horizontal random flip, will be enabled by default if cropType=Random
#hflip=0
# Crop scale ratio. Examples: cropRatio=0.9, cropRatio=0.7:0.9. Default: 1.
cropRatio=0.9
cropRatio=0.875
# Crop scale ratio jitter type.
# Possible values: None, UniRatio, UniLength, UniArea. Default: UniRatio
jitterType=UniRatio

4
Examples/Image/Miscellaneous/ImageNet/VGG/VGG_E.ndl
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@ -1,7 +1,7 @@
load=ndlMnistMacros
load=ndlMacros
run=DNN
ndlMnistMacros = [
ndlMacros = [
ImageW = 224
ImageH = 224
ImageC = 3

118
Examples/Image/Miscellaneous/ImageNet/VGG/VGG_E_BN.config Normal file
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@ -0,0 +1,118 @@
RootDir = "."
ConfigDir = "$RootDir$"
DataDir = "$RootDir$"
OutputDir = "$RootDir$/Output"
ModelDir = "$OutputDir$/Models"
ndlMacros=$ConfigDir$/Macros.ndl
precision=float
deviceId=Auto
command=Train:AddTop5Eval:Test
parallelTrain=false
stderr=$OutputDir$/VGG_E_BN
traceLevel=1
Train=[
action=train
modelPath=$ModelDir$/VGG_E_BN
NDLNetworkBuilder=[
networkDescription=$ConfigDir$/VGG_E_BN.ndl
]
SGD=[
epochSize=0
minibatchSize=16
learningRatesPerMB=0.01*20:0.003*12:0.001*28:0.0003
momentumPerMB=0.9
maxEpochs=70
gradUpdateType=None
L2RegWeight=0.0005
dropoutRate=0*5:0.5
ParallelTrain=[
parallelizationMethod=DataParallelSGD
distributedMBReading=true
parallelizationStartEpoch=1
DataParallelSGD=[
gradientBits=1
]
]
numMBsToShowResult=10
]
reader=[
readerType=ImageReader
# Map file which maps images to labels using the following format:
# <full path to image><tab><numerical label (0-based class id)>
# Example:
# C:\Data\ImageNet\2012\train\n01440764\n01440764_10026.JPEG<tab>0
file=$DataDir$/train_map.txt
# Randomize images before every epoch. Possible values: None, Auto. Default: Auto.
randomize=Auto
features=[
# Below are the required parameters.
width=224
height=224
channels=3
# Below are the optional parameters.
# Possible values: Center, Random. Default: Center
cropType=Random
# Horizontal random flip, will be enabled by default if cropType=Random
#hflip=0
# Crop scale ratio. Examples: cropRatio=0.9, cropRatio=0.7:0.9. Default: 1.
cropRatio=0.875
# Crop scale ratio jitter type.
# Possible values: None, UniRatio, UniLength, UniArea. Default: UniRatio
jitterType=UniRatio
# Interpolation to use when scaling image to width x height size.
# Possible values: nearest, linear, cubic, lanczos. Default: linear.
interpolations=Linear
# Stores mean values for each pixel in OpenCV matrix XML format.
meanFile=$ConfigDir$/ImageNet1K_mean.xml
]
labels=[
labelDim=1000
]
]
]
AddTop5Eval=[
action=edit
CurModel=$ModelDir$/VGG_E_BN
NewModel=$ModelDir$/VGG_E_BN.Top5
editPath=$ConfigDir$/add_top5_layer.mel
]
Test=[
action=test
modelPath=$ModelDir$/VGG_E_BN.Top5
# Set minibatch size for testing.
minibatchSize=128
NDLNetworkBuilder=[
networkDescription=$ConfigDir$/VGG_E_BN.ndl
]
reader=[
readerType=ImageReader
file=$DataDir$/val_map.txt
randomize=None
features=[
width=224
height=224
channels=3
cropType=Center
meanFile=$ConfigDir$/ImageNet1K_mean.xml
]
labels=[
labelDim=1000
]
]
]

87
Examples/Image/Miscellaneous/ImageNet/VGG/VGG_E_BN.ndl Normal file
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@ -0,0 +1,87 @@
load=ndlMacros
run=DNN
ndlMacros = [
ImageW = 224
ImageH = 224
ImageC = 3
LabelDim = 1000
features = ImageInput(ImageW, ImageH, ImageC, tag = feature)
featOffs = Const(0, rows = 150528)
featScaled = Plus(features, featOffs)
labels = Input(LabelDim, tag = label)
# Kernels width and height.
kW = 3
kH = 3
# Kernel stride.
hs = 1
vs = 1
# Pooling settings.
poolW = 2
poolH = 2
poolhs = 2
poolvs = 2
# Initial parameter values.
convWScale = 7.07
convBValue = 0
scValue = 0.03
fc1WScale = 3.0
fc1BValue = 1
fc2WScale = 3.0
fc2BValue = 1
fc3WScale = 1.0
fc3BValue = 1
]
DNN=[
cMap1 = 64
conv1 = ConvBNReLULayer(featScaled, cMap1, 27, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv2 = ConvBNReLULayer(conv1, cMap1, 576, kW, kH, hs, vs, convWScale, convBValue, scValue)
pool1 = MaxPooling(conv2, poolW, poolH, poolhs, poolvs)
cMap3 = 128
conv3 = ConvBNReLULayer(pool1, cMap3, 576, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv4 = ConvBNReLULayer(conv3, cMap3, 1152, kW, kH, hs, vs, convWScale, convBValue, scValue)
pool2 = MaxPooling(conv4, poolW, poolH, poolhs, poolvs)
cMap5 = 256
conv5 = ConvBNReLULayer(pool2, cMap5, 1152, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv6 = ConvBNReLULayer(conv5, cMap5, 2304, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv7 = ConvBNReLULayer(conv6, cMap5, 2304, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv8 = ConvBNReLULayer(conv7, cMap5, 2304, kW, kH, hs, vs, convWScale, convBValue, scValue)
pool3 = MaxPooling(conv8, poolW, poolH, poolhs, poolvs)
cMap9 = 512
conv9 = ConvBNReLULayer(pool3, cMap9, 2304, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv10 = ConvBNReLULayer(conv9, cMap9, 4608, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv11 = ConvBNReLULayer(conv10, cMap9, 4608, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv12 = ConvBNReLULayer(conv11, cMap9, 4608, kW, kH, hs, vs, convWScale, convBValue, scValue)
pool4 = MaxPooling(conv12, poolW, poolH, poolhs, poolvs)
cMap13 = 512
conv13 = ConvBNReLULayer(pool4, cMap13, 4608, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv14 = ConvBNReLULayer(conv13, cMap13, 4608, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv15 = ConvBNReLULayer(conv14, cMap13, 4608, kW, kH, hs, vs, convWScale, convBValue, scValue)
conv16 = ConvBNReLULayer(conv15, cMap13, 4608, kW, kH, hs, vs, convWScale, convBValue, scValue)
pool5 = MaxPooling(conv16, poolW, poolH, poolhs, poolvs)
hiddenDim = 4096
h1 = DnnBNReLULayer(25088, hiddenDim, pool5, fc1WScale, fc1BValue)
h1_d = Dropout(h1)
h2 = DnnBNReLULayer(hiddenDim, hiddenDim, h1_d, fc2WScale, fc2BValue)
h2_d = Dropout(h2)
ol = DnnLayer(hiddenDim, labelDim, h2_d, fc3WScale, fc3BValue)
CE = CrossEntropyWithSoftmax(labels, ol, tag = Criteria)
Err = ErrorPrediction(labels, ol, tag = Eval)
OutputNodes = ol
]

1
Makefile
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@ -234,6 +234,7 @@ MATH_SRC =\
ifdef CUDA_PATH
MATH_SRC +=\
$(SOURCEDIR)/Math/GPUMatrix.cu \
$(SOURCEDIR)/Math/GPUTensor.cu \
$(SOURCEDIR)/Math/GPUSparseMatrix.cu \
$(SOURCEDIR)/Math/GPUWatcher.cu \
$(SOURCEDIR)/Math/MatrixQuantizerGPU.cu \

17
Source/CNTK/BrainScript/ExperimentalNetworkBuilder.cpp
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@ -35,13 +35,14 @@ using namespace std;
;
wstring computationNodes = // TODO: use actual TypeName() here? would first need to make it a wide string; we should also extract those two methods into the base macro
L"LearnableParameter(rows, cols, needGradient = true, init = 'uniform'/*|fixedValue|gaussian|fromFile*/, initValueScale = 1, value = 0, initFromFilePath = '', initOnCPUOnly=true, randomSeed=-1, tag='') = new ComputationNode [ operation = 'LearnableParameter' /*plus the function args*/ ]\n"
L"LearnableParameter(rows, cols, needGradient = true, init = 'uniform'/*|fixedValue|gaussian|fromFile*/, initValueScale = 1, value = 0, initFromFilePath = '', initOnCPUOnly=true, randomSeed=-1, tag='') = new ComputationNode [ operation = 'LearnableParameter' ; shape = new TensorShape [ dims = (rows : cols) ] /*plus the function args*/ ]\n"
L"Parameter = LearnableParameter // deprecated \n"
L"ParameterTensor(dims, needGradient = true, init = 'uniform'/*|fixedValue|gaussian|fromFile*/, initValueScale = 1, value = 0, initFromFilePath = '', initOnCPUOnly=true, randomSeed=-1, tag='') = new ComputationNode [ operation = 'LearnableParameter' ; shape = new TensorShape [ /*dims*/ ] /*plus the function args*/ ]\n"
// ^^ already works; vv untested
L"Input(rows, cols, tag='feature') = new ComputationNode [ operation = 'InputValue' ; isImage = false /*plus the function args*/ ]\n" // note: naming a little inconsistent // TODO: re-test after flag change
L"SparseInput(rows, cols, tag='feature') = new ComputationNode [ operation = 'SparseInputValue' ; isImage = false /*plus the function args*/ ]\n"
L"ImageInput(imageWidth, imageHeight, imageChannels, numImages, tag='feature') = new ComputationNode [ operation = 'InputValue' ; isImage = true /*plus the function args*/ ]\n"
L"SparseImageInput(imageWidth, imageHeight, imageChannels, numImages, tag='feature') = new ComputationNode [ operation = 'SparseInputValue' ; isImage = true /*plus the function args*/ ]\n"
L"Input(rows, tag='feature') = new ComputationNode [ operation = 'InputValue' ; shape = new TensorShape [ dims = (rows) ] ; isImage = false /*plus the function args*/ ]\n" // note: naming a little inconsistent // TODO: re-test after flag change
L"SparseInput(rows, tag='feature') = new ComputationNode [ operation = 'SparseInputValue' ; shape = new TensorShape [ dims = (rows) ] ; isImage = false /*plus the function args*/ ]\n"
L"ImageInput(imageWidth, imageHeight, imageChannels, imageLayout='CHW', tag='feature') = new ComputationNode [ operation = 'InputValue' ; isImage = true /*plus the function args*/ ]\n"
L"SparseImageInput(imageWidth, imageHeight, imageChannels, imageLayout='CHW', tag='feature') = new ComputationNode [ operation = 'SparseInputValue' ; isImage = true /*plus the function args*/ ]\n"
L"Constant(val, rows = 1, cols = 1, tag='') = Parameter(rows, cols, needGradient = false, init = 'fixedValue', value = val) \n"
L"PastValue(rows, cols, input, timeStep = 1, defaultHiddenActivation = 0.1, tag='') = new ComputationNode [ operation = 'PastValue' ; inputs = input /*plus the function args*/ ]\n"
L"FutureValue(rows, cols, input, timeStep = 1, defaultHiddenActivation = 0.1, tag='') = new ComputationNode [ operation = 'FutureValue' ; inputs = input /*plus the function args*/ ]\n"
@ -53,9 +54,9 @@ using namespace std;
L"Logistic(label, probability, tag='') = new ComputationNode [ operation = 'Logistic' ; inputs = (label : probability) /*plus the function args*/ ]\n"
L"WeightedLogistic(label, probability, instanceWeight, tag='') = new ComputationNode [ operation = 'Logistic' ; inputs = (label : probability : instanceWeight) /*plus the function args*/ ]\n"
L"ReconcileMBLayout(dataInput, layoutInput, tag='') = new ComputationNode [ operation = 'ReconcileMBLayout' ; inputs = (dataInput : layoutInput) /*plus the function args*/ ]\n"
L"Convolution(weightNode, inputValueNode, kernelWidth, kernelHeight, outputChannels, horizontalSubsample, verticalSubsample, zeroPadding = false, maxTempMemSizeInSamples = 0, tag='') = new ComputationNode [ operation = 'Convolution' ; inputs = (weightNode : inputValueNode) /*plus the function args*/ ]\n"
L"MaxPooling(input, windowWidth, windowHeight, horizontalSubsample, verticalSubsample, tag='') = new ComputationNode [ operation = 'MaxPooling' ; inputs = input /*plus the function args*/ ]\n"
L"AveragePooling(input, windowWidth, windowHeight, horizontalSubsample, verticalSubsample, tag='') = new ComputationNode [ operation = 'AveragePoolingNode' ; inputs = input /*plus the function args*/ ]\n"
L"Convolution(weightNode, inputValueNode, kernelWidth, kernelHeight, outputChannels, horizontalSubsample, verticalSubsample, zeroPadding = false, maxTempMemSizeInSamples = 0, imageLayout='CHW', tag='') = new ComputationNode [ operation = 'Convolution' ; inputs = (weightNode : inputValueNode) /*plus the function args*/ ]\n"
L"MaxPooling(input, windowWidth, windowHeight, horizontalSubsample, verticalSubsample, imageLayout='CHW', tag='') = new ComputationNode [ operation = 'MaxPooling' ; inputs = input /*plus the function args*/ ]\n"
L"AveragePooling(input, windowWidth, windowHeight, horizontalSubsample, verticalSubsample, imageLayout='CHW', tag='') = new ComputationNode [ operation = 'AveragePooling' ; inputs = input /*plus the function args*/ ]\n"
// TODO: define DelayedValue, with negative delay for future; cannot do this yet, need to be able to say something like delay = -(^.delay)
// aliases
L"ColumnwiseCrossProduct = KhatriRaoProduct // deprecated \n" // TODO: should it be deprecated? It is described as easier to understand in the CNTKBook.

4
Source/CNTK/CNTK.cpp
Просмотреть файл

@ -902,12 +902,12 @@ void DoTrain(const ConfigRecordType & config)
};
}
// legacy test mode for BrainScript. Will go away once we fully integrate with BS.
else if (config.Exists(L"ExperimentalNetworkBuilder"))
else if (config.Exists(L"BrainScriptNetworkBuilder") || config.Exists(L"ExperimentalNetworkBuilder"/*legacy*/))
{
// We interface with outer old CNTK config by taking the inner part, which we get as a string, as BrainScript.
// We prepend a few standard definitions, and also definition of deviceId and precision, which all objects will pull out again when they are being constructed.
// BUGBUG: We are not getting TextLocations right in this way! Do we need to inject location markers into the source? Moot once we fully switch to BS
wstring sourceCode = config(L"ExperimentalNetworkBuilder");
wstring sourceCode = config.Exists(L"BrainScriptNetworkBuilder") ? config(L"BrainScriptNetworkBuilder") : config(L"ExperimentalNetworkBuilder");
let expr = BS::ParseConfigDictFromString(standardFunctions + computationNodes + commonMacros
+ msra::strfun::wstrprintf(L"deviceId = %d ; precision = '%ls' ; network = new ComputationNetwork ", (int)deviceId, ElemTypeName<ElemType>()) // TODO: check if typeid needs postprocessing
+ sourceCode, vector<wstring>()); // source code has the form [ ... ]

24
Source/CNTK/SimpleNetworkBuilder.cpp
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@ -1050,7 +1050,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ComputationNodePtr scalar = builder.CreateLearnableParameter(msra::strfun::wstrprintf(L"SV%d", i), 1, 1);
scalar->Value().SetValue((ElemType)0.01);
#ifndef ENABLE_TENSORVIEW
#ifndef ENABLE_BROADCASTING_ELEMENTTIMES
ComputationNodePtr scaled = builder.Scale(scalar, directOutput, msra::strfun::wstrprintf(L"S%d", i));
#else
ComputationNodePtr scaled = builder.ElementTimes(scalar, directOutput, msra::strfun::wstrprintf(L"S%d", i));
@ -2523,19 +2523,27 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_net->LabelNodes().push_back(label);
ComputationNodePtr output;
// BUGBUG: Use of 'tinput' conflicts with some criteria that expect their top weight matrix transposed, e.g. [200 x 10000] with vocab size of 10000 instead of [10000 x 200].
// E.g. ClassCrossEntropyWithSoftmax uses this, but that is incompatible with 'tinput.' Now 'tinput' is computed on demand, but if a criterion node is
// used that needs it, we will still have this incompatibility.
ComputationNodePtr tinput = input;
if (matrix != nullptr)
tinput = builder.Times(matrix, input);
switch (m_trainCriterion)
{
case TrainingCriterion::CrossEntropyWithSoftmax:
if (matrix != nullptr)
tinput = builder.Times(matrix, input);
output = builder.CrossEntropyWithSoftmax(label, tinput, (trainNodeName == L"") ? L"CrossEntropyWithSoftmax" : trainNodeName);
break;
case TrainingCriterion::SquareError:
if (matrix != nullptr)
tinput = builder.Times(matrix, input);
output = builder.SquareError(label, tinput, (trainNodeName == L"") ? L"SquareError" : trainNodeName);
break;
case TrainingCriterion::Logistic:
if (matrix != nullptr)
tinput = builder.Times(matrix, input);
output = builder.Logistic(label, tinput, (trainNodeName == L"") ? L"Logistic" : trainNodeName);
break;
case TrainingCriterion::CRF:
@ -2564,6 +2572,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
switch (m_evalCriterion)
{
case EvalCriterion::CrossEntropyWithSoftmax:
if (matrix != nullptr && tinput == input)
tinput = builder.Times(matrix, input);
//output = builder.CrossEntropyWithSoftmax(label, tinput, (evalNodeName == L"")?L"EvalCrossEntropyWithSoftmax":evalNodeName);
output = builder.CrossEntropyWithSoftmax(label, tinput, (evalNodeName == L"") ? L"CrossEntropyWithSoftmax" : evalNodeName);
break;
@ -2575,18 +2585,26 @@ namespace Microsoft { namespace MSR { namespace CNTK {
output = builder.NoiseContrastiveEstimation(label, input, matrix, clspostprob, (evalNodeName == L"") ? L"NoiseContrastiveEstimationNode" : evalNodeName);
break;
case EvalCriterion::SquareError:
if (matrix != nullptr && tinput == input)
tinput = builder.Times(matrix, input);
//output = builder.SquareError(label, tinput, (evalNodeName == L"")?L"EvalSquareError":evalNodeName);
output = builder.SquareError(label, tinput, (evalNodeName == L"") ? L"SquareError" : evalNodeName);
break;
case EvalCriterion::Logistic:
if (matrix != nullptr && tinput == input)
tinput = builder.Times(matrix, input);
//output = builder.SquareError(label, tinput, (evalNodeName == L"")?L"EvalSquareError":evalNodeName);
output = builder.Logistic(label, tinput, (evalNodeName == L"") ? L"Logistic" : evalNodeName);
break;
case EvalCriterion::ErrorPrediction:
if (matrix != nullptr && tinput == input)
tinput = builder.Times(matrix, input);
output = builder.ErrorPrediction(label, tinput, (evalNodeName == L"") ? L"EvalErrorPrediction" : evalNodeName);
break;
case EvalCriterion::CRF:
assert(trans != nullptr);
if (matrix != nullptr && tinput == input)
tinput = builder.Times(matrix, input);
output = builder.CRF(label, tinput, trans, (evalNodeName == L"") ? L"EvalCRF" : evalNodeName);
break;
default:

27
Source/CNTK/SynchronousExecutionEngine.cpp
Просмотреть файл

@ -108,9 +108,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t imageWidth = ((NDLNode<ElemType>*)params[0])->GetScalar();
size_t imageHeight = ((NDLNode<ElemType>*)params[1])->GetScalar();
size_t imageChannels = ((NDLNode<ElemType>*)params[2])->GetScalar();
size_t numImages = parameter.size() > 3 ? ((NDLNode<ElemType>*)params[3])->GetScalar() : 1;
size_t numImages = parameter.size() > 3 ? ((NDLNode<ElemType>*)params[3])->GetScalar() : 1; // BUGBUG: This comes through MBLayout, and should be forbidden.
ImageLayoutKind imageLayoutKind = ImageLayoutKindFrom(node->GetOptionalParameter("imageLayout", "HWC"));
nodePtr = builder.CreateInputNode(name, ImageLayoutWHC(imageWidth, imageHeight, imageChannels), numImages);
nodePtr = builder.CreateInputNode(name, ImageDimensions::AsTensorShape(imageWidth, imageHeight, imageChannels, imageLayoutKind), numImages);
}
}
else if (cnNodeType == L"SparseImageInput")
@ -126,8 +127,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t imageHeight = ((NDLNode<ElemType>*)params[1])->GetScalar();
size_t imageChannels = ((NDLNode<ElemType>*)params[2])->GetScalar();
size_t numImages = parameter.size() > 3 ? ((NDLNode<ElemType>*)params[3])->GetScalar() : 1;
ImageLayoutKind imageLayoutKind = ImageLayoutKindFrom(node->GetOptionalParameter("imageLayout", "HWC"));
nodePtr = builder.CreateSparseInputNode(name, ImageLayoutWHC(imageWidth, imageHeight, imageChannels), numImages);
nodePtr = builder.CreateSparseInputNode(name, ImageDimensions::AsTensorShape(imageWidth, imageHeight, imageChannels, imageLayoutKind), numImages);
}
}
else if (OperationNameOf(LearnableParameter) == cnNodeType)
@ -323,7 +325,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t img_channels = node->GetOptionalParameter("imageChannels", "0");
bool needGradient = node->GetOptionalParameter("needGradient", "false");
nodePtr = builder.Reshape(NULL, num_rows, ImageLayoutWHC(img_width, img_height, img_channels), name);
nodePtr = builder.Reshape(NULL, num_rows, ImageDimensions::AsTensorShape(img_width, img_height, img_channels, ImageLayoutKind::HWC/*legacy*/), name); // BUGBUG: use a tensor descriptor instead
nodePtr->SetParameterUpdateRequired(needGradient);
}
}
@ -383,16 +385,15 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t outputChannels = ((NDLNode<ElemType>*)params[id++])->GetScalar();
size_t horizontalSubsample = ((NDLNode<ElemType>*)params[id++])->GetScalar();
size_t verticalSubsample = ((NDLNode<ElemType>*)params[id++])->GetScalar();
assert (id == 5);
//optional
// optional
ImageLayoutKind imageLayoutKind = ImageLayoutKindFrom(node->GetOptionalParameter("imageLayout", "HWC"));
bool zeroPadding = node->GetOptionalParameter("zeroPadding", "false");
size_t maxTempMemSizeInSamples = node->GetOptionalParameter("maxTempMemSizeInSamples", "0");
nodePtr = builder.Convolution(NULL, NULL, kernelWidth, kernelHeight, outputChannels,
horizontalSubsample, verticalSubsample, zeroPadding, name, maxTempMemSizeInSamples);
horizontalSubsample, verticalSubsample, imageLayoutKind, zeroPadding, maxTempMemSizeInSamples, name);
}
}
else if (cnNodeType == OperationNameOf(MaxPoolingNode))
@ -415,11 +416,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t windowHeight = ((NDLNode<ElemType>*)params[id++])->GetScalar();
size_t horizontalSubsample = ((NDLNode<ElemType>*)params[id++])->GetScalar();
size_t verticalSubsample = ((NDLNode<ElemType>*)params[id++])->GetScalar();
assert (id == 4);
ImageLayoutKind imageLayoutKind = ImageLayoutKindFrom(node->GetOptionalParameter("imageLayout", "HWC"));
nodePtr = builder.MaxPooling(NULL, /*inputWidth,inputHeight, channels,*/windowWidth, windowHeight,
horizontalSubsample, verticalSubsample, name);
horizontalSubsample, verticalSubsample, imageLayoutKind, name);
}
}
else if (cnNodeType == OperationNameOf(AveragePoolingNode))
@ -442,11 +444,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t windowHeight = ((NDLNode<ElemType>*)params[id++])->GetScalar();
size_t horizontalSubsample = ((NDLNode<ElemType>*)params[id++])->GetScalar();
size_t verticalSubsample = ((NDLNode<ElemType>*)params[id++])->GetScalar();
assert(id == 4);
assert (id == 4);
ImageLayoutKind imageLayoutKind = ImageLayoutKindFrom(node->GetOptionalParameter("imageLayout", "HWC"));
nodePtr = builder.AveragePooling(NULL, /*inputWidth,inputHeight, channels,*/windowWidth, windowHeight,
horizontalSubsample, verticalSubsample, name);
horizontalSubsample, verticalSubsample, imageLayoutKind, name);
}
}
else if (cnNodeType == OperationNameOf(BatchNormalizationNode))

4
Source/CNTK/stdafx.h
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@ -11,7 +11,9 @@
#pragma once
#ifdef _WIN32
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#include "targetver.h"
#endif

4
Source/Common/DataReader.cpp
Просмотреть файл

@ -7,6 +7,10 @@
//
#include "stdafx.h"
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#define DATAREADER_LOCAL
#include "Basics.h"
#include "DataReader.h"

256
Source/Common/Include/DataTensor.h
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@ -11,6 +11,7 @@
#include "File.h"
#include <vector>
#include <string>
#include <array>
namespace Microsoft { namespace MSR { namespace CNTK {
@ -83,23 +84,95 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// - Matrix lib will contain overloads for relevant operations that take Tensor& instead of Matrix&.
// - elementwise ops will go through a single bottleneck function that deals with matching dimensions (extend, broadcast) and flattening
#if 1
template<typename T>
class SmallVector
{
T m_data[12];
size_t m_size;
#ifdef _DEBUG
void DebugWipe() { memset(m_data, 0, sizeof(m_data)); } // initialize to 0 to make it look prettier in the debugger
#else
void DebugWipe() { }
#endif
public:
size_t capacity() const { return _countof(m_data); }
size_t size() const { return m_size; }
const T * data() const { return m_data; }
void clear() { m_size = 0; }
void push_back(const T & val) { if (m_size >= capacity()) LogicError("SmallVector: push_back() exceeded capacity of %d", (int)capacity()); m_data[m_size++] = val; }
void resize(size_t sz, const T & val) { if (sz < m_size) m_size = sz; else while (m_size < sz) push_back(val); }
void assign(size_t sz, const T & val) { clear(); resize(sz, val); }
template<class ITER>
void append(ITER beg, const ITER & end) { while (beg != end) push_back(*beg++); }
template<class ITER>
void assign(ITER beg, const ITER & end) { clear(); append(beg,end); }
void operator=(const SmallVector & other) { m_size = other.m_size; memcpy(m_data, other.m_data, other.m_size * sizeof(T)); }
SmallVector(const SmallVector & other) { DebugWipe(); *this = other; }
SmallVector(size_t sz, const T & val) { DebugWipe(); assign(sz, val); }
SmallVector(size_t sz) : SmallVector(sz, 0) { }
SmallVector() : SmallVector(0) { }
SmallVector(const std::vector<T> & v) { DebugWipe(); assign(v.begin(), v.end()); }
SmallVector(const std::initializer_list<T> & l) { DebugWipe(); assign(l.begin(), l.end()); }
bool operator==(const SmallVector & other) const { return size() == other.size() && !memcmp(data(), other.data(), other.m_size * sizeof(T)); }
bool operator!=(const SmallVector & other) const { return !operator==(other); } // duh
T operator[](size_t i) const { if (i >= size()) LogicError("SmallVector: index overflow"); return m_data[i]; }
T & operator[](size_t i) { if (i >= size()) LogicError("SmallVector: index overflow"); return m_data[i]; }
const T * begin() const { return data(); }
const T * end() const { return data() + size(); }
T back() const { if (empty()) LogicError("SmallVector: back() called on empty vector"); return m_data[m_size - 1]; }
T & back() { if (empty()) LogicError("SmallVector: back() called on empty vector"); return m_data[m_size - 1]; }
bool empty() const { return size() == 0; }
void resize(size_t sz) { resize(sz, 0); }
};
#else
template<typename T>
class SmallVector : vector<T>
{
typedef vector<T> Base;
public:
SmallVector() { }
SmallVector(SmallVector && other) : Base(std::move(other)) { }
SmallVector(const SmallVector & other) : Base(other) { }
SmallVector(size_t sz) : Base(sz) { }
SmallVector(size_t sz, const T & val) : Base(sz, val) { }
SmallVector(const std::initializer_list<T> & l) : Base(l) { }
SmallVector(const std::vector<T> & v) : Base(v) { }
template<class ITER>
void assign(const ITER & beg, const ITER & end) { Base::assign(beg, end); }
void assign(size_t sz, const T & val) { Base::assign(sz, val); }
template<class ITER>
void append(ITER beg, const ITER & end) { Base::insert(Base::end(), beg, end); }
void push_back(const T & val) { Base::push_back(val); }
size_t size() const { return Base::size(); }
bool empty() const { return size() == 0; }
void resize(size_t sz) { Base::resize(sz); }
void resize(size_t sz, const T & val) { Base::resize(sz, val); }
const T * begin() const { return Base::data(); }
const T * end() const { return Base::data() + size(); }
const T & back() const { return Base::back(); }
void operator=(const SmallVector & other) { Base::operator=(other); }
bool operator==(const SmallVector & other) const { return (const Base&)*this == (const Base&)other; }
T operator[](size_t i) const { return Base::operator[](i); }
T & operator[](size_t i) { return Base::operator[](i); }
};
#endif
struct TensorShape
{
public:
// main constructor (from vector that holds dimensions)
//template<class VEC>
//TensorShape(const VEC & dims) { m_dims.assign(dims.begin(), dims.end()); InitAsNoSlice(); }
template<size_t N>
TensorShape(const std::array<size_t, N> & dims) { m_dims.assign(dims.begin(), dims.end()); InitAsNoSlice(); }
TensorShape(const std::vector<size_t> & dims) { m_dims.assign(dims.begin(), dims.end()); InitAsNoSlice(); }
TensorShape( std::vector<size_t> && dims) : m_dims(std::move(dims)) { InitAsNoSlice(); }
TensorShape(const SmallVector<size_t> & dims) { m_dims.assign(dims.begin(), dims.end()); InitAsNoSlice(); }
TensorShape( SmallVector<size_t> && dims) : m_dims(std::move(dims)) { InitAsNoSlice(); }
// convenience constructors, e,g. for test code
explicit TensorShape(size_t I) : TensorShape(std::vector<size_t> { I }) { }
TensorShape(size_t I, size_t J) : TensorShape(std::vector<size_t> { I, J }) { }
TensorShape(size_t I, size_t J, size_t K) : TensorShape(std::vector<size_t> { I, J, K }) { }
TensorShape(size_t I, size_t J, size_t K, size_t L) : TensorShape(std::vector<size_t> { I, J, K, L }) { }
TensorShape(size_t I, size_t J, size_t K, size_t L, size_t M) : TensorShape(std::vector<size_t> { I, J, K, L, M }) { }
explicit TensorShape(size_t I) : TensorShape(SmallVector<size_t> { I }) { }
TensorShape(size_t I, size_t J) : TensorShape(SmallVector<size_t> { I, J }) { }
TensorShape(size_t I, size_t J, size_t K) : TensorShape(SmallVector<size_t> { I, J, K }) { }
TensorShape(size_t I, size_t J, size_t K, size_t L) : TensorShape(SmallVector<size_t> { I, J, K, L }) { }
TensorShape(size_t I, size_t J, size_t K, size_t L, size_t M) : TensorShape(SmallVector<size_t> { I, J, K, L, M }) { }
// default constructor
TensorShape() { InitAsNoSlice(); }
@ -164,29 +237,28 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// accessors
size_t GetDim(size_t k) const { return m_dims[k]; }
size_t GetRank() const { return m_dims.size(); }
size_t GetNumElements() const { size_t res = 1; for (auto & dim : m_dims) res *= dim; return res; } // in slice
size_t GetNumElements() const { if (m_dims.empty()) return 0; size_t res = 1; for (auto & dim : m_dims) res *= dim; return res; } // in slice
size_t GetAllocation() const { return m_allocation; }
size_t GetOffset() const { return m_offset; }
// vector-like accessors
size_t operator[](size_t k) const { return GetDim(k); }
size_t size() const { return GetRank(); }
const std::vector<size_t> & GetDims() const { return m_dims; } // get all, e.g. for logging or for constructing derived tensors with edited dimensions
const std::vector<ptrdiff_t> & GetStrides() const { return m_strides; }
const SmallVector<size_t> & GetDims() const { return m_dims; } // get all, e.g. for logging or for constructing derived tensors with edited dimensions
const SmallVector<ptrdiff_t> & GetStrides() const { return m_strides; }
// interpretation as an image tensor
size_t GetNumChannels() const { return m_dims.size() > 0 ? m_dims[0] : 1; }
size_t GetWidth() const { return m_dims.size() > 1 ? m_dims[1] : 1; }
size_t GetHeight() const { return m_dims.size() > 2 ? m_dims[2] : 1; }
// heuristics used for pretty-printing
// TODO: This will go away.
bool IsInputAnImage() const { return GetRank() == 3 && (GetWidth() != 1 || GetNumChannels() != 1); }
//size_t GetNumChannels() const { if (m_dims.empty()) return 0; else return m_dims.size() > 0 ? m_dims[0] : 1; }
//size_t GetWidth() const { if (m_dims.empty()) return 0; else return m_dims.size() > 1 ? m_dims[1] : 1; }
//size_t GetHeight() const { if (m_dims.empty()) return 0; else return m_dims.size() > 2 ? m_dims[2] : 1; }
// legacy helper function for RowSliceNode. Will go away.
bool IsVectorStoredAsImage() const { return GetRank() == 3 && m_dims[0] == 1 && m_dims[1] == 1; }
// indexing
// Determines the offset into the underlying element array for a given multi-dimensional index.
// This function is for reference. Probably not often used.
size_t Locate(const std::vector<size_t> & index) const
size_t Locate(const SmallVector<size_t> & index) const
{
ptrdiff_t location = m_offset;
for (size_t k = 0; k < index.size(); k++)
@ -213,11 +285,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
else
return m_strides[k] == m_strides[k - 1] * (ptrdiff_t)m_dims[k - 1];
}
// editing functions
// These all create new TensorShape objects.
TensorShape Flatten(size_t k) const // flatten [k] with [k-1]
// editing functions for tensor operations
// Unlike other methods, these are in-place.
TensorShape & FlattenInPlace(size_t k) // flatten [k] with [k-1]
{
TensorShape result = *this;
if (!CanFlatten(k))
LogicError("Flatten() cannot flatten dimensions with gaps");
// We reshape local (I x J) sub-matrices to (1 x I*J) sub-matrices.
@ -228,16 +299,15 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// m_dims = I 1 J*K L
// m_strides = 1 I I I*J*K
// TODO: rethink whether this is correct for example of negative strides
result.m_dims[k] *= result.m_dims[k - 1];
result.m_dims[k - 1] = 1;
result.m_strides[k] = /*result.m_dims[k - 1] *, it's 1 */ result.m_strides[k - 1];
return result;
m_dims[k] *= m_dims[k - 1];
m_dims[k - 1] = 1;
m_strides[k] = /*m_dims[k - 1] *, it's 1 */ m_strides[k - 1];
return *this;
}
TensorShape DropDims(const std::vector<bool> & toDrop) const // remove dimension
TensorShape & DropDimsInPlace(const SmallVector<bool> & toDrop) // remove dimension
{
// this deletes a dimension while retaining strides
// This implies a slice to [0] for this dimension.
TensorShape result = *this;
size_t j = 0;
for (size_t k = 0; k < size(); k++)
{
@ -251,40 +321,60 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// dropping the second dimension
// m_dims = I % J K
// m_strides = 1 % I I*J
result.m_dims[j] = result.m_dims[k];
result.m_strides[j] = result.m_strides[k];
m_dims[j] = m_dims[k];
m_strides[j] = m_strides[k];
j++;
}
}
result.m_dims.resize(j);
result.m_strides.resize(j);
return result;
m_dims.resize(j);
m_strides.resize(j);
return *this;
}
TensorShape WithBroadcastStrides() const // flatten [k] with [k-1] if toFlatten[k] is set
TensorShape DropDims(const SmallVector<bool> & toDrop) const
{
TensorShape result = *this;
for (size_t k = 0; k < size(); k++)
if (result.m_dims[k] == 1)
result.m_strides[k] = 0;
TensorShape result(*this);
result.DropDimsInPlace(toDrop);
return result;
}
TensorShape Pad(size_t numDims) const // append singleton dimensions
TensorShape & SetBroadcastStrides() // set strides to 0 for broadcasting dimensions
{
for (size_t k = 0; k < size(); k++)
if (m_dims[k] == 1)
m_strides[k] = 0;
return *this;
}
TensorShape & PadInPlace(size_t numDims) // append singleton dimensions
{
VerifyIsDense();
if (numDims < GetRank())
LogicError("Pad() cannot drop a shorten the dimensions.");
else if (numDims == GetRank())
return *this;
auto dims = GetDims();
dims.resize(numDims, 1);
return TensorShape(std::move(dims));
else while (GetRank() < numDims)
{
m_strides.push_back(GetRank() > 0 ? m_strides.back() * (ptrdiff_t)m_dims.back() : 1);
m_dims.push_back(1);
}
return *this;
}
TensorShape Concat(const TensorShape & other) const // concatenate
//TensorShape Concat(const TensorShape & other) const // concatenate
//{
// auto dims = GetDims();
// auto otherDims = other.GetDims();
// dims.append(otherDims.begin(), otherDims.end());
// return TensorShape(std::move(dims));
//}
TensorShape & AppendInPlace(size_t rank, size_t newDim) // concatenate one new dimension at position 'rank'
{
auto dims = GetDims();
auto otherDims = other.GetDims();
dims.insert(dims.end(), otherDims.begin(), otherDims.end());
return TensorShape(std::move(dims));
PadInPlace(rank);
m_strides.push_back(GetRank() > 0 ? m_strides.back() * (ptrdiff_t)m_dims.back() : 1);
m_dims.push_back(newDim);
m_allocation *= newDim;
return *this;
}
TensorShape Append(size_t rank, size_t newDim) const
{
TensorShape result(*this);
result.AppendInPlace(rank, newDim);
return result;
}
// pretty-printing. Returns tensor dims in the form "I x J x K".
@ -322,8 +412,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
private:
std::vector<size_t> m_dims; // dimensions of tensor or tensor slice. The size of the box.
std::vector<ptrdiff_t> m_strides; // dimension gets multiplied by this for computing the index offset. How to hop to the next element in dimension[k]. Stride magic happening here!
SmallVector<size_t> m_dims; // dimensions of tensor or tensor slice. The size of the box.
SmallVector<ptrdiff_t> m_strides; // dimension gets multiplied by this for computing the index offset. How to hop to the next element in dimension[k]. Stride magic happening here!
size_t m_offset; // offset to element(0,0,...,0). May be non-0 in case of slicing.
size_t m_allocation; // allocation size of original dense tensor
// For a regular tensor, there are no strides, m_strides[k] = m_strides[k-1] * m_dims[k-1]. This is how TensorShapes are created from dimensions.
@ -355,15 +445,61 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// TODO: Does the same trick work for 2D images?
};
// When constructing an image tensor with the usual W, H, C format, use the following function instead.
// This will sort the three parameters into the correct order.
// BUGBUG: at several places, a comment says "after multiplication the structure is lost" and the vector dimension
// is set as the image height. However, the image height is actually the wrong dimension since images are assumed transposed.
// This will get fixed once we get more complete arbitrary tensor support throughout, including better-defined inference rules.
static inline TensorShape ImageLayoutWHC(size_t width, size_t height, size_t channels)
// image layouts used in CNTK
// Nodes that do semantic interpretation of width, height, channel information must know which index they are in.
// Eventually this can go away once we switch completely to cudnn layout.
// The cudnn layout is actually our layout in order W,H,C.
enum ImageLayoutKind
{
return TensorShape(channels, width, height);
HWC, // legacy; default for NDL
CHW // cudnn; default for BrainScript
};
static inline std::string ToString(ImageLayoutKind imageLayoutKind)
{
if (imageLayoutKind == ImageLayoutKind::CHW) return "CHW";
else if (imageLayoutKind == ImageLayoutKind::HWC) return "HWC";
else LogicError("ImageLayout: Invalid ImageLayoutKind");
}
// TODO: we need a constructor from config; that will allow us to generalize
static inline ImageLayoutKind ImageLayoutKindFrom(const wstring & s)
{
if (s == L"CHW" || s == L"cudnn") return ImageLayoutKind::CHW;
else if (s == L"HWC" || s == L"legacy") return ImageLayoutKind::HWC;
else InvalidArgument("ImageLayoutKindFrom: Unknown ImageLayoutKind '%ls', must be 'CHW' (cudnn) or 'HWC' (CNTK legacy)", s.c_str());
}
// interpret TensorShape as an image descriptor
// considering that we support two ways of storingimages
struct ImageDimensions
{
size_t m_width, m_height, m_numChannels;
// interpret TensorShape as image
ImageDimensions(const TensorShape & shape, ImageLayoutKind imageLayoutKind)
{
if (shape.GetRank() != 3)
InvalidArgument("Convolution operation currently only supports 1D or 2D convolution on 3D tensors.");
if (imageLayoutKind == ImageLayoutKind::CHW)
{
m_width = shape[0];
m_height = shape[1];
m_numChannels = shape[2];
}
else if (imageLayoutKind == ImageLayoutKind::HWC)
{
m_width = shape[1];
m_height = shape[2];
m_numChannels = shape[0];
}
else LogicError("WHC: Invalid ImageLayoutKind");
}
ImageDimensions(size_t width, size_t height, size_t numChannels) : m_width(width), m_height(height), m_numChannels(numChannels) {}
// intepret image as TensorShape
static TensorShape AsTensorShape(size_t width, size_t height, size_t numChannels, ImageLayoutKind imageLayoutKind/* = ImageLayoutKind::HWC*/)
{
if (imageLayoutKind == ImageLayoutKind::CHW) return TensorShape(width, height, numChannels);
else if (imageLayoutKind == ImageLayoutKind::HWC) return TensorShape(numChannels, width, height);
else LogicError("ImageLayout: Invalid ImageLayoutKind");
}
TensorShape AsTensorShape(ImageLayoutKind imageLayoutKind) { return AsTensorShape(m_width, m_height, m_numChannels, imageLayoutKind); }
};
}}}

2
Source/Common/Include/ScriptableObjects.h
Просмотреть файл

@ -489,7 +489,7 @@ namespace Microsoft { namespace MSR { namespace ScriptableObjects {
std::vector<C> res;
res.reserve(GetSize(Fail));
for (const auto & val : values)
res.push_back(val);
res.push_back(val.ResolveValue()); // resolve upon access
return res;
}
};

2
Source/Common/Include/Sequences.h
Просмотреть файл

@ -196,7 +196,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
LogicError("AddSequence: Sequence added to an MBLayout must overlap with minibatch.");
// remember it
#ifdef _DEBUG
#if 0//def _DEBUG
auto cap = m_sequences.capacity(); // Some sanity check for debugging a speed regression. This should only show up during the first minibatches, and growing only.
m_sequences.push_back(seqDesc);
if (cap != m_sequences.capacity())

34
Source/ComputationNetworkLib/CompositeComputationNodes.h
Просмотреть файл

@ -110,6 +110,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
size_t rows1, cols1;
rows1 = Input(1)->GetNumRows();
@ -124,10 +125,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t rows = rows0 + rows1;
size_t cols = cols0;
SetDims(rows, cols);
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInput(0);
SetDims(TensorShape(rows), cols);
m_sampleLayout = GetInputSampleLayout(0);
// BUGBUG: Inconsistent with 'rows'
}
public:
@ -142,20 +143,20 @@ namespace Microsoft { namespace MSR { namespace CNTK {
f1 = Input(1)->Value();
func = Value();
Input(0)->SetDims(nInput0, nT);
Input(0)->SetDims1(nInput0, nT);
Input(0)->UpdateFunctionValuesSize();
Input(0)->Value().SetValue(0);
Input(0)->Value()(0, 0) = 1;
Input(0)->Value()(0, 1) = 2;
Input(0)->Value()(0, 2) = 3;
Input(1)->SetDims(nInput1, nT);
Input(1)->SetDims1(nInput1, nT);
Input(1)->UpdateFunctionValuesSize();
Input(1)->Value().SetValue(0);
Input(1)->Value()(0, 0) = 4;
Input(1)->Value()(0, 1) = 5;
Input(1)->Value()(0, 2) = 6;
SetDims(nInput0 + nInput1, nT);
SetDims1(nInput0 + nInput1, nT);
UpdateFunctionValuesSize();
ForwardProp(FrameRange(m_pMBLayout));
@ -250,7 +251,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
Base::Load(fstream, modelVersion);
fstream >> m_hasComputed;
LoadValue(fstream);
}
// Note: This loses the sample layout, but that is recovered by Validate().
}
virtual void DumpNodeInfo(const bool printValues, File& fstream) const override
{
@ -268,15 +270,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
if (!Input(0)->HasMBLayout())
InvalidArgument("%ls %ls operation requires its input to come in minibatches of samples.", NodeName().c_str(), OperationName().c_str());
m_pMBLayout = nullptr; // this node does not hold mini-batch data
if (!m_hasComputed) // this node retains state, and state gets destroyed by Resize(), so we must be careful
SetDims(Input(0)->GetNumRows(), 1);
SetDims(Input(0)->GetSampleLayout(), 1);
else
VerifyDims(Input(0)->GetNumRows(), 1);
InferImageDimsFromInputs();
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
@ -609,6 +610,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
if (Input(0)->RequiresPreCompute())
{
@ -654,9 +656,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// TODO: Is this correct? Why not just skip propagating a gradient into these? We should not poke around in our children.
Input(1)->SetParameterUpdateRequired(false);
Input(2)->SetParameterUpdateRequired(false); //prevent learning
SetDims(Input(0));
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
};
@ -727,6 +728,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
if (Input(0)->RequiresPreCompute())
{
@ -776,8 +778,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
Input(2)->SetParameterUpdateRequired(false);
SetDims(Input(0));
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
};
@ -955,8 +955,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
InferMBLayoutFromInputsForStandardCase();
if (isFinalValidationPass && !m_pMBLayout)
RuntimeError("%ls %ls operation makes no sense without a MB layout.", NodeName().c_str(), OperationName().c_str());
SetDims(Input(0));
InferImageDimsFromInput(0);
}
public:
@ -971,13 +971,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
f0 = Input(0)->Value();
func = Value();
Input(0)->SetDims(nInput, nT);
Input(0)->SetDims1(nInput, nT);
Input(0)->UpdateFunctionValuesSize();
Input(0)->Value().SetValue(0);
Input(0)->Value()(0, 0) = 1;
Input(0)->Value()(0, 1) = 2;
Input(0)->Value()(0, 2) = 3;
SetDims(nOutput, nT);
SetDims1(nOutput, nT);
UpdateFunctionValuesSize();
Input(0)->Value().TransferToDeviceIfNotThere( m_deviceId, true);
ForwardProp(FrameRange(m_pMBLayout));

10
Source/ComputationNetworkLib/ComputationNetwork.cpp
Просмотреть файл

@ -488,7 +488,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
if (minibatchDifferent)
{
for (ComputationNodeBasePtr node : inputs)
node->SetDims(node->GetNumRows(), minibatchMax);
node->SetNumCols(minibatchMax);
}
}
@ -654,8 +654,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
for (auto nodeIter = convolutionNodes.begin(); nodeIter != convolutionNodes.end(); nodeIter++)
{
auto node = dynamic_pointer_cast<ConvolutionNode<float>>(*nodeIter);
node->SetmMaxTempMemSizeInSamples(maxTempMemSizeInSamples);
auto nodef = dynamic_pointer_cast<ConvolutionNode<float>>(*nodeIter);
if (nodef)
nodef->SetmMaxTempMemSizeInSamples(maxTempMemSizeInSamples);
auto noded = dynamic_pointer_cast<ConvolutionNode<double>>(*nodeIter);
if (noded)
noded->SetmMaxTempMemSizeInSamples(maxTempMemSizeInSamples);
}
}
}

4
Source/ComputationNetworkLib/ComputationNetwork.h
Просмотреть файл

@ -279,9 +279,7 @@ public:
{
auto & featureNodes = FeatureNodes();
for (auto & nodeIter : featureNodes)
{
nodeIter->SetDims(nodeIter->GetNumRows(), cols);
}
nodeIter->SetNumCols(cols);
}
// When external code (readers, namely) updates InputValue's m_value,

74
Source/ComputationNetworkLib/ComputationNetworkBuilder.cpp
Просмотреть файл

@ -35,7 +35,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// please keep this table sorted
if (nodeType == OperationNameOf(CRFNode)) return New<CRFNode<ElemType>>(forward<_Types>(_Args)...);
else if (nodeType == OperationNameOf(ClassBasedCrossEntropyWithSoftmaxNode))return New<ClassBasedCrossEntropyWithSoftmaxNode<ElemType>>(forward<_Types>(_Args)...);
#ifdef ENABLE_TENSORVIEW
#ifdef ENABLE_BROADCASTING_ELEMENTTIMES
else if (nodeType == L"ColumnElementTimes") return New<ElementTimesNode<ElemType>>(forward<_Types>(_Args)...);
#else
else if (nodeType == OperationNameOf(ColumnElementTimesNode)) return New<ColumnElementTimesNode<ElemType>>(forward<_Types>(_Args)...);
@ -76,7 +76,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
else if (nodeType == OperationNameOf(ReconcileMBLayoutNode)) return New<ReconcileMBLayoutNode<ElemType>>(forward<_Types>(_Args)...);
else if (nodeType == OperationNameOf(RectifiedLinearNode)) return New<RectifiedLinearNode<ElemType>>(forward<_Types>(_Args)...);
else if (nodeType == OperationNameOf(ReshapeNode)) return New<ReshapeNode<ElemType>>(forward<_Types>(_Args)...);
#ifdef ENABLE_TENSORVIEW
#ifdef ENABLE_BROADCASTING_ELEMENTTIMES
else if (nodeType == L"RowElementTimes") return New<ElementTimesNode<ElemType>>(forward<_Types>(_Args)...);
#else
else if (nodeType == OperationNameOf(RowElementTimesNode)) return New<RowElementTimesNode<ElemType>>(forward<_Types>(_Args)...);
@ -85,7 +85,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
else if (nodeType == OperationNameOf(DiagonalNode)) return New<DiagonalNode<ElemType>>(forward<_Types>(_Args)...);
else if (nodeType == OperationNameOf(RowSliceNode)) return New<RowSliceNode<ElemType>>(forward<_Types>(_Args)...);
else if (nodeType == OperationNameOf(RowStackNode)) return New<RowStackNode<ElemType>>(forward<_Types>(_Args)...);
#ifdef ENABLE_TENSORVIEW
#ifdef ENABLE_BROADCASTING_ELEMENTTIMES
else if (nodeType == L"Scale") return New<ElementTimesNode<ElemType>>(forward<_Types>(_Args)...);
#else
else if (nodeType == OperationNameOf(ScaleNode)) return New<ScaleNode<ElemType>>(forward<_Types>(_Args)...);
@ -215,37 +215,26 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::CreateConvolutionNode(const std::wstring & nodeName,
const size_t kernelWidth, const size_t kernelHeight, const size_t outputChannels,
const size_t horizontalSubsample, const size_t verticalSubsample,
const bool zeroPadding,
ImageLayoutKind imageLayoutKind, const bool zeroPadding,
const size_t maxTempMemSizeInSamples)
{
return net.AddNodeToNetWithElemType(New<ConvolutionNode<ElemType>>(net.GetDeviceId(), nodeName,
kernelWidth, kernelHeight,
outputChannels,
horizontalSubsample,
verticalSubsample, zeroPadding,
maxTempMemSizeInSamples));
kernelWidth, kernelHeight, outputChannels,
horizontalSubsample, verticalSubsample, imageLayoutKind,
zeroPadding,
maxTempMemSizeInSamples));
}
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::CreateMaxPoolingNode(const std::wstring & nodeName,
const size_t windowWidth,
const size_t windowHeight,
const size_t horizontalSubsample,
const size_t verticalSubsample)
const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind)
{
return net.AddNodeToNetWithElemType(New<MaxPoolingNode<ElemType>>(net.GetDeviceId(), nodeName,
windowWidth, windowHeight,
horizontalSubsample,
verticalSubsample));
return net.AddNodeToNetWithElemType(New<MaxPoolingNode<ElemType>>(net.GetDeviceId(), nodeName, windowWidth, windowHeight, horizontalSubsample, verticalSubsample, imageLayoutKind));
}
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::CreateAveragePoolingNode(const std::wstring & nodeName, const size_t windowWidth,
const size_t windowHeight, const size_t horizontalSubsample,
const size_t verticalSubsample)
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::CreateAveragePoolingNode(const std::wstring & nodeName,
const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind)
{
return net.AddNodeToNetWithElemType(New<AveragePoolingNode<ElemType>>(net.GetDeviceId(), nodeName,
windowWidth, windowHeight,
horizontalSubsample,
verticalSubsample));
return net.AddNodeToNetWithElemType(New<AveragePoolingNode<ElemType>>(net.GetDeviceId(), nodeName, windowWidth, windowHeight, horizontalSubsample, verticalSubsample, imageLayoutKind));
}
// this is the catch-all for all cases not covered as special cases above
@ -274,49 +263,30 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::Convolution(const ComputationNodePtr weight,
const ComputationNodePtr inputValues,
const size_t kernelWidth,
const size_t kernelHeight,
const size_t outputChannels,
const size_t horizontalSubsample,
const size_t verticalSubsample,
const bool zeroPadding,
const std::wstring nodeName,
const size_t maxTempMemSizeInSamples)
const size_t kernelWidth, const size_t kernelHeight, const size_t outputChannels, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind, const bool zeroPadding, const size_t maxTempMemSizeInSamples,
const std::wstring nodeName)
{
return net.AddNodeToNetAndAttachInputs(New<ConvolutionNode<ElemType>>(net.GetDeviceId(), nodeName,
kernelWidth, kernelHeight,
outputChannels,
horizontalSubsample,
verticalSubsample, zeroPadding,
kernelWidth, kernelHeight, outputChannels, horizontalSubsample, verticalSubsample, imageLayoutKind, zeroPadding,
maxTempMemSizeInSamples),
weight, inputValues);
}
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::MaxPooling(const ComputationNodePtr inputValues,
const size_t windowWidth,
const size_t windowHeight,
const size_t horizontalSubsample,
const size_t verticalSubsample,
const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind,
const std::wstring nodeName)
{
return net.AddNodeToNetAndAttachInputs(New<MaxPoolingNode<ElemType>>(net.GetDeviceId(), nodeName,
windowWidth, windowHeight,
horizontalSubsample,
verticalSubsample),
windowWidth, windowHeight, horizontalSubsample, verticalSubsample, imageLayoutKind),
inputValues);
}
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::AveragePooling(const ComputationNodePtr inputValues,
const size_t windowWidth,
const size_t windowHeight,
const size_t horizontalSubsample,
const size_t verticalSubsample,
const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind,
const std::wstring nodeName)
{
return net.AddNodeToNetAndAttachInputs(New<AveragePoolingNode<ElemType>>(net.GetDeviceId(), nodeName,
windowWidth, windowHeight,
horizontalSubsample,
verticalSubsample),
windowWidth, windowHeight, horizontalSubsample, verticalSubsample, imageLayoutKind),
inputValues);
}
@ -486,7 +456,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return net.AddNodeToNetAndAttachInputs(New<SumElementsNode<ElemType>>(net.GetDeviceId(), nodeName), a);
}
#ifndef ENABLE_TENSORVIEW
#ifndef ENABLE_BROADCASTING_ELEMENTTIMES
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::Scale(const ComputationNodePtr scalar, const ComputationNodePtr matrix, const std::wstring nodeName)
{
return net.AddNodeToNetAndAttachInputs(New<ScaleNode<ElemType>>(net.GetDeviceId(), nodeName), scalar, matrix);
@ -513,7 +483,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return net.AddNodeToNetAndAttachInputs(New<ElementTimesNode<ElemType>>(net.GetDeviceId(), nodeName), a, b);
}
#ifndef ENABLE_TENSORVIEW
#ifndef ENABLE_BROADCASTING_ELEMENTTIMES
template<class ElemType> shared_ptr<ComputationNode<ElemType>> ComputationNetworkBuilder<ElemType>::RowElementTimes(const ComputationNodePtr a, const ComputationNodePtr b, const std::wstring nodeName)
{
return net.AddNodeToNetAndAttachInputs(New<RowElementTimesNode<ElemType>>(net.GetDeviceId(), nodeName), a, b);

32
Source/ComputationNetworkLib/ComputationNetworkBuilder.h
Просмотреть файл

@ -46,9 +46,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ComputationNodePtr CreateInputNode(const std::wstring & inputName, const TensorShape & imageLayout, const size_t numImages);
ComputationNodePtr CreateSparseInputNode(const std::wstring & inputName, const TensorShape & imageLayout, const size_t numImages);
ComputationNodePtr CreatePairNetworkNode(const std::wstring & inputName, const size_t rows, const size_t cols);
ComputationNodePtr CreateConvolutionNode(const std::wstring & nodeName, const size_t kernelWidth, const size_t kernelHeight, const size_t outputChannels, const size_t horizontalSubsample, const size_t verticalSubsample, const bool zeroPadding = false, const size_t maxTempMemSizeInSamples = 0);
ComputationNodePtr CreateMaxPoolingNode(const std::wstring & nodeName, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample);
ComputationNodePtr CreateAveragePoolingNode(const std::wstring & nodeName, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample);
ComputationNodePtr CreateConvolutionNode(const std::wstring & nodeName, const size_t kernelWidth, const size_t kernelHeight, const size_t outputChannels, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind, const bool zeroPadding = false, const size_t maxTempMemSizeInSamples = 0);
ComputationNodePtr CreateMaxPoolingNode(const std::wstring & nodeName, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind);
ComputationNodePtr CreateAveragePoolingNode(const std::wstring & nodeName, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind);
// this is the catch-all for all cases not covered as special cases above
// Unlike the specialized ones above, this one creates nodes by type given as a string.
ComputationNodePtr CreateComputationNode(const std::wstring & nodeType, const std::wstring & nodeName);
@ -61,25 +61,15 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ComputationNodePtr PairNetwork(const ComputationNodePtr & a, const std::wstring nodeName = L"");
ComputationNodePtr Convolution(const ComputationNodePtr weight,
const ComputationNodePtr inputValues,
const size_t kernelWidth,
const size_t kernelHeight,
const size_t outputChannels,
const size_t horizontalSubsample,
const size_t verticalSubsample,
const bool zeroPadding = false,
const std::wstring nodeName = L"",
const size_t maxTempMemSizeInSamples = 0);
const size_t kernelWidth, const size_t kernelHeight, const size_t outputChannels,
const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind,
const bool zeroPadding = false, const size_t maxTempMemSizeInSamples = 0,
const std::wstring nodeName = L"");
ComputationNodePtr MaxPooling(const ComputationNodePtr inputValues,
const size_t windowWidth,
const size_t windowHeight,
const size_t horizontalSubsample,
const size_t verticalSubsample,
const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind,
const std::wstring nodeName = L"");
ComputationNodePtr AveragePooling(const ComputationNodePtr inputValues,
const size_t windowWidth,
const size_t windowHeight,
const size_t horizontalSubsample,
const size_t verticalSubsample,
const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind,
const std::wstring nodeName = L"");
ComputationNodePtr ErrorPrediction(const ComputationNodePtr a, const ComputationNodePtr b, const std::wstring nodeName = L"");
ComputationNodePtr PerDimMeanVarNormalization(const ComputationNodePtr feature, const ComputationNodePtr mean, const ComputationNodePtr InvStdDev, const std::wstring nodeName = L"");
@ -111,14 +101,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ComputationNodePtr Hardmax(const ComputationNodePtr a, const std::wstring nodeName = L"");
ComputationNodePtr LogSoftmax(const ComputationNodePtr a, const std::wstring nodeName = L"");
ComputationNodePtr Sum(const ComputationNodePtr a, const std::wstring nodeName = L"");
#ifndef ENABLE_TENSORVIEW
#ifndef ENABLE_BROADCASTING_ELEMENTTIMES
ComputationNodePtr Scale(const ComputationNodePtr scalar, const ComputationNodePtr matrix, const std::wstring nodeName = L"");
#endif
ComputationNodePtr Transpose(const ComputationNodePtr matrix, const std::wstring nodeName = L"");
ComputationNodePtr Times(const ComputationNodePtr a, const ComputationNodePtr b, const std::wstring nodeName = L"");
ComputationNodePtr TransposeTimes(const ComputationNodePtr a, const ComputationNodePtr b, const std::wstring nodeName = L"");
ComputationNodePtr ElementTimes(const ComputationNodePtr a, const ComputationNodePtr b, const std::wstring nodeName = L"");
#ifndef ENABLE_TENSORVIEW
#ifndef ENABLE_BROADCASTING_ELEMENTTIMES
ComputationNodePtr RowElementTimes(const ComputationNodePtr a, const ComputationNodePtr b, const std::wstring nodeName = L"");
ComputationNodePtr ColumnElementTimes(const ComputationNodePtr a, const ComputationNodePtr b, const std::wstring nodeName = L"");
#endif

4
Source/ComputationNetworkLib/ComputationNetworkEvaluation.cpp
Просмотреть файл

@ -645,7 +645,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
vector<pair<size_t, size_t>> childDims;
for (auto & child : children)
childDims.push_back(child->GetDims());
auto imageLayouts = node->GetImageLayouts();
auto sampleLayout = node->GetSampleLayout();
// We do call validate(final) as many times as needed, since stuff may have changed underneath.
node->PrintSelfBeforeValidation();
node->Validate(isFinalValidationPass/*final*/); // all nodes have been visited: do verification instead of just inference
@ -663,7 +663,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
for (auto & child : children)
newChildDims.push_back(child->GetDims());
unchanged &= (childDims == newChildDims);
unchanged &= (imageLayouts == node->GetImageLayouts());
unchanged &= (sampleLayout == node->GetSampleLayout());
unchanged &= (needsGradient == node->m_needsGradient);
if (isFinalValidationPass && !unchanged)
LogicError("ValidateSubNetwork: %ls %ls operation changed during final validation.", node->NodeName().c_str(), node->OperationName().c_str());

122
Source/ComputationNetworkLib/ComputationNode.cpp
Просмотреть файл

@ -11,7 +11,13 @@
#include "ComputationNetworkBuilder.h" // TODO: We should only pull in NewComputationNodeFromConfig(). Nodes should not know about network at large.
#include "DataTensor.h"
namespace Microsoft { namespace MSR { namespace CNTK {
#ifndef let
#define let const auto
#endif
namespace Microsoft {
namespace MSR {
namespace CNTK {
using namespace std;
@ -50,8 +56,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
assert(m_inputs.size() == 1);
ComputationNodeBase::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
SetDims(m_inputs[0]);
InferImageDimsFromInputs();
SetDims(Input(0));
}
// binary zip operation, e.g. Plus
// If allowScaling then one can be a sub-dimension of the other (if layout then only for rows, otherwise for cols, too).
@ -67,6 +72,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
size_t rows1 = Input(1)->GetNumRows(), cols1 = Input(1)->GetNumCols();
#if 1//ndef ENABLE_TENSORVIEW
// TODO: This test will go away once we switch to full tensor lib.
if (isFinalValidationPass && !(
(rows0 == rows1 && (Input(0)->GetMBLayout() == Input(1)->GetMBLayout() || cols0 == cols1)) || // matching size (obvious case)
(allowMultiples && (rows0 == 1 || rows1 == 1) && (Input(0)->GetMBLayout() == Input(1)->GetMBLayout() || cols0 == cols1)) || // one is row vec
@ -75,9 +82,32 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
LogicError("The Matrix dimensions in the %ls %ls operation do not match.", NodeName().c_str(), OperationName().c_str());
}
#else
rows0; rows1;
#endif
SetDims(max(rows0, rows1), GetMBLayout() ? GetMBLayout()->GetNumCols() : max(cols0, cols1));
InferImageDimsFromInputs();
// result has tensor shape with dimensions being the max over both
let shape0 = GetInputSampleLayout(0);
let shape1 = GetInputSampleLayout(1);
SmallVector<size_t> dims = shape0.GetDims();
if (shape1.GetRank() > dims.size())
dims.resize(shape1.GetRank(), 1); // pad with ones
// If rank of [0] is higher than we only need to take max over rank [1].
// If rank of [1] is higher then we have padded to equal lentgh.
for (size_t k = 0; k < shape1.GetRank(); k++)
{
size_t dim1 = shape1[k];
if (dims[k] == 1) // is [0] broadcasting?
dims[k] = dim1; // then use dimension we broadcast to
else if (dim1 == 1) // if [1] is broadcasting
; // dims is already correct
else if (dim1 != dims[k]) // no broadcasting: they must match
InvalidArgument("%ls %ls operation: Input dimensions [%s] and [%s] are not compatible.",
NodeName().c_str(), OperationName().c_str(), string(shape0).c_str(), string(shape1).c_str());
}
SetDims(TensorShape(dims), GetMBLayout() ? GetMBLayout()->GetNumCols() : max(cols0, cols1));
}
// unary reduce-to-(1,1) operation, e.g. MatrixL1RegNode
void ComputationNodeBase::ValidateUnaryReduce(bool isFinalValidationPass)
@ -85,8 +115,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
assert(m_inputs.size() == 1);
ComputationNodeBase::Validate(isFinalValidationPass);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
SetDims(1, 1);
InferImageDimsFromInputs();
SetDims(TensorShape(1), 1);
}
// binary reduce-to-(1,1) operation, e.g. CrossEntropyWithSoftmaxNode
// Currently only called by criterion nodes.
@ -101,8 +130,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
!(Input(0)->GetNumRows() == Input(1)->GetNumRows() &&
(Input(0)->HasMBLayout() || (Input(0)->GetNumCols() == Input(1)->GetNumCols()))))
LogicError("The Matrix dimensions in the %ls %ls operation do not match.", NodeName().c_str(), OperationName().c_str());
SetDims(1, 1);
InferImageDimsFromInputs();
SetDims(TensorShape(1), 1);
}
// helper function for validation
// In bad cases of convolution, dimensions are quite complex to know.
@ -125,6 +153,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ValidateInferInputDims(index, rows, cols);
}
}
// BUGBUG: Change this to take a TensorShape.
template<class ElemType>
void ComputationNode<ElemType>::ValidateInferInputDims(size_t i, size_t rows, size_t cols) //override final
{
@ -132,10 +161,11 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
if (rows == 0 || cols == 0)
LogicError("ValidateInferInputDims: Inferred matrix must not be empty.");
Input(i)->SetDims(rows, cols);
Input(i)->SetDims(rows == Input(i)->GetNumRows() ? Input(i)->GetSampleLayout() : TensorShape(rows), cols);
// BUGBUG: This will loose tensor shape.
Input(i)->Validate(true); // validate it properly
// BUGBUG: ^^ Validate() calls are under the control of ValidateSubNetwork(). E.g. it checks whether something has changed & re-validates until there is no change. If we validate here, the change goes unnoticed.
// big BUGBUG: This should do random initialization.
// big BUGBUG: This should do random initialization as requested by user in the first place.
Input(i)->Value().SetValue(0);
fprintf(stderr, "ValidateInferInputDims: %ls %ls operation inferred, resized to (%d x %d), and (incorrectly) initialized to 0.\n", Input(i)->NodeName().c_str(), Input(i)->OperationName().c_str(), (int)rows, (int)cols);
}
@ -145,10 +175,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// tensor helpers
// -----------------------------------------------------------------------
// BUGBUG: Currently does not interpret actual ImageLayouts or convolutional models.
TensorShape ComputationNodeBase::GetSampleShape() const
const TensorShape & ComputationNodeBase::GetAndValidateSampleLayout() const
{
// BUGBUG: sample layouts are not fully consistent (are they?), so we only use them if plausible
// validate that m_sampleLayout is plausibly configured
bool layoutPlausible = true;
// some code initializes it to 0 or SIZE_MAX
for (size_t k = 0; k < m_sampleLayout.GetRank() && layoutPlausible; k++)
@ -156,20 +185,15 @@ namespace Microsoft { namespace MSR { namespace CNTK {
if (m_sampleLayout.GetDim(k) == 0 || m_sampleLayout.GetDim(k) == SIZE_MAX)
layoutPlausible = false;
}
// some code initializes it to (1,1,rowDim)
if (m_sampleLayout.GetRank() == 3 && m_sampleLayout.GetDim(0) == 1 && m_sampleLayout.GetDim(1) == 1)
layoutPlausible = false;
// check dimension
if (m_numRows != m_sampleLayout.GetNumElements())
if (GetNumRows() != m_sampleLayout.GetNumElements())
layoutPlausible = false;
if (layoutPlausible) // layout looks like it's OK: return it --TODO: always just rely on m_sampleLayout
return m_sampleLayout;
else if (HasMBLayout()) // if we have a layout, that dimension is not part of the sample shape
return TensorShape(GetNumRows());
else if (GetNumCols() == 1) // 1-column matrix is a vector
return TensorShape(GetNumRows());
else
return TensorShape(GetNumRows(), GetNumCols());
if (!layoutPlausible) // layout looks like it's OK: return it --TODO: always just rely on m_sampleLayout
LogicError("GetAndValidateSampleLayout: %ls %ls operation has sample layout [%s] that is inconsistent with number of rows %d.",
NodeName().c_str(), OperationName().c_str(), string(m_sampleLayout).c_str(), (int)GetNumRows());
// all good: return it
return GetSampleLayout();
}
// determine the sample tensor dimension to use for operations based on output and all inputs
@ -177,10 +201,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t ComputationNodeBase::DetermineElementwiseTensorRank() const
{
// determine largest tensor dimension amongst the sample shapes of output and the selected inputs
size_t maxRank = GetSampleShape().GetRank();
size_t maxRank = GetAndValidateSampleLayout().GetRank();
for (size_t i = 0; i < GetNumInputs(); i++)
{
size_t rank = Input(i)->GetSampleShape().GetRank();
size_t rank = Input(i)->GetAndValidateSampleLayout().GetRank();
if (!HasMBLayout()) // no MBLayout: last dim is column dimension
rank++;
if (maxRank < rank)
maxRank = rank;
}
@ -188,36 +214,29 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
// determine the full tensor dimension including padding and multiple samples (MBLayout)
// but without trailing ones (assuming they will be auto-padded by the tensor op)
TensorShape ComputationNodeBase::GetTensorShape(size_t rank, const FrameRange & fr) const
{
if (!HasMBLayout()) // no MBLayout: just return sample layout (if other participants have layout, tensor lib will broadcast)
return GetSampleShape().Pad(rank);
//GetAndValidateSampleLayout(); // no need to validate because rank comes from DetermineElementwiseTensorRank() which validates all
if (!HasMBLayout())
return GetSampleLayout().Append(GetSampleLayout().GetRank(), GetNumCols()); // last dim is column dimension
// TODO: This is not nice! Instead, of no MBLayout then have sample layout explain whole matrix.
else if (fr.IsAllFrames())
{
// we have an MBLayout, and for refers to the entire MB
return GetSampleLayout().Append(rank, GetMBLayout()->GetNumCols());
}
//else if (fr.Sequence != SIZE_MAX) // needs a slice and a two-dim tensor
//{
// return GetAndValidateSampleLayout(); // .Append(rank, 1); // no need to append ones
//}
else
{
// we have an MBLayout: append its dimensions to the tensor shape
auto sm = TensorShape(GetNumParallelSequences(), fr.IsAllFrames() ? GetNumTimeSteps() : 1);
// TODO: Can FrameRange ever refer to multiple time steps?
return GetSampleShape().Pad(rank).Concat(sm);
// we have an MBLayout, and fr refers to one frame (across all parallel sequences)
return GetSampleLayout().Append(rank, GetMBLayout()->GetNumParallelSequences());
}
}
template<class ElemType>
std::vector<TensorView<ElemType>> ComputationNode<ElemType>::GetTensorsForwardBinary(const FrameRange & fr)
{
const size_t N = 3; // 2 inputs and 1 output
// perform operation
std::vector<TensorView<ElemType>> tensors;
size_t rank = DetermineElementwiseTensorRank();
for (size_t i = 0; i < N; i++)
{
auto * node = i < N - 1 ? Input(i).get() : this; // output is ourselves
auto slice = node->ValueFor(i < N - 1 ? fr.AllowBroadcast() : fr);
auto shape = node->GetTensorShape(rank, fr);
tensors.push_back(TensorView<ElemType>(slice, shape));
}
return tensors;
}
// -----------------------------------------------------------------------
// others
// -----------------------------------------------------------------------
@ -286,6 +305,7 @@ namespace Microsoft { namespace MSR { namespace ScriptableObjects {
static TensorShape TensorShapeFromConfig(const IConfigRecord & config)
{
const auto & valp = config[L"dims"];
// TODO: Add code that if input is already a tensor shape it is also OK.
if (valp.Is<ConfigArray>())
return TensorShape(valp.AsRef<ConfigArray>().AsVector<size_t>([&](const wstring & msg){ valp.Fail(msg); }));
else

175
Source/ComputationNetworkLib/ComputationNode.h
Просмотреть файл

@ -26,12 +26,13 @@
#include <sstream>
#include <iostream>
// #define ENABLE_TENSORVIEW // flip this switch once the tensor lib is confirmed to be working
// remove these following two #defines once the tensor lib works
#define ENABLE_TENSORVIEW // if set then tensor lib is used instead of old Matrix implementations, wherever such an implementation exists
#define ENABLE_BROADCASTING_ELEMENTTIMES // if set then ScaleNode and Row/ColumnElementTimes are redirected to ElementTimes
//#define RNN_DEBUG 1
#define DEFAULT_HIDDEN_ACTIVATION 0.1
#pragma warning (disable: 4267)
#pragma warning (disable: 4267) // conversion from size_t to int or other types
// version number to control how to read and write
#define CNTK_MODEL_VERSION_1 1
@ -97,7 +98,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// Default implementations are in ComputationNodeBase or ComputationNode<ElemType>.
virtual void Validate(bool isFinalValidationPass) = 0; // main base validation function
virtual void InferImageDimsFromInputs() = 0;
virtual void Save(File& fstream) const = 0;
virtual void Load(File& /*fstream*/, size_t /*modelVersion*/) = 0;
virtual void CopyTo(ComputationNodeBasePtr node, const std::wstring& newName, const CopyNodeFlags flags) const = 0;
@ -267,7 +267,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
node->m_parameterUpdateRequired = m_parameterUpdateRequired;
node->m_nodeName = newName;
node->m_inputSampleLayout = m_inputSampleLayout;
node->m_sampleLayout = m_sampleLayout;
ComputationNetworkOwnedNodeState::CopyTo(*node);
@ -293,7 +292,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// dimensions
size_t GetNumRows() const { return m_numRows; }
size_t GetNumRows() const { assert(m_numRows == m_sampleLayout.GetAllocation()); return m_numRows; }
size_t GetNumCols() const { return m_numCols; }
pair<size_t, size_t> GetDims() { return make_pair(GetNumRows(), GetNumCols()); }
// TODO: add an overload SetDims(TensorShape, cols)
@ -302,30 +301,37 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// - LearnableParameterNode (init, load)
// - InputValue (init, load)
// - DelayedValueNodeBase (Init())
// only changes col dim:
// - ResizeAllFeatureNodes()
// use a different name for these:
// - ReshapeNode::UpdateFunctionMBSize() --??
// - various unit tests
// - ComputationNetwork::FixupInputMinibatchSize()
// deprecated ones:
// - TimeReverseNode (first step--deprecate and/or move to UpdateMB... function)
// - StrideTimesNode
// - PairNetworkNode
// - LSTMNode
// - MultiNetworks-
void SetDims(size_t rows, size_t cols)
{
m_numRows = rows;
m_numCols = cols;
// actual memory allocation happens elsewhere
}
void SetDims(ComputationNodeBasePtr node) { SetDims(node->GetNumRows(), node->GetNumCols()); }
// set our dimensions (rows, cols, sample layout)
// TODO: Separate SetDims() into version with and without MBLayout.
void SetDims(const TensorShape & sampleLayout, size_t cols)
{
m_sampleLayout = sampleLayout;
m_numRows = m_sampleLayout.GetNumElements();
m_numCols = cols;
}
// copy dimensions (rows, cols, sample layout) from another node
void SetDims(const ComputationNodeBasePtr & node)
{
SetDims(node->GetSampleLayout(), node->GetNumCols());
}
// use this only for testing code. Everywhere else, be explicit on the TensorShape.
void SetDims1(size_t rows, size_t cols)
{
SetDims(TensorShape(rows), cols);
}
// update number of columns (in response to MB size)
void SetNumCols(size_t cols)
{
m_numCols = cols;
// actual memory allocation happens elsewhere
}
virtual void NotifyFunctionValuesMBSizeModified() { } // someone outside changed our m_value--update our internal state, e.g. m_numRows, m_numCols
void VerifyDims(size_t rows, size_t cols)
{
@ -340,11 +346,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void VerifyDimsMatch() const = 0; // verify that m_value dimensions match ours
const TensorShape & GetSampleLayout() const { return m_sampleLayout; }
bool HasSampleLayout() const { return m_sampleLayout.GetRank() != 1; } // meaning does it have a layout that is not just a vector
protected:
// TODO: There are temporarily two confusing functions; either unify them, or name them better:
// - GetSampleLayout() just reads out m_sampleLayout, which is the layout of matrix coluns
// - GetSampleShape() makes up a sample layout in case of a bad m_sampleLayout, and includes columns in case of no MBLayout
TensorShape GetSampleShape() const; // TODO: Once numRows is consistent with m_sampleLayout, this will go away
// TODO: There are temporarily a second version of GetSampleLayout() that verifies that m_sampleLayout is consistent with matrix dims
const TensorShape & GetAndValidateSampleLayout() const; // TODO: Once numRows is consistent with m_sampleLayout, this will go away
size_t DetermineElementwiseTensorRank() const;
public:
TensorShape GetTensorShape(size_t dims, const FrameRange & fr) const;
@ -416,7 +421,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
const std::vector<ComputationNodeBasePtr> & GetInputs() const { return m_inputs; }
ComputationNodeBasePtr Input(size_t index) const { return m_inputs[index]; } // TODO: delete this; change to m_inputs
const ComputationNodeBasePtr & Input(size_t index) const { return m_inputs[index]; }
//return true if the node's value should be computed before the normal training. e.g., mean and invStd of input features.
virtual bool /*IComputationNode::*/RequiresPreCompute() const { return false; }
@ -439,7 +444,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
void LinkToMBLayout(MBLayoutPtr pMBLayout) { m_pMBLayout = pMBLayout; }
MBLayoutPtr GetMBLayout() { return m_pMBLayout; }
//MBLayoutPtr GetMBLayout() { return m_pMBLayout; }
const MBLayoutPtr & GetMBLayout() const { return m_pMBLayout; }
bool HasMBLayout() const { return !!m_pMBLayout; }
std::wstring GetName() const { return m_nodeName; }
@ -498,9 +504,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
const char * mbSizeMark = child->m_pMBLayout ? "MBSize " : "";
if (child->m_sampleLayout.GetRank() == 3 && (child->m_sampleLayout.GetWidth() != 1 || child->m_sampleLayout.GetNumChannels() != 1)) // looks like an image: use WHC notation
fprintf(stderr, "%ls[%lu {W=%lu, H=%lu, C=%lu}, %s%lu]", child->NodeName().c_str(), child->GetNumRows(),
child->m_sampleLayout.GetWidth(), child->m_sampleLayout.GetHeight(), child->m_sampleLayout.GetNumChannels(), mbSizeMark, child->GetNumCols());
if (child->m_sampleLayout.GetRank() == 3 && (child->m_sampleLayout[1] != 1 || child->m_sampleLayout[0] != 1)) // looks like an image: use WHC notation
fprintf(stderr, "%ls[%lu [%s] {W=%lu, H=%lu, C=%lu}, %s%lu]", child->NodeName().c_str(), child->GetNumRows(), string(child->m_sampleLayout).c_str(),
child->m_sampleLayout[1], child->m_sampleLayout[2], child->m_sampleLayout[0], mbSizeMark, child->GetNumCols());
//BUGBUG: This ^^ will print based on the old legacy layout, and we have no way of knowing here whether that is correct.
else if (child->m_sampleLayout.GetRank() > 1) // tensor: output the tensor dimensions --TODO: there will be no numRows in the future, only the tensor
fprintf(stderr, "%ls[%lu [%s], %s%lu]", child->NodeName().c_str(), child->GetNumRows(), string(child->m_sampleLayout).c_str(), mbSizeMark, child->GetNumCols());
else
@ -535,26 +542,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return !g_shareNodeValueMatrices || m_outputNeededDuringBackprop;
}
virtual void /*IComputationNode::*/InferImageDimsFromInputs()
{
if (!IsLeaf())
InferImageDimsFromInput(0); //copy from child 0 by default.
}
virtual void ValidateInferInputDims(size_t i, size_t rows, size_t cols) = 0;
// TODO: Remove this.
// used from:
// - Plus/Minus/ElementTimesNode --> replace by max dim over inputs. Make this standard behavior for all binary element-wise ops.
bool IsInputAnImage(const size_t index) const
{
return m_inputs[index]->m_sampleLayout.IsInputAnImage();
}
const TensorShape & GetImageLayout() const { return m_sampleLayout; }
pair<TensorShape, TensorShape> GetImageLayouts() const { return make_pair(m_inputSampleLayout, m_sampleLayout); } // helper for Validate()
const size_t GetNumInputs() const { return m_inputs.size(); }
virtual void SetInput(const size_t childIndex, const ComputationNodeBasePtr& node) = 0;
@ -611,18 +598,15 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return true;
}
public:
virtual void ValidateInferInputDims(size_t i, size_t rows, size_t cols) = 0;
protected:
void InferImageDimsFromInput(const size_t index, const bool outputSameAsInput = true)
const TensorShape & GetInputSampleLayout(const size_t index) const
{
if (index >= GetNumInputs())
InvalidArgument("InferImageDimsFromInput: output index");
const auto & child = m_inputs[index];
if (child != nullptr)
m_inputSampleLayout = child->m_sampleLayout;
if (outputSameAsInput)
m_sampleLayout = m_inputSampleLayout;
return m_inputs[index]->GetSampleLayout();
}
void InferMBLayoutFromInputsForStandardCase();
@ -783,9 +767,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
TensorShape m_sampleLayout; // and the output
MBLayoutPtr m_pMBLayout;
TensorShape m_inputSampleLayout; // how to interpret each column in the input as an image
// TODO: Why is the input layout not just the layout of the input node?
// flags related to gradient propagation
bool m_parameterUpdateRequired; // update parameters? Only used for LearnableParameters. --TODO: Should we make this a member of LearnableParameters actually? And require a type cast? Currently it is read out for all leaves.
bool m_gradientInitialized; // indicates whether the gradient matrix has been resized and initialized to 0
@ -839,8 +820,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
CreateMatrixIfNull(m_value);
fstream >> Value();
// above reads dimensions, so we must update our own m_numRows/m_numCols
m_numRows = Value().GetNumRows();
m_numCols = Value().GetNumCols();
SetDims(TensorShape(Value().GetNumRows()), Value().GetNumCols());
// BUGBUG: This looses the sample layout (tensor shape). The caller must know this and fix it up if needed (currently needed for LearnableParameterNode).
}
// reader updated m_functionValue--update our internal state, i.e. m_numCols
@ -983,7 +964,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return result;
}
// update size (#columns) of node to match MBLayout
// update size (m_numCols) of node to match MBLayout (but does not do the actual Resize())
// This must be called right before ForwardProp() the first time for a given minibatch.
// Currently overridden by
// - InputValue, which verifies instead of resizing (since Resize() is specified to be destructive, it should not call it).
@ -995,7 +976,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void UpdateFunctionMBSize() override
{
if (m_pMBLayout) // if no layout, this node contains parameters independent of MB size, don't resize
SetDims(GetNumRows(), m_pMBLayout->GetNumCols());
SetNumCols(m_pMBLayout->GetNumCols());
}
virtual void VerifyDimsMatch() const override final
{
@ -1113,9 +1094,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
const Matrix<ElemType>& Gradient() const { return *m_gradient; }
Matrix<ElemType>& Gradient() { return *m_gradient; }
protected:
std::vector<TensorView<ElemType>> GetTensorsForwardBinary(const FrameRange & fr);
public:
// Function to return the number of columns for whole batch or single frame
size_t GetNumColsFor(const FrameRange & fr/*select frame or entire batch*/)
@ -1164,6 +1142,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return GradientFor(fr);
}
// tensor variants
TensorView<ElemType> DataTensorFor(Matrix<ElemType> & data, size_t rank, const FrameRange & fr)
{
return TensorView<ElemType>(DataFor(data, fr), GetTensorShape(rank, fr));
}
TensorView<ElemType> ValueTensorFor(size_t rank, const FrameRange & fr)
{
return TensorView<ElemType>(ValueFor(fr), GetTensorShape(rank, fr));
@ -1187,7 +1169,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
Base::BeginForwardProp();
// update dimensions based on MB size
// update m_numCols based on MB size
UpdateFunctionMBSize();
// update the actual m_value allocation
@ -1472,7 +1454,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// TODO: There are too many of these. This indicates improper class hierarchies.
virtual ComputationNodeBase * NewThis(DEVICEID_TYPE deviceId, const wstring & name) override { NOT_IMPLEMENTED; }
virtual void Validate(bool isFinalValidationPass) override { NOT_IMPLEMENTED; } // main base validation function
virtual void InferImageDimsFromInputs() override { NOT_IMPLEMENTED; }
virtual void Save(File& fstream) const override { NOT_IMPLEMENTED; }
virtual void Load(File& /*fstream*/, size_t /*modelVersion*/) override { NOT_IMPLEMENTED; }
virtual void CopyTo(ComputationNodeBasePtr node, const std::wstring& newName, const CopyNodeFlags flags) const override { NOT_IMPLEMENTED; }
@ -1541,26 +1522,26 @@ namespace Microsoft { namespace MSR { namespace CNTK {
#define UsingComputationNodeMembers /*without OperationName; needed to support inconsistent pattern of InputValue--TODO: This comment it out of date. */ \
protected: \
typedef shared_ptr<ComputationNode<ElemType>> ComputationNodePtr; \
using Base::m_deviceId; using Base::SetDims; using Base::GetNumRows; using Base::GetNumCols; using Base::UpdateFunctionValuesSize; using Base::LoadValue; \
using Base::m_deviceId; using Base::GetDeviceId; using Base::SetDims; using Base::SetDims1; using Base::SetNumCols; using Base::GetNumRows; using Base::GetNumCols; using Base::UpdateFunctionValuesSize; using Base::LoadValue; \
using Base::m_pMBLayout; using Base::GetNumTimeSteps; using Base::GetNumParallelSequences; \
using Base::MaskMissingColumnsToZero; using Base::MaskMissingValueColumnsToZero; using Base::MaskMissingGradientColumnsToZero; using Base::InvalidateMissingValueColumns; using Base::InvalidateMissingGradientColumns; \
using Base::DataFor; using Base::ValueFor; using Base::Gradient; using Base::GradientFor; \
using Base::MaskedValueFor; using Base::MaskedGradientFor; using Base::ValueTensorFor; using Base::GradientTensorFor; \
using Base::MaskedValueFor; using Base::MaskedGradientFor; using Base::DataTensorFor; using Base::ValueTensorFor; using Base::GradientTensorFor; \
using Base::ForwardProp; using Base::BackpropTo; \
using Base::m_inputs; using Base::m_value; using Base::m_gradient; \
using Base::m_inputSampleLayout; using Base::m_sampleLayout; \
using Base::m_sampleLayout; \
using Base::m_parameterUpdateRequired; using Base::m_nodeName; \
using Base::CreateMatrixIfNull; using Base::RequestMatrixFromPool; using Base::ReleaseMatrixToPool; \
using Base::CreateUniqId; \
using Base::GetNumInputs; using Base::ZeroGradientsOfInputs; using Base::VerifyDims; \
using Base::ConstOnes; \
using Base::GetTensorsForwardBinary; using Base::DetermineElementwiseTensorRank; \
using Base::GetImageLayout; using Base::InferImageDimsFromInput; using Base::InferImageDimsFromInputs; using Base::InferMBLayoutFromInputsForStandardCase; \
using Base::DetermineElementwiseTensorRank; \
using Base::GetSampleLayout; using Base::GetInputSampleLayout; using Base::InferMBLayoutFromInputsForStandardCase; \
using Base::CopyTo; using Base::CreateUniqNodeName; using Base::DetachInputs; using Base::GetInputsFromConfig; \
using Base::DumpNodeInfo; using Base::EnumerateNodes; \
using Base::HasMBLayout; using Base::GetMBLayout; using Base::LinkToMBLayout; \
using Base::Input; using Base::SetInput; \
using Base::IsInputAnImage; using Base::IsEqualTo; using Base::IsOutputOlderThanInputs; using Base::IsLeaf; using Base::SetParameterUpdateRequired; \
using Base::IsEqualTo; using Base::IsOutputOlderThanInputs; using Base::IsLeaf; using Base::SetParameterUpdateRequired; \
using Base::Load; \
using Base::PrintNodeValuesToFile; using Base::PrintSelfBeforeValidation; \
using Base::Save; using Base::UpdateFunctionMBSize; \
@ -1571,7 +1552,7 @@ protected: \
public: \
using Base::RequiresPreCompute; \
using Base::AttachInputs; using Base::CreateGradientMatrixIfNull; using Base::NodeName; \
using Base::Value; using Base::GetTensorShape;
using Base::Value;
#define ComputationNodeBoilerplate \
protected: /* some boilerplate goes here */ \
@ -1585,6 +1566,31 @@ protected: /* some boilerplate goes here */ \
// a few standard base classes for N-nary operations
// =======================================================================
// -----------------------------------------------------------------------
// UnaryElementWiseNode (operand)
//
// unary elementwise operations that are implemented with the tensor lib
//
// Derived clases only need to override ForwardProp() and BackpropTo().
// -----------------------------------------------------------------------
template<class ElemType>
class UnaryElementWiseNode : public ComputationNode<ElemType>, public NumInputs<1>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembers;
public:
UnaryElementWiseNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
ValidateUnaryMap(isFinalValidationPass);
}
};
#define UsingUnaryElementwiseNodeBaseMembers UsingComputationNodeMembersBoilerplate;
// -----------------------------------------------------------------------
// BinaryElementWiseNode (operand1, operand2)
//
@ -1613,13 +1619,9 @@ protected: /* some boilerplate goes here */ \
#endif
}
virtual bool InputUsedInComputingInputNodesGradients(size_t childIndex) const override
{
// By default, the BinaryElementWiseNode does not require any of it's input's values for computing
// the gradients of its input nodes
UNREFERENCED_PARAMETER(childIndex);
return false;
}
// By default, the BinaryElementWiseNode does not require any of it's input's values for computing
// the gradients of its input nodes
virtual bool InputUsedInComputingInputNodesGradients(size_t /*childIndex*/) const override { return false; }
virtual void /*IComputationNode::*/BeginForwardProp() override // called before first iteration step of ForwardProp()
{
@ -1633,15 +1635,6 @@ protected: /* some boilerplate goes here */ \
{
ValidateBinaryZip(isFinalValidationPass, true/*allowMultiples*/);
}
virtual void InferImageDimsFromInputs()
{
// TODO: change to infer as maximum of the two
if (IsInputAnImage(0))
InferImageDimsFromInput(0);
else
InferImageDimsFromInput(1);
}
};
#define UsingBinaryElementwiseNodeBaseMembers UsingComputationNodeMembersBoilerplate;

320
Source/ComputationNetworkLib/ConvolutionalNodes.h
Просмотреть файл

@ -30,9 +30,32 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// ConvolutionNode (convolutionWeights, inputFeature)
// -----------------------------------------------------------------------
// convolutional network
// This follows "high performance convolutional neural networks for document processing" by Kumar Chellapilla, Sidde Puri, and Patrice Simard.
// Each sample is stored as a column-major matrix (height, width) of float[numChannels] (r00, g00, b00, r10, g10, b10, r01, g01, b01, r11, g11, b11).
// Convolutions (incl. pooling) support two different storage formats:
// BUGBUG: These are currently hard-selected depending on circumstances, without being reflected in TensoShape.
//
// * legacy mode (CPU and GPU without cudnn): Channels are tuples of scalars
//
// This follows "high performance convolutional neural networks for document processing" by Kumar Chellapilla, Sidde Puri, and Patrice Simard.
// Each sample is stored as a column-major matrix (height, width) of float[numChannels] (r00, g00, b00, r10, g10, b10, r01, g01, b01, r11, g11, b11).
//
// - input : [C x W x H x T] or ARRAY[1..T] OF ARRAY[1..H] OF ARRAY[1..W] OF ARRAY[1..C]
// - output : [C' x W' x H' x T] or ARRAY[1..T] OF ARRAY[1..H'] OF ARRAY[1..W'] OF ARRAY[1..C']
// - filter : [C' x W" x H" x C ] or ARRAY[1..C] OF ARRAY[1..H"] OF ARRAY[1..W"] OF ARRAY[1..C']
//
// * GPU with cudnn: Channels are planes
//
// - input : [W x H x C x T] or ARRAY[1..T] OF ARRAY[1..C] OF ARRAY[1..H] OF ARRAY[1..W]
// - output : [W' x H' x C' x T] or ARRAY[1..T] OF ARRAY[1..C'] OF ARRAY[1..H'] OF ARRAY[1..W']
// - filter : [W" x H" x C x C' ] or ARRAY[1..C'] OF ARRAY[1..C] OF ARRAY[1..H] OF ARRAY[1..W]
//
// where:
// - using ' for output and " for filter
// - T = samples (NVidia calls this N)
// - W, H = width, height (W', H' for output, W", H" for kernel)
// - C = input channels
// - 3 for color images, 1 for B&W images
// - for hidden layer: dimension of activation vector for each pixel
// - C' = output channels = dimension of activation vector for each pixel (also called N by NVidia, inconsistently)
template<class ElemType>
class ConvolutionNode : public ComputationNode<ElemType>, public NumInputs<2>
{
@ -44,22 +67,26 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_kernelWidth(SIZE_MAX), m_kernelHeight(SIZE_MAX),
// initialize to dummy values so we catch missing initialization
m_horizontalSubsample(SIZE_MAX), m_verticalSubsample(SIZE_MAX),
m_zeroPadding(false), m_maxTempMemSizeInSamples(SIZE_MAX)
m_zeroPadding(false), m_maxTempMemSizeInSamples(SIZE_MAX),
m_imageLayoutKind(ImageLayoutKind::HWC)
{
m_sampleLayout = ImageLayoutWHC(1, 1, 0); // TODO: what is this magic #channels == 0? Can this even be initialized at this time, or only inferred?
SetDims(ImageDimensions::AsTensorShape(1, 1, 0, m_imageLayoutKind), 0);
}
ConvolutionNode(DEVICEID_TYPE deviceId, const wstring & name, const size_t kernelWidth, const size_t kernelHeight, const size_t outputChannels, const size_t horizontalSubsample, const size_t verticalSubsample, const bool zeroPadding = false, const size_t maxTempMemSizeInSamples = 0) :
ConvolutionNode(DEVICEID_TYPE deviceId, const wstring & name, const size_t kernelWidth, const size_t kernelHeight, const size_t outputChannels, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind,
const bool zeroPadding = false, const size_t maxTempMemSizeInSamples = 0) :
Base(deviceId, name),
m_outputChannels(outputChannels),
m_kernelWidth(kernelWidth), m_kernelHeight(kernelHeight),
m_horizontalSubsample(horizontalSubsample), m_verticalSubsample(verticalSubsample),
m_zeroPadding(zeroPadding), m_maxTempMemSizeInSamples(maxTempMemSizeInSamples)
m_zeroPadding(zeroPadding), m_maxTempMemSizeInSamples(maxTempMemSizeInSamples),
m_imageLayoutKind(imageLayoutKind)
{
m_sampleLayout = ImageLayoutWHC(1, 1, outputChannels);
m_factory = ConvolutionEngineFactory<ElemType>::Create(deviceId);
SetDims(ImageDimensions::AsTensorShape(1, 1, m_outputChannels, m_imageLayoutKind), 0); // TODO: necessary?
m_factory = ConvolutionEngineFactory<ElemType>::Create(GetDeviceId(), ConvolutionEngineFactory<ElemType>::EngineType::Auto, m_imageLayoutKind);
}
ConvolutionNode(const ScriptableObjects::IConfigRecordPtr configp) :
ConvolutionNode(configp->Get(L"deviceId"), L"<placeholder>", configp->Get(L"kernelWidth"), configp->Get(L"kernelHeight"), configp->Get(L"outputChannels"),
configp->Get(L"horizontalSubsample"), configp->Get(L"verticalSubsample"),
configp->Get(L"horizontalSubsample"), configp->Get(L"verticalSubsample"), ImageLayoutKindFrom(configp->Get(L"imageLayout")),
configp->Get(L"zeroPadding"), configp->Get(L"maxTempMemSizeInSamples"))
{
// weightNodeName, inputValueNodeName, kernelWidth, kernelHeight, outputChannels, horizontalSubsample, verticalSubsample, zeroPadding = false, maxTempMemSizeInSamples = 0
@ -69,19 +96,24 @@ namespace Microsoft { namespace MSR { namespace CNTK {
void Save(File& fstream) const override
{
Base::Save(fstream);
fstream << m_kernelWidth << m_kernelHeight << m_horizontalSubsample << m_verticalSubsample;
fstream << m_sampleLayout.GetNumChannels();
fstream << m_kernelWidth << m_kernelHeight << m_horizontalSubsample << m_verticalSubsample;
uint32_t imageLayoutKind = (uint32_t)m_imageLayoutKind;
uint32_t outputChannels = (uint32_t)m_outputChannels;
fstream << imageLayoutKind << outputChannels;
fstream << m_zeroPadding << m_maxTempMemSizeInSamples;
}
void Load(File& fstream, size_t modelVersion) override
{
Base::Load(fstream, modelVersion);
fstream >> m_kernelWidth >> m_kernelHeight >> m_horizontalSubsample >> m_verticalSubsample;
size_t outputChannels;
fstream >> outputChannels;
m_sampleLayout = ImageLayoutWHC(1, 1, outputChannels);
fstream >> m_kernelWidth >> m_kernelHeight >> m_horizontalSubsample >> m_verticalSubsample;
uint32_t imageLayoutKind, outputChannels;
fstream >> imageLayoutKind >> outputChannels;
m_imageLayoutKind = (ImageLayoutKind) imageLayoutKind;
m_outputChannels = outputChannels;
SetDims(ImageDimensions::AsTensorShape(1, 1, m_outputChannels, m_imageLayoutKind), 0); // TODO: needed?
fstream >> m_zeroPadding >> m_maxTempMemSizeInSamples;
m_factory = ConvolutionEngineFactory<ElemType>::Create(GetDeviceId(), ConvolutionEngineFactory<ElemType>::EngineType::Auto, m_imageLayoutKind);
}
void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
@ -100,6 +132,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
node->m_maxTempMemSizeInSamples = m_maxTempMemSizeInSamples;
node->m_imageLayoutKind = m_imageLayoutKind;
*node->m_tempMatrix = *m_tempMatrix;
}
}
@ -113,12 +147,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_inT->setN(batchSize);
m_outT->setN(batchSize);
assert(m_convEng != nullptr);
if (inputIndex == 0) //derivative with respect to the weight matrix
if (inputIndex == 0) // derivative with respect to the weight matrix
{
Matrix<ElemType>& grad = Input(0)->Gradient();
m_convEng->BackwardFilter(*m_outT, sliceOutputGrad, *m_inT, sliceInput1Value, *m_convDesc, *m_filterT, grad, fr.IsAllFrames(), *m_tempMatrix);
}
else if (inputIndex == 1) // derivative with respect to the input feature
else if (inputIndex == 1) // derivative with respect to the input feature
{
const Matrix<ElemType>& input0 = Input(0)->Value();
Matrix<ElemType> sliceInput1Grad = Input(1)->GradientFor(fr);
@ -139,7 +173,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
Matrix<ElemType> sliceInput1Value = Input(1)->ValueFor(fr);
Matrix<ElemType> sliceOutputValue = ValueFor(fr);
// REVIEW alexeyk: setting batch size, can it be done elsewhere in a single place?
// update the tensor dimension w.r.t. number of samples
size_t batchSize = sliceInput1Value.GetNumCols();
m_inT->setN(batchSize);
m_outT->setN(batchSize);
@ -154,6 +188,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
#endif
}
// BUGBUG: Should not be here. Use PlusNode and m_sampleLayout. TODO: Bad naming:'output' is actually an 'input'
void AddBias(const Matrix<ElemType>& output, const Matrix<ElemType>& bias, Matrix<ElemType>& dst)
{
assert(m_convEng != nullptr);
@ -170,86 +205,79 @@ namespace Microsoft { namespace MSR { namespace CNTK {
void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
if (m_horizontalSubsample > m_kernelWidth || m_verticalSubsample > m_kernelHeight)
InvalidArgument("In ConvolutionNode horizontalSubsample must <= kernelWidth and verticalSubsample must <= kernelHeight.");
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
size_t weightCols = m_kernelWidth * m_kernelHeight * m_inputSampleLayout.GetNumChannels();
// get input and output tensor shape and interpret as image dimensions
auto inDims = ImageDimensions(GetInputSampleLayout(1), m_imageLayoutKind);
if (inDims.m_width < m_kernelWidth || inDims.m_height < m_kernelHeight)
InvalidArgument("%ls %ls operation requires that input width be >= kernelWidth and input height >= kernelHeight.", NodeName().c_str(), OperationName().c_str());
// determine output tensor shape
const int kernelWidthCenter = m_zeroPadding ? m_kernelWidth % 2 : m_kernelWidth;
const int kernelHeightCenter = m_zeroPadding ? m_kernelHeight % 2 : m_kernelHeight;
auto outDims = ImageDimensions(
(inDims.m_width - kernelWidthCenter) / m_horizontalSubsample + 1,
(inDims.m_height - kernelHeightCenter) / m_verticalSubsample + 1,
m_outputChannels);
size_t weightCols = m_kernelWidth * m_kernelHeight * inDims.m_numChannels;
// check/infer input [0] (weights)
if (Input(0)->Value().HasNoElements())
ValidateInferInputDims(0, m_sampleLayout.GetNumChannels(), weightCols);
ValidateInferInputDims(0, m_outputChannels, weightCols);
if (isFinalValidationPass && (Input(0)->GetNumCols() != weightCols || Input(0)->GetNumRows() != m_sampleLayout.GetNumChannels()))
LogicError("convolutionWeight matrix %ls should have dimension [%d, %d] which is [outputChannels, kernelWidth * kernelHeight * inputChannels]", m_inputs[0]->NodeName().c_str(), (int)m_sampleLayout.GetNumChannels(), (int)weightCols);
if (isFinalValidationPass && (Input(0)->GetNumCols() != weightCols || Input(0)->GetNumRows() != m_outputChannels))
LogicError("convolutionWeight matrix %ls should have dimension [%d, %d] which is [outputChannels, kernelWidth * kernelHeight * inputChannels]", Input(0)->NodeName().c_str(), (int)m_outputChannels, (int)weightCols);
size_t inputDim = m_inputSampleLayout.GetWidth() * m_inputSampleLayout.GetHeight() * m_inputSampleLayout.GetNumChannels();
// check/infer input [1] (data)
size_t inputDim = inDims.m_width * inDims.m_height * inDims.m_numChannels;
if (Input(1)->GetNumRows() == 0)
ValidateInferInputDims(1, inputDim, Input(1)->GetNumCols());
if (isFinalValidationPass && Input(1)->GetNumRows() != inputDim)
LogicError("each column of input to the convolution node %ls is a sample and should have dimension %d, which is inputWidth * inputHeight * inputChannels", NodeName().c_str(), (int)inputDim);
LogicError("Each column of inDims to the convolution node %ls is a sample and should have dimension %d, which is inputWidth * inputHeight * inputChannels.", NodeName().c_str(), (int)inputDim);
size_t outputDim = m_sampleLayout.GetWidth() * m_sampleLayout.GetHeight() * m_sampleLayout.GetNumChannels();
SetDims(outputDim, Input(1)->GetNumCols());
}
void InferImageDimsFromInputs() override
{
InferImageDimsFromInput(1, false);
if (m_inputSampleLayout.GetWidth() < m_kernelWidth || m_inputSampleLayout.GetHeight() < m_kernelHeight)
InvalidArgument("inputWidth must >= kernelWidth and inputHeight must >= kernelHeight.");
if (m_zeroPadding)
{
const int kernelWidthCenter = m_kernelWidth % 2;
const int kernelHeightCenter = m_kernelHeight % 2;
m_sampleLayout = ImageLayoutWHC(
(m_inputSampleLayout.GetWidth() - kernelWidthCenter) / m_horizontalSubsample + 1,
(m_inputSampleLayout.GetHeight() - kernelHeightCenter) / m_verticalSubsample + 1,
m_sampleLayout.GetNumChannels());
}
else
{
m_sampleLayout = ImageLayoutWHC(
(m_inputSampleLayout.GetWidth() - m_kernelWidth) / m_horizontalSubsample + 1,
(m_inputSampleLayout.GetHeight() - m_kernelHeight) / m_verticalSubsample + 1,
m_sampleLayout.GetNumChannels());
}
// that's our dimension
SetDims(outDims.AsTensorShape(m_imageLayoutKind), Input(1)->GetNumCols());
// set up the various engines and descriptor objects
// REVIEW alexeyk: is there a better place to create engines?
if (m_factory == nullptr)
m_factory = ConvolutionEngineFactory<ElemType>::Create(m_deviceId);
assert(m_factory);
//if (m_factory == nullptr)
// m_factory = ConvolutionEngineFactory<ElemType>::Create(m_deviceId, ConvolutionEngineFactory<ElemType>::EngineType::Auto, m_imageLayoutKind);
// TODO: This seems to expose too much internal knowlegde of the engine to the ConvolutionNode().
// Why not just pass everything to the engine creator, and get one object that holds everything.
if (m_convEng == nullptr)
m_convEng = m_factory->CreateConvEngine(m_deviceId, m_maxTempMemSizeInSamples);
if (m_inT == nullptr)
m_inT = m_factory->CreateTensor(m_inputSampleLayout.GetWidth(), m_inputSampleLayout.GetHeight(), m_inputSampleLayout.GetNumChannels(), 1);
m_inT = m_factory->CreateTensor(inDims.m_width, inDims.m_height, inDims.m_numChannels, 1);
if (m_filterT == nullptr)
m_filterT = m_factory->CreateFilter(m_kernelWidth, m_kernelHeight, m_inputSampleLayout.GetNumChannels(), m_sampleLayout.GetNumChannels());
m_filterT = m_factory->CreateFilter(m_kernelWidth, m_kernelHeight, inDims.m_numChannels, m_outputChannels);
if (m_outT == nullptr)
m_outT = m_factory->CreateTensor(m_sampleLayout.GetWidth(), m_sampleLayout.GetHeight(), m_sampleLayout.GetNumChannels(), 1);
m_outT = m_factory->CreateTensor(outDims.m_width, outDims.m_height, outDims.m_numChannels, 1);
if (m_convDesc == nullptr)
m_convDesc = m_factory->CreateConvDescriptor(*m_inT, *m_filterT, m_horizontalSubsample, m_verticalSubsample, m_zeroPadding);
// REVIEW alexeyk: create per-channel (shared) bias. Consider adding other types of biases.
// REVIEW alexeyk: create per-channel bias (shared across all pixels). Consider adding other types of biases.
if (m_biasT == nullptr)
m_biasT = m_factory->CreateTensor(1, 1, m_sampleLayout.GetNumChannels(), 1);
m_biasT = m_factory->CreateTensor(1, 1, outDims.m_numChannels, 1);
}
void DumpNodeInfo(const bool printValues, File& fstream) const override
{
Base::DumpNodeInfo(printValues, fstream);
auto inDims = ImageDimensions(GetInputSampleLayout(1), m_imageLayoutKind);
auto outDims = ImageDimensions(m_sampleLayout, m_imageLayoutKind);
char str[4096];
sprintf(str, "Input[Width:%lu, Height:%lu, Channels:%lu] \n", m_inputSampleLayout.GetWidth(), m_inputSampleLayout.GetHeight(), m_inputSampleLayout.GetNumChannels());
sprintf(str, "Input[Width:%lu, Height:%lu, Channels:%lu] \n", inDims.m_width, inDims.m_height, inDims.m_numChannels);
fstream << string(str);
sprintf(str, "Kernel[Width:%lu, Height:%lu] SubSample[Horizontal:%lu, Vertical:%lu]\n", m_kernelWidth, m_kernelHeight, m_horizontalSubsample, m_verticalSubsample);
fstream << string(str);
sprintf(str, "Output[Width:%lu, Height:%lu, Channels:%lu] \n", m_sampleLayout.GetWidth(), m_sampleLayout.GetHeight(), m_sampleLayout.GetNumChannels());
sprintf(str, "Output[Width:%lu, Height:%lu, Channels:%lu] \n", outDims.m_width, outDims.m_height, outDims.m_numChannels);
fstream << string(str);
sprintf(str, "ZeroPadding=%ls maxTempMemSizeInSamples=%lu\n", m_zeroPadding? L"true" : L"false", m_maxTempMemSizeInSamples);
sprintf(str, "zeroPadding=%ls maxTempMemSizeInSamples=%lu\n", m_zeroPadding? L"true" : L"false", m_maxTempMemSizeInSamples);
fstream << string(str);
}
@ -273,6 +301,17 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
private:
size_t m_outputChannels;
size_t m_kernelWidth, m_kernelHeight;
size_t m_horizontalSubsample, m_verticalSubsample;
bool m_zeroPadding;
bool m_1DConvolutionOnGPUSparse;
shared_ptr<Matrix<ElemType>> m_tempMatrix;
size_t m_maxTempMemSizeInSamples; // can change during runtime
ImageLayoutKind m_imageLayoutKind; // how to interpret the tensor (which dimensions are X/Y and C)
std::unique_ptr<ConvolutionEngineFactory<ElemType>> m_factory;
std::unique_ptr<ConvolutionEngine<ElemType>> m_convEng;
@ -281,14 +320,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
std::unique_ptr<ConvolutionTensor4D> m_outT;
std::unique_ptr<ConvolutionDescriptor> m_convDesc;
std::unique_ptr<ConvolutionTensor4D> m_biasT;
size_t m_kernelWidth, m_kernelHeight;
size_t m_horizontalSubsample, m_verticalSubsample;
bool m_zeroPadding;
bool m_1DConvolutionOnGPUSparse;
shared_ptr<Matrix<ElemType>> m_tempMatrix;
size_t m_maxTempMemSizeInSamples; // can change during runtime
};
template class ConvolutionNode<float>;
@ -298,8 +329,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// PoolingNodeBase (input)
// -----------------------------------------------------------------------
// Max/Average Pooling: support multi channel
// Each sample is stored as a column-major matrix (height, width) of float[numChannels] (r00, g00, b00, r10, g10, b10, r01, g01, b01, r11, g11, b11).
template<class ElemType>
class PoolingNodeBase : public ComputationNode<ElemType>, public NumInputs<1>
{
@ -308,17 +337,19 @@ namespace Microsoft { namespace MSR { namespace CNTK {
PoolingNodeBase(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name),
m_windowWidth(SIZE_MAX), m_windowHeight(SIZE_MAX),
m_horizontalSubsample(SIZE_MAX), m_verticalSubsample(SIZE_MAX)
m_horizontalSubsample(SIZE_MAX), m_verticalSubsample(SIZE_MAX),
m_imageLayoutKind(ImageLayoutKind::HWC)
{ }
PoolingNodeBase(DEVICEID_TYPE deviceId, const wstring & name, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample) :
PoolingNodeBase(DEVICEID_TYPE deviceId, const wstring & name, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind) :
Base(deviceId, name),
m_windowWidth(windowWidth), m_windowHeight(windowHeight),
m_horizontalSubsample(horizontalSubsample), m_verticalSubsample(verticalSubsample)
m_horizontalSubsample(horizontalSubsample), m_verticalSubsample(verticalSubsample),
m_imageLayoutKind(imageLayoutKind)
{
m_factory = ConvolutionEngineFactory<ElemType>::Create(deviceId);
m_factory = ConvolutionEngineFactory<ElemType>::Create(GetDeviceId(), ConvolutionEngineFactory<ElemType>::EngineType::Auto, m_imageLayoutKind);
}
PoolingNodeBase(const ScriptableObjects::IConfigRecordPtr configp) :
PoolingNodeBase(configp->Get(L"deviceId"), L"<placeholder>", configp->Get(L"windowWidth"), configp->Get(L"windowHeight"), configp->Get(L"horizontalSubsample"), configp->Get(L"verticalSubsample"))
PoolingNodeBase(configp->Get(L"deviceId"), L"<placeholder>", configp->Get(L"windowWidth"), configp->Get(L"windowHeight"), configp->Get(L"horizontalSubsample"), configp->Get(L"verticalSubsample"), ImageLayoutKindFrom(configp->Get(L"imageLayout")))
{
// input, windowWidth, windowHeight, horizontalSubsample, verticalSubsample
AttachInputs(configp, this->GetExpectedNumInputs());
@ -327,13 +358,19 @@ namespace Microsoft { namespace MSR { namespace CNTK {
void Save(File& fstream) const override
{
Base::Save(fstream);
fstream << m_windowWidth << m_windowHeight << m_horizontalSubsample << m_verticalSubsample;
uint32_t imageLayoutKind = (uint32_t)m_imageLayoutKind;
uint32_t windowWidth = (uint32_t)m_windowWidth;
fstream << imageLayoutKind << windowWidth << m_windowHeight << m_horizontalSubsample << m_verticalSubsample;
}
void Load(File& fstream, size_t modelVersion) override
{
Base::Load(fstream, modelVersion);
fstream >> m_windowWidth >> m_windowHeight >> m_horizontalSubsample >> m_verticalSubsample;
uint32_t imageLayoutKind, windowWidth;
fstream >> imageLayoutKind >> windowWidth >> m_windowHeight >> m_horizontalSubsample >> m_verticalSubsample;
m_windowWidth = windowWidth;
m_imageLayoutKind = (ImageLayoutKind)imageLayoutKind;
m_factory = ConvolutionEngineFactory<ElemType>::Create(GetDeviceId(), ConvolutionEngineFactory<ElemType>::EngineType::Auto, m_imageLayoutKind);
}
void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
@ -351,6 +388,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
node->m_inputSizePerSample = m_inputSizePerSample;
node->m_outputSizePerSample = m_outputSizePerSample;
node->m_imageLayoutKind = m_imageLayoutKind;
}
}
@ -386,74 +425,73 @@ namespace Microsoft { namespace MSR { namespace CNTK {
void Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
if (m_horizontalSubsample > m_windowWidth || m_verticalSubsample > m_windowHeight)
InvalidArgument("PoolingNodeBase: horizontalSubsample must <= windowWidth and verticalSubsample must <= windowHeight.");
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
m_inputSizePerSample = m_inputSampleLayout.GetWidth() * m_inputSampleLayout.GetHeight() * m_inputSampleLayout.GetNumChannels();
m_outputSizePerSample = m_sampleLayout.GetWidth() * m_sampleLayout.GetHeight() * m_sampleLayout.GetNumChannels();
// get input tensor shape and interpret as image dimensions
auto inDims = ImageDimensions(GetInputSampleLayout(0), m_imageLayoutKind);
if (Input(0)->GetNumRows() == 0)
ValidateInferInputDims(0, m_inputSizePerSample, Input(0)->GetNumCols());
if (isFinalValidationPass && Input(0)->GetNumRows() != m_inputSizePerSample)
LogicError("each column of input to the MaxPooling node %ls is a sample and should have dimension %d, which is inputWidth * inputHeight * inputChannels", NodeName().c_str(), (int)m_inputSizePerSample);
SetDims(m_outputSizePerSample, Input(0)->GetNumCols());
}
void InferImageDimsFromInputs() override
{
InferImageDimsFromInput(0, false);
if (m_inputSampleLayout.GetWidth() < m_windowWidth || m_inputSampleLayout.GetHeight() < m_windowHeight)
if (inDims.m_width < m_windowWidth || inDims.m_height < m_windowHeight)
InvalidArgument("PoolingNodeBase: inputWidth must >= windowWidth and inputHeight must >= windowHeight.");
m_sampleLayout = ImageLayoutWHC(
(m_inputSampleLayout.GetWidth() - m_windowWidth) / m_horizontalSubsample + 1,
(m_inputSampleLayout.GetHeight() - m_windowHeight) / m_verticalSubsample + 1,
m_inputSampleLayout.GetNumChannels());
// determine output tensor shape
auto outDims = ImageDimensions(
(inDims.m_width - m_windowWidth) / m_horizontalSubsample + 1,
(inDims.m_height - m_windowHeight) / m_verticalSubsample + 1,
inDims.m_numChannels);
m_inputSizePerSample = inDims.m_width * inDims.m_height * inDims.m_numChannels;
if (Input(0)->GetNumRows() == 0)
ValidateInferInputDims(0, m_inputSizePerSample, Input(0)->GetNumCols()); // TODO: We should infer a tensor dimension for the input instead.
if (isFinalValidationPass && Input(0)->GetNumRows() != m_inputSizePerSample) // TODO: Can be removed once tensor shape and numRows are perfectly in sync.
LogicError("each column of input to the MaxPooling node %ls is a sample and should have dimension %d, which is inputWidth * inputHeight * inputChannels", NodeName().c_str(), (int)m_inputSizePerSample);
SetDims(outDims.AsTensorShape(m_imageLayoutKind), Input(0)->GetNumCols());
// set up various engines and descriptor objects
// REVIEW alexeyk: is there a better place to create engines?
if (m_factory == nullptr)
m_factory = ConvolutionEngineFactory<ElemType>::Create(m_deviceId);
assert(m_factory);
//if (m_factory == nullptr)
// m_factory = ConvolutionEngineFactory<ElemType>::Create(m_deviceId, ConvolutionEngineFactory<ElemType>::EngineType::Auto, m_imageLayoutKind);
if (m_poolEng == nullptr)
m_poolEng = m_factory->CreatePoolEngine(m_deviceId);
if (m_inT == nullptr)
m_inT = m_factory->CreateTensor(m_inputSampleLayout.GetWidth(), m_inputSampleLayout.GetHeight(), m_inputSampleLayout.GetNumChannels(), 1);
m_inT = m_factory->CreateTensor(inDims.m_width, inDims.m_height, inDims.m_numChannels, 1);
if (m_outT == nullptr)
m_outT = m_factory->CreateTensor(m_sampleLayout.GetWidth(), m_sampleLayout.GetHeight(), m_sampleLayout.GetNumChannels(), 1);
m_outT = m_factory->CreateTensor(outDims.m_width, outDims.m_height, outDims.m_numChannels, 1);
}
void DumpNodeInfo(const bool printValues, File& fstream) const override
{
Base::DumpNodeInfo(printValues, fstream);
auto inputSampleLayout = GetInputSampleLayout(0);
char str[4096];
sprintf(str, "Input[Width:%lu, Height:%lu, Channels:%lu] \n", m_inputSampleLayout.GetWidth(), m_inputSampleLayout.GetHeight(), m_inputSampleLayout.GetNumChannels());
sprintf(str, "Input[Width:%lu, Height:%lu, Channels:%lu] \n", inputSampleLayout[1], inputSampleLayout[2], inputSampleLayout[0]);
fstream << string(str);
sprintf(str, "PoolingWindow[Width:%lu, Height:%lu] SubSampling[Horizontal:%lu, Vertical:%lu]\n", m_windowWidth, m_windowHeight, m_horizontalSubsample, m_verticalSubsample);
fstream << string(str);
sprintf(str, "Output[Width:%lu, Height:%lu, Channels:%lu] \n", m_sampleLayout.GetWidth(), m_sampleLayout.GetHeight(), m_sampleLayout.GetNumChannels());
sprintf(str, "Output[Width:%lu, Height:%lu, Channels:%lu] \n", m_sampleLayout[1], m_sampleLayout[2], m_sampleLayout[0]);
fstream << string(str);
sprintf(str, "TotalSizePerSample[Input:%lu, Output:%lu] \n", m_inputSizePerSample, m_outputSizePerSample);
fstream << string(str);
}
protected:
size_t m_windowWidth, m_windowHeight;
size_t m_horizontalSubsample, m_verticalSubsample;
size_t m_inputSizePerSample, m_outputSizePerSample;
ImageLayoutKind m_imageLayoutKind; // how to interpret the tensor (which dimensions are X/Y and C)
std::unique_ptr<ConvolutionEngineFactory<ElemType>> m_factory;
std::unique_ptr<PoolingEngine<ElemType>> m_poolEng;
std::unique_ptr<ConvolutionTensor4D> m_inT;
std::unique_ptr<ConvolutionTensor4D> m_outT;
std::unique_ptr<PoolingDescriptor> m_poolDesc;
size_t m_windowWidth, m_windowHeight;
size_t m_horizontalSubsample, m_verticalSubsample;
size_t m_inputSizePerSample, m_outputSizePerSample;
};
// add this at the start of each derived class, to get access to the members of ComputationNode
@ -474,16 +512,16 @@ namespace Microsoft { namespace MSR { namespace CNTK {
static const std::wstring TypeName() { return L"MaxPooling"; }
public:
MaxPoolingNode(DEVICEID_TYPE deviceId, const wstring & name) : Base(deviceId, name) { }
MaxPoolingNode(DEVICEID_TYPE deviceId, const wstring & name, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample) :
Base(deviceId, name, windowWidth, windowHeight, horizontalSubsample, verticalSubsample)
MaxPoolingNode(DEVICEID_TYPE deviceId, const wstring & name, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind) :
Base(deviceId, name, windowWidth, windowHeight, horizontalSubsample, verticalSubsample, imageLayoutKind)
{ }
MaxPoolingNode(const ScriptableObjects::IConfigRecordPtr configp) :
Base(configp)
{ }
void InferImageDimsFromInputs() override
void Validate(bool isFinalValidationPass) override
{
Base::InferImageDimsFromInputs();
Base::Validate(isFinalValidationPass);
if (m_poolDesc == nullptr)
m_poolDesc = m_factory->CreatePoolDescriptor(PoolingDescriptor::PoolKind::Max, m_windowWidth, m_windowHeight, m_horizontalSubsample, m_verticalSubsample, 0, 0);
}
@ -503,8 +541,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
static const std::wstring TypeName() { return L"AveragePooling"; }
public:
AveragePoolingNode(DEVICEID_TYPE deviceId, const wstring & name) : Base(deviceId, name) { }
AveragePoolingNode(DEVICEID_TYPE deviceId, const wstring & name, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample) :
Base(deviceId, name, windowWidth, windowHeight, horizontalSubsample, verticalSubsample)
AveragePoolingNode(DEVICEID_TYPE deviceId, const wstring & name, const size_t windowWidth, const size_t windowHeight, const size_t horizontalSubsample, const size_t verticalSubsample, ImageLayoutKind imageLayoutKind) :
Base(deviceId, name, windowWidth, windowHeight, horizontalSubsample, verticalSubsample, imageLayoutKind)
{ }
AveragePoolingNode(const ScriptableObjects::IConfigRecordPtr configp) :
Base(configp)
@ -525,9 +563,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return false;
}
void InferImageDimsFromInputs() override
void Validate(bool isFinalValidationPass) override
{
Base::InferImageDimsFromInputs();
Base::Validate(isFinalValidationPass);
if (m_poolDesc == nullptr)
m_poolDesc = m_factory->CreatePoolDescriptor(PoolingDescriptor::PoolKind::Average, m_windowWidth, m_windowHeight, m_horizontalSubsample, m_verticalSubsample, 0, 0);
}
@ -682,29 +720,25 @@ namespace Microsoft { namespace MSR { namespace CNTK {
void Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
SetDims(m_sampleLayout.GetWidth() * m_sampleLayout.GetHeight() * m_sampleLayout.GetNumChannels(), Input(0)->GetNumCols());
}
SetDims(Input(0));
void InferImageDimsFromInputs() override
{
InferImageDimsFromInput(0);
const auto m_imageLayoutKind = ImageLayoutKind::CHW; // BUGBUG: Finish this. Must be serialized.
auto dims = ImageDimensions(GetSampleLayout(), m_imageLayoutKind);
if (m_factory == nullptr)
m_factory = ConvolutionEngineFactory<ElemType>::Create(m_deviceId);
m_factory = ConvolutionEngineFactory<ElemType>::Create(m_deviceId, ConvolutionEngineFactory<ElemType>::EngineType::Auto, m_imageLayoutKind);
if (m_convEng == nullptr)
m_convEng = m_factory->CreateConvEngine(m_deviceId, 0);
if (m_inT == nullptr)
m_inT = m_factory->CreateTensor(m_sampleLayout.GetWidth(), m_sampleLayout.GetHeight(), m_sampleLayout.GetNumChannels(), 1);
m_inT = m_factory->CreateTensor(dims.m_width, dims.m_height, dims.m_numChannels, 1);
if (m_scaleBiasT == nullptr)
{
if (m_spatial)
m_scaleBiasT = m_factory->CreateTensor(1, 1, m_sampleLayout.GetNumChannels(), 1);
m_scaleBiasT = m_factory->CreateTensor(1, 1, dims.m_numChannels, 1);
else
m_scaleBiasT = m_factory->CreateTensor(m_sampleLayout.GetWidth(), m_sampleLayout.GetHeight(), m_sampleLayout.GetNumChannels(), 1);
m_scaleBiasT = m_factory->CreateTensor(dims.m_width, dims.m_height, dims.m_numChannels, 1);
}
}
@ -750,11 +784,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
VersionInfo m_version;
private:
std::unique_ptr<ConvolutionEngineFactory<ElemType>> m_factory;
std::unique_ptr<ConvolutionEngine<ElemType>> m_convEng;
std::unique_ptr<ConvolutionTensor4D> m_inT;
std::unique_ptr<ConvolutionTensor4D> m_scaleBiasT;
// Determines whether to use training or inference(evaluation) mode.
bool m_eval;
// Determines whether to use per-activation (used after non-convolutional layers like fully connected)
@ -770,6 +799,11 @@ namespace Microsoft { namespace MSR { namespace CNTK {
shared_ptr<Matrix<ElemType>> m_dScale;
// Stores bias derivatives.
shared_ptr<Matrix<ElemType>> m_dBias;
std::unique_ptr<ConvolutionEngineFactory<ElemType>> m_factory;
std::unique_ptr<ConvolutionEngine<ElemType>> m_convEng;
std::unique_ptr<ConvolutionTensor4D> m_inT;
std::unique_ptr<ConvolutionTensor4D> m_scaleBiasT;
};
template class BatchNormalizationNode<float>;

707
Source/ComputationNetworkLib/EsotericNodes.h
Просмотреть файл

@ -18,6 +18,635 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// This header collects special-purpose nodes.
// It is likely that these are no longer functional.
#ifndef ENABLE_BROADCASTING_ELEMENTTIMES
// -----------------------------------------------------------------------
// ScaleNode (scalar scaling factor, matrix)
//
// Identical to ElementTimesNode with tensor lib (broadcasting). Can be removed.
// -----------------------------------------------------------------------
template<class ElemType>
class ScaleNode : public ComputationNode<ElemType>, public NumInputs<2>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembersBoilerplate;
static const std::wstring TypeName() { return L"Scale"; }
public:
DeclareConstructorFromConfigWithNumInputs(ScaleNode);
ScaleNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
#ifdef ENABLE_TENSORVIEW // This takes a big perf hit since our reduction uses only a single thread in this case. Needs to be fixed.
size_t rank = DetermineElementwiseTensorRank();
auto gradient = GradientTensorFor(rank, fr);
auto inputGradient = Input(inputIndex)->GradientTensorFor(rank, fr.AllowBroadcast());
auto otherInputValue = Input(1 - inputIndex)->ValueTensorFor(rank, fr.AllowBroadcast());
// if reduction then mask the respective input(s) (zero out the gaps)
if (Input(inputIndex)->GetNumCols() < GetNumCols())
MaskMissingGradientColumnsToZero(fr);
if (Input(inputIndex)->GetNumCols() < Input(1 - inputIndex)->GetNumCols())
Input(1 - inputIndex)->MaskMissingValueColumnsToZero(fr);
inputGradient.AddElementwiseProductOf(gradient, otherInputValue);
#else
if (inputIndex == 0) // left derivative
{
// this is a reduction over frames, so we must mask gaps to zero
Input(0)->Gradient() += Matrix<ElemType>::InnerProductOfMatrices(MaskedGradientFor(fr), Input(1)->MaskedValueFor(fr)); // element-wise product summed up over all
}
else if (inputIndex == 1) // right derivative
{
Matrix<ElemType> sliceInput1Grad = Input(1)->GradientFor(fr);
Matrix<ElemType>::Multiply1x1AndWeightedAdd(+1.0f, Input(0)->Value()/*1x1*/, GradientFor(fr), 1.0f, sliceInput1Grad);
}
#endif
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The ScaleNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
#ifdef ENABLE_TENSORVIEW
static int c = 0; if (c++ == 0) { fprintf(stderr, "#SCALE#\n"); }
size_t rank = DetermineElementwiseTensorRank();
auto result = ValueTensorFor(rank, fr);
auto input0 = Input(0)->ValueTensorFor(rank, fr.AllowBroadcast());
auto input1 = Input(1)->ValueTensorFor(rank, fr.AllowBroadcast());
result.AssignElementwiseProductOf(input0, input1);
#else
ValueFor(fr).Assign1x1ProductOf(Input(0)->Value()/*1x1*/, Input(1)->ValueFor(fr));
#endif
}
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
// left node must be a scalar
if (isFinalValidationPass && (Input(0)->GetNumRows() != 1 || Input(0)->GetNumCols() != 1))
RuntimeError("The left value of ScaleNode must be a scalar value.");
SetDims(Input(1));
}
};
template class ScaleNode<float>;
template class ScaleNode<double>;
// -----------------------------------------------------------------------
// RowElementTimesNode (left, right) --TODO: what are left and right?
//
// TODO: This is subsumed by ElementTimes with tensor lib.
// -----------------------------------------------------------------------
template<class ElemType>
class RowElementTimesNode : public ComputationNode<ElemType>, public NumInputs<2>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembersBoilerplate;
static const std::wstring TypeName() { return L"RowElementTimes"; }
public:
DeclareConstructorFromConfigWithNumInputs(RowElementTimesNode);
RowElementTimesNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
void BackpropToMap(const size_t inputIndex)
{
if (inputIndex > 1)
InvalidArgument("RowElementTimes operation only takes two inputs.");
if (inputIndex == 0)
{
BackpropToLeftS(Input(1)->Value(), Input(0)->Gradient(), Gradient(), *m_tempMatrix);
}
else
{
BackpropToRightS(Input(0)->Value(), Input(1)->Gradient(), Gradient(), *m_tempMatrix);
}
}
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
if (fr.IsAllFrames()) { BackpropToMap(inputIndex); return; } // TODO: remove these one by one
Matrix<ElemType> sliceInput0Grad = Input(inputIndex)->GradientFor(fr);
Matrix<ElemType> sliceOutputGrad = GradientFor(fr);
Matrix<ElemType> sliceInput1Value = Input(1 - inputIndex)->ValueFor(fr);
if (inputIndex == 0)
{
BackpropToLeftS(sliceInput1Value, sliceInput0Grad, sliceOutputGrad, *m_tempMatrix);
}
else
{
BackpropToRightS(sliceInput1Value, sliceInput0Grad, sliceOutputGrad, *m_tempMatrix);
}
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The RowElementTimesNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
//left (input 0) is a matrix
/*TODO: merge with call site*/void BackpropToLeftS(Matrix<ElemType>& input1FunctionValues,
Matrix<ElemType>& input0GradientValues,
const Matrix<ElemType>& gradientValues,
Matrix<ElemType>& tempMatrix)
{
tempMatrix.SetValue(gradientValues);
tempMatrix.RowElementMultiplyWith(input1FunctionValues);
input0GradientValues += tempMatrix;
#if NANCHECK
input0GradientValues.HasNan("RowElementTimes");
#endif
}
//right (input 1) is a row vector
/*TODO: merge with call site*/void BackpropToRightS(Matrix<ElemType>& input0FunctionValues,
Matrix<ElemType>& input1GradientValues,
const Matrix<ElemType>& gradientValues,
Matrix<ElemType>& tempMatrix)
{
tempMatrix.AssignInnerProductOf(gradientValues, input0FunctionValues, true);
input1GradientValues += tempMatrix;
#if NANCHECK
input1GradientValues.HasNan("RowElementTimes");
#endif
}
void ForwardPropMap() // TODO: This is a stop-gap; in most cases, we should just be able to delete this (but need to review one by one)
{
ForwardPropS(Value(), Input(0)->Value(), Input(1)->Value());
}
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
//if (fr.IsAllFrames()) { ForwardPropMap(); return; }
Matrix<ElemType> sliceInput0Value = Input(0)->ValueFor(fr);
Matrix<ElemType> sliceInput1Value = Input(1)->ValueFor(fr);
Matrix<ElemType> sliceOutputValue = ValueFor(fr);
ForwardPropS(sliceOutputValue, sliceInput0Value, sliceInput1Value);
}
/*TODO: merge with call site*/void ForwardPropS(Matrix<ElemType>& functionValues, const Matrix<ElemType>& input0, const Matrix<ElemType>& input1)
{
functionValues.SetValue(input0);
functionValues.RowElementMultiplyWith(input1);
#if NANCHECK
functionValues.HasNan("RowElementTimes");
#endif
}
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
size_t rows1 = Input(1)->GetNumRows(), cols1 = Input(1)->GetNumCols(); rows0;
if (isFinalValidationPass && cols0 != cols1 || rows1 != 1)
LogicError("RowElementTimes: Either the second operand is not a row vector or the number of columns of operands does not match.");
SetDims(Input(0));
}
//request matrices that are needed for gradient computation
virtual void RequestMatricesBeforeBackprop(MatrixPool& matrixPool)
{
Base::RequestMatricesBeforeBackprop(matrixPool);
RequestMatrixFromPool(m_tempMatrix, matrixPool);
}
//release gradient and temp matrices that no longer needed after all the children's gradients are computed.
virtual void ReleaseMatricesAfterBackprop(MatrixPool& matrixPool)
{
Base::ReleaseMatricesAfterBackprop(matrixPool);
ReleaseMatrixToPool(m_tempMatrix, matrixPool);
}
private:
shared_ptr<Matrix<ElemType>> m_tempMatrix;
};
template class RowElementTimesNode<float>;
template class RowElementTimesNode<double>;
// -----------------------------------------------------------------------
// ColumnElementTimesNode (left, right) --TODO: what are left and right?
//
// TODO: This is subsumed by ElementTimes with tensor lib.
// -----------------------------------------------------------------------
template<class ElemType>
class ColumnElementTimesNode : public ComputationNode<ElemType>, public NumInputs<2>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembersBoilerplate;
static const std::wstring TypeName() { return L"ColumnElementTimes"; }
public:
DeclareConstructorFromConfigWithNumInputs(ColumnElementTimesNode);
ColumnElementTimesNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
void BackpropToMap(const size_t inputIndex)
{
if (inputIndex > 1)
InvalidArgument("ColumnElementTimes operation only takes two inputs.");
if (inputIndex == 0)
{
BackpropToLeftS(Input(1)->Value(), Input(0)->Gradient(), Gradient(), *m_tempMatrix);
}
else
{
BackpropToRightS(Input(0)->Value(), Input(1)->Gradient(), Gradient(), *m_tempMatrix);
}
}
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
if (fr.IsAllFrames()) { BackpropToMap(inputIndex); return; } // TODO: remove these one by one
Matrix<ElemType> sliceOutputGrad = GradientFor(fr);
if (inputIndex == 0)
{
Matrix<ElemType> sliceInput0Grad = Input(0)->GradientFor(fr);
BackpropToLeftS(Input(1)->Value(), sliceInput0Grad, sliceOutputGrad, *m_tempMatrix);
}
else
{
Matrix<ElemType> sliceInput0Value = Input(0)->ValueFor(fr);
BackpropToRightS(sliceInput0Value, Input(1)->Gradient(), sliceOutputGrad, *m_tempMatrix);
}
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The ColumnElementTimesNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
//left (input 0) is a matrix
/*TODO: merge with call site*/void BackpropToLeftS(Matrix<ElemType>& input1FunctionValues,
Matrix<ElemType>& input0GradientValues,
const Matrix<ElemType>& gradientValues,
Matrix<ElemType>& tempMatrix)
{
tempMatrix.SetValue(gradientValues);
tempMatrix.ColumnElementMultiplyWith(input1FunctionValues);
input0GradientValues += tempMatrix;
#if NANCHECK
input0GradientValues.HasNan("ColumnElementTimes");
#endif
}
//right (input 1) is a col vector
/*TODO: merge with call site*/void BackpropToRightS(Matrix<ElemType>& input0FunctionValues,
Matrix<ElemType>& input1GradientValues,
const Matrix<ElemType>& gradientValues,
Matrix<ElemType>& tempMatrix)
{
tempMatrix.AssignInnerProductOf(gradientValues, input0FunctionValues, false);
input1GradientValues += tempMatrix;
#if NANCHECK
input1GradientValues.HasNan("ColumnElementTimes");
#endif
}
void ForwardPropMap() // TODO: This is a stop-gap; in most cases, we should just be able to delete this (but need to review one by one)
{
ForwardPropS(Value(), Input(0)->Value(), Input(1)->Value());
}
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
//if (fr.IsAllFrames()) { ForwardPropMap(); return; }
Matrix<ElemType> sliceInput0Value = Input(0)->ValueFor(fr);
Matrix<ElemType> sliceOutputValue = ValueFor(fr);
ForwardPropS(sliceOutputValue, sliceInput0Value, Input(1)->Value());
}
/*TODO: merge with call site*/void ForwardPropS(Matrix<ElemType>& functionValues, const Matrix<ElemType>& input0, const Matrix<ElemType>& input1)
{
functionValues.SetValue(input0);
functionValues.ColumnElementMultiplyWith(input1);
#if NANCHECK
functionValues.HasNan("ColumnElementTimes");
#endif
}
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
//derive number of rows if possible
for (size_t index = 0; index < 2; index++)
{
size_t rows = Input(index)->GetNumRows() == 0 ? Input(1 - index)->GetNumRows() : Input(index)->GetNumRows();
size_t cols = Input(index)->GetNumCols() == 0 ? Input(1 - index)->GetNumCols() : Input(index)->GetNumCols();
ValidateInferInputDims(index, rows, cols);
}
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
size_t rows1 = Input(1)->GetNumRows(), cols1 = Input(1)->GetNumCols(); cols0;
if (isFinalValidationPass && (rows0 != rows1 || cols1 != 1))
LogicError("ColumnElementTimes: Either the second operand is not a column vector or the number of rows of operands does not match.");
SetDims(Input(0));
}
//request matrices that are needed for gradient computation
virtual void RequestMatricesBeforeBackprop(MatrixPool& matrixPool)
{
Base::RequestMatricesBeforeBackprop(matrixPool);
RequestMatrixFromPool(m_tempMatrix, matrixPool);
}
//release gradient and temp matrices that no longer needed after all the children's gradients are computed.
virtual void ReleaseMatricesAfterBackprop(MatrixPool& matrixPool)
{
Base::ReleaseMatricesAfterBackprop(matrixPool);
ReleaseMatrixToPool(m_tempMatrix, matrixPool);
}
private:
shared_ptr<Matrix<ElemType>> m_tempMatrix;
};
template class ColumnElementTimesNode<float>;
template class ColumnElementTimesNode<double>;
// -----------------------------------------------------------------------
// RectifiedLinearNode (input) -- ReLU non-linearity
// -----------------------------------------------------------------------
template<class ElemType>
class RectifiedLinearNode : public SoftmaxNodeBase<ElemType>
{
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"RectifiedLinear"; }
public:
DeclareConstructorFromConfigWithNumInputs(RectifiedLinearNode);
RectifiedLinearNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues) override
{
gradient.AssignLinearRectifierDerivativeOf(inputFunctionValues);
#if DUMPOUTPUT
inputGradientValues.Print("RecitifiedLinearNode-Partial-in");
#endif
inputGradientValues.AddElementProductOf(gradientValues, gradient);
#if DUMPOUTPUT
inputGradientValues.Print("RecitifiedLinearNode-Partial-out");
#endif
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The ReLU node does not require its output value for computing
// the gradients of its input nodes
return false;
}
void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignTruncateBottomOf(inputFunctionValues, 0);
#if DUMPOUTPUT
functionValues.Print("RectifiedLinearNode");
#endif
}
};
template class RectifiedLinearNode<float>;
template class RectifiedLinearNode<double>;
// -----------------------------------------------------------------------
// SigmoidNode (input) -- sigmoid non-linearity
// -----------------------------------------------------------------------
template<class ElemType>
class SigmoidNode : public SoftmaxNodeBase<ElemType>
{
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"Sigmoid"; }
public:
DeclareConstructorFromConfigWithNumInputs(SigmoidNode);
SigmoidNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual bool InputUsedInComputingInputNodesGradients(size_t childIndex) const override
{
// The Sigmoid node does not require any of it's input's values for computing
// the gradients of its input nodes
UNREFERENCED_PARAMETER(childIndex);
return false;
}
/*virtual*/ void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues)
{
gradient.AssignSigmoidDerivativeOf(functionValues);
inputGradientValues.AddElementProductOf(gradientValues, gradient);
}
/*virtual*/ void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignSigmoidOf(inputFunctionValues);
}
};
template class SigmoidNode<float>;
template class SigmoidNode<double>;
// -----------------------------------------------------------------------
// TanhNode (input) -- tanh non-linearity
// -----------------------------------------------------------------------
template<class ElemType>
class TanhNode : public SoftmaxNodeBase<ElemType>
{
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"Tanh"; }
public:
DeclareConstructorFromConfigWithNumInputs(TanhNode);
TanhNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual bool InputUsedInComputingInputNodesGradients(size_t childIndex) const override
{
// The plus node does not require any of it's input's values for computing
// the gradients of its input nodes
UNREFERENCED_PARAMETER(childIndex);
return false;
}
/*virtual*/ void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues)
{
gradient.AssignElementProductOf(functionValues, functionValues); // v .* v
gradient.AssignDifferenceOf(1, gradient); // 1-v^2
inputGradientValues.AddElementProductOf(gradientValues, gradient); // += d .* ((1-v) .* v))
}
/*virtual*/ void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignTanhOf(inputFunctionValues);
}
};
template class TanhNode<float>;
template class TanhNode<double>;
// -----------------------------------------------------------------------
// LogNode (input) -- component-wise log() of input
// -----------------------------------------------------------------------
template<class ElemType>
class LogNode : public SoftmaxNodeBase<ElemType>
{
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"Log"; }
public:
DeclareConstructorFromConfigWithNumInputs(LogNode);
LogNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The plus node does not require its output value for computing
// the gradients of its input nodes
return false;
}
/*virtual*/ void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues)
{
gradient.AssignElementInverseOf(inputFunctionValues); // 1/x (x is input to log(x))
inputGradientValues.AddElementProductOf(gradientValues, gradient);
// TODO: with tensor lib:
//inputGradientValues.AddElementDivisionOf(gradientValues, inputFunctionValues); // 1/x (x is input to log(x))
}
/*virtual*/ void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignLogOf(inputFunctionValues);
}
};
template class LogNode<float>;
template class LogNode<double>;
// -----------------------------------------------------------------------
// ExpNode (input) -- component-wise exp() of input
// -----------------------------------------------------------------------
template<class ElemType>
class ExpNode : public SoftmaxNodeBase<ElemType>
{
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"Exp"; }
public:
DeclareConstructorFromConfigWithNumInputs(ExpNode);
ExpNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
assert(inputIndex == 0); inputIndex;
Matrix<ElemType> sliceInputGrad = Input(0)->GradientFor(fr);
Matrix<ElemType> sliceOutputGrad = GradientFor(fr);
Matrix<ElemType> sliceInputValue = Input(0)->ValueFor(fr);
m_gradientTemp->AssignExpOf(sliceInputValue); // Exp(x) is its own partial
sliceInputGrad.AddElementProductOf(sliceOutputGrad, *m_gradientTemp);
// TODO: with tensor lib:
// sliceInputGrad.AddElementProductOf(sliceOutputGrad, functionValues);
// and set OutputUsed
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The ExpNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
virtual void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues) override { NOT_IMPLEMENTED; } // not needed
void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignExpOf(inputFunctionValues);
}
};
template class ExpNode<float>;
template class ExpNode<double>;
// -----------------------------------------------------------------------
// CosineNode (input) -- component-wise cos() of input
// -----------------------------------------------------------------------
template<class ElemType>
class CosineNode : public SoftmaxNodeBase<ElemType>
{
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"Cosine"; }
public:
DeclareConstructorFromConfigWithNumInputs(CosineNode);
CosineNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The CosineNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
/*virtual*/ void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues)
{
gradient.AssignNegativeSineOf(inputFunctionValues); // -sin(x) (x is input to Cosine(x))
inputGradientValues.AddElementProductOf(gradientValues, gradient);
// TODO: tensor lib: make a joint kernel, since neg sin is never used for anything else
}
/*virtual*/ void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignCosineOf(inputFunctionValues);
}
};
template class CosineNode<float>;
template class CosineNode<double>;
#endif
// -----------------------------------------------------------------------
/// DummyCriterionNode (objectives, derivatives, prediction)
// -----------------------------------------------------------------------
@ -71,6 +700,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
if (Input(0)->OperationName() != L"InputValue")
LogicError("DummyCriterionNode criterion requires the first input to be computed objectives.");
@ -86,16 +716,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
LogicError("The Matrix dimension in the DummyCriterionNode operation does not match.");
}
SetDims(1,1);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
SetDims(TensorShape(1), 1);
}
};
@ -262,6 +883,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
if (isFinalValidationPass)
if (!(Input(1)->GetNumRows() == Input(2)->GetNumRows() && // position dependent and pair scores have same number of labels
@ -271,16 +893,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
LogicError("The Matrix<ElemType> dimension in the SequenceDecoderNode operation does not match.");
}
// BUGBUG: Not resizing FunctionValues?
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
// BUGBUG: No SetDims()?
m_sampleLayout = TensorShape();
}
};
@ -502,9 +1115,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
UpdateStride(sliceInput1Value);
if (m_strideDim == 0)
SetDims(rows0 / GetNumParallelSequences(), cols1);
if (m_strideDim == 1) // TODO: no else??
SetDims(rows0, cols1);
SetDims(TensorShape(rows0 / GetNumParallelSequences()), cols1);
else
SetDims(Input(0)->GetSampleLayout(), cols1);
Matrix<ElemType> sliceOutputValue = ValueFor(fr);
@ -594,6 +1207,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
LinkToMBLayout(Input(1)->GetMBLayout()); // retains the layout of the right input
if (Input(2)->Value().GetNumElements() != 1)
RuntimeError("%ls %ls operation: Input(2) should be a single element matrix and have the value 0 (row) or 1 (col).", NodeName().c_str(), OperationName().c_str());
@ -611,26 +1225,18 @@ namespace Microsoft { namespace MSR { namespace CNTK {
if (isFinalValidationPass && rows1 != cols0)
RuntimeError("The Matrix dimension in the StrideTimes operation in dim %d does not match for cols %d in A and rows %d in B.", (int)m_strideDim, (int)cols0, (int)rows1);
size_t T1 = rows0 / m_stride;
SetDims(T1, cols1);
SetDims(TensorShape(T1), cols1);
//after multiplication the structure is lost
}
else // by col
{
if (isFinalValidationPass && cols0 != rows1 * m_stride)
RuntimeError("The Matrix dimension in the StrideTimes operation in dim %d does not match for cols %d in A and row number %d in B.", (int)m_strideDim, (int)cols0, (int)rows1);
SetDims(rows0, cols1);
SetDims(TensorShape(rows0), cols1);
//after multiplication the structure is lost
}
LinkToMBLayout(Input(1)->GetMBLayout()); // retains the layout of the right input
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(1, false); //the second one is the input since it's column wize
//after multiplication the structure is lost
m_sampleLayout = TensorShape(Input(0)->GetNumRows());
}
};
@ -654,7 +1260,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
void Init(size_t row_size, size_t col_size)
{
CreateMatrixIfNull(m_value);
SetDims(row_size, col_size);
SetDims(TensorShape(row_size), col_size);
UpdateFunctionValuesSize();
}
public:
@ -702,13 +1308,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
if (rows0 > 0 && cols0 > 0) // TODO: is this check needed?
SetDims(Input(0));
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
else
SetDims(Input(0)->GetSampleLayout(), 0);
}
};
@ -1211,7 +1817,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t outputDim = Input(1)->GetNumRows();
{
SetDims(outputDim, nT);
SetDims1(outputDim, nT);
Value().SetValue(NAN); // set to this extrem value so, if anything wrong in later procedure, problems can be easily spotted.
m_State.Resize(outputDim, nT);
m_State.SetValue(NAN); // set to this extrem value so, if anything wrong in later procedure, problems can be easily spotted.
@ -1529,9 +2135,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
if (Input(0)->Value().GetMatrixType() == SPARSE)
LogicError("LSTMNode: input to LSTM has to be dense matrix. Consider adding a project layer using lookuptable before LSTM node. ");
@ -1581,7 +2185,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
}
SetDims(noutdim, nT);
SetDims(TensorShape(noutdim), nT);
Value().SetValue(NAN); // set to this extrem value so, if anything wrong in later procedure, problems can be easily spotted.
}
@ -1618,18 +2222,18 @@ namespace Microsoft { namespace MSR { namespace CNTK {
for (size_t i = 0; i < nT; i++)
target(0, i) = 1;
Input(0)->SetDims(nInput, nT);
Input(0)->SetDims1(nInput, nT);
Input(0)->Value().SetValue(ConstOnes(nInput, nT, m_deviceId));
Input(0)->Value().SetValue((ElemType)0.1);
Input(1)->SetDims(nHidden, nInput + nOutput + 2);
Input(1)->SetDims1(nHidden, nInput + nOutput + 2);
Input(1)->Value().SetValue((ElemType)0.1);
Input(2)->SetDims(nHidden, nInput + nHidden + 2);
Input(2)->SetDims1(nHidden, nInput + nHidden + 2);
Input(2)->Value().SetValue((ElemType)0.1);
Input(3)->SetDims(nOutput, nInput + nHidden + 2);
Input(3)->SetDims1(nOutput, nInput + nHidden + 2);
Input(3)->Value().SetValue((ElemType)0.1);
Input(4)->SetDims(nOutput, nHidden + nInput + 1);
Input(4)->SetDims1(nOutput, nHidden + nInput + 1);
Input(4)->Value().SetValue((ElemType)0.1);
SetDims(nOutput, nT);
SetDims1(nOutput, nT);
m_DefaultState = 0.0;
ForwardProp(FrameRange(m_pMBLayout));
@ -1691,11 +2295,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return true;
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(1, false);
}
virtual void DumpNodeInfo(const bool printValues, File& fstream) const override
{
Base::DumpNodeInfo(printValues, fstream);

7
Source/ComputationNetworkLib/EvaluationCriterionNodes.h
Просмотреть файл

@ -77,13 +77,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_maxValues->Resize(m_topK, cols);
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
{
Base::CopyTo(nodeP, newName, flags);

93
Source/ComputationNetworkLib/InputAndParamNodes.h
Просмотреть файл

@ -28,6 +28,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// -----------------------------------------------------------------------
// LearnableParameter (/*no input*/)
// represents weight matrices and biases
// TODO: add -Node to the class name
// -----------------------------------------------------------------------
template<class ElemType>
@ -40,20 +41,33 @@ namespace Microsoft { namespace MSR { namespace CNTK {
Base(deviceId, name)
{
m_parameterUpdateRequired = true;
m_sampleLayout = TensorShape();
SetDims(TensorShape(), 0);
}
LearnableParameter(DEVICEID_TYPE deviceId, const wstring & name, size_t rows, size_t cols) :
LearnableParameter(DEVICEID_TYPE deviceId, const wstring & name, const TensorShape & shape) :
Base(deviceId, name)
{
m_parameterUpdateRequired = true;
CreateMatrixIfNull(m_value);
SetDims(TensorShape(rows), cols);
// for now we split off the trailing dimension into the matrix column dimension
// TODO: This is for compat, but is is inconsistent. Decide what a sample layout means for a node without MBLayout w.r.t. non-tensor ops.
auto dims = shape.GetDims();
size_t cols = 1;
if (dims.size() > 1)
{
cols = dims.back();
dims.resize(dims.size()-1);
}
SetDims(TensorShape(dims), cols);
UpdateFunctionValuesSize(); // this allocates the matrix
Value().SetValue(0);
}
LearnableParameter(DEVICEID_TYPE deviceId, const wstring & name, size_t rows, size_t cols) :
LearnableParameter(deviceId, name, TensorShape(rows, cols))
{ }
LearnableParameter(const ScriptableObjects::IConfigRecordPtr configp) :
LearnableParameter(configp->Get(L"deviceId"), L"<placeholder>", configp->Get(L"rows"), configp->Get(L"cols"))
LearnableParameter(configp->Get(L"deviceId"), L"<placeholder>", configp->Get(L"shape"))
{
// TODO: Change dimensions to take a generic tensor instead. That will be a (minor) breaking change that will require fix-ups when converting from NDL to BrainScript.
AttachInputs(configp, this->GetExpectedNumInputs());
// parameters[rows, [cols=1]] plus other optional parameters (needGradient=[true|false], init=[uniform|gaussian|fixedvalue], initValueScale=[1|float], value=[0|float])
// TODO: "needGradient" should be renamed to better match m_parameterUpdateRequired
@ -83,7 +97,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
Base::Save(fstream);
fstream << m_parameterUpdateRequired;
fstream << GetNumRows() << GetNumCols();
fstream << (size_t)0/*#rows in a legacy file format*/ << GetNumCols();
m_sampleLayout.Save(fstream);
fstream << Value();
}
@ -95,8 +110,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
fstream >> m_parameterUpdateRequired;
fstream >> rows >> cols;
SetDims(TensorShape(rows), cols);
TensorShape sampleLayout;
if (rows != 0) // legacy file format
sampleLayout = TensorShape(rows);
else
sampleLayout.Load(fstream);
LoadValue(fstream);
SetDims(sampleLayout, cols); // note: call this after LoadValue() since LoadValue() overwrites m_sampleLayout
}
// initialize with random numbers
@ -106,13 +126,15 @@ namespace Microsoft { namespace MSR { namespace CNTK {
bool initOnCPUOnly) // if true then always init on CPU, making initialization consistent across both (for testing)
{
size_t inputSize = GetNumCols();
//fprintf(stderr, "%d x %d: %d %ls\n", (int)GetNumRows(), (int)GetNumCols(), (int)randomSeed, NodeName().c_str());
// the random seed offset is set via the "randomSeedOffset" parameter in config
if (initOnCPUOnly)
m_value->TransferToDeviceIfNotThereAndNotAutoPlace(CPUDEVICE, true);
if (uniformInit)
{
ElemType randRange = 0.05f * initValueScale; //initValueScale/sqrt(inputSize);
// TODO: move these crazy extra factors out from here and into NDL, and make them visible in BS
ElemType randRange = 0.05f * initValueScale;
Value().SetUniformRandomValue(-randRange, randRange, randomSeed);
}
else
@ -159,7 +181,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
Base::Validate(isFinalValidationPass);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
}
@ -221,6 +243,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// InputValueBase (/*no input*/)
// Base class for InputValue and SparseInputValue (typically fed by a DataReader)
// this covers four types: (regular vs. image) x (non-sparse vs. sparse)
// TODO: add -Node to the class names
// -----------------------------------------------------------------------
template<class ElemType>
@ -228,14 +251,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembers;
void Init(const TensorShape & sampleLayout, size_t cols, bool isSparse)
void Init(const TensorShape & sampleLayout, bool isSparse)
{
m_isSparse = isSparse;
CreateMatrixIfNull(m_value);
if (isSparse)
ConvertToSparseMatrix();
SetDims(sampleLayout, cols);
SetDims(sampleLayout, 0);
UpdateFunctionValuesSize(); // we must allocate the matrix so that the readers get objects with valid row dimensions (some readers expect that)
m_parameterUpdateRequired = false;
}
@ -243,18 +266,19 @@ namespace Microsoft { namespace MSR { namespace CNTK {
InputValueBase(DEVICEID_TYPE deviceId, const wstring & name, bool isSparse) :
Base(deviceId, name)
{
Init(TensorShape(), 0, isSparse);
Init(TensorShape(), isSparse);
}
InputValueBase(DEVICEID_TYPE deviceId, const wstring & name, size_t rows, size_t cols, bool isSparse) :
Base(deviceId, name)
{
Init(TensorShape(rows), cols, isSparse);
cols; // BUGBUG: There should be no 'cols' parameter for InputValues, since they must be minibatches.
Init(TensorShape(rows), isSparse);
}
InputValueBase(DEVICEID_TYPE deviceId, const wstring & name, const TensorShape & imageLayout, size_t numImages, bool isSparse) :
Base(deviceId, name)
{
size_t cols = numImages;
Init(imageLayout, cols, isSparse);
numImages; // BUGBUG: There should be no 'numImages' parameter for InputValues, since they must be minibatches.
Init(imageLayout, isSparse);
}
InputValueBase(const ScriptableObjects::IConfigRecordPtr configp, bool isSparse) :
Base(configp->Get(L"deviceId"), L"<placeholder>")
@ -262,25 +286,18 @@ namespace Microsoft { namespace MSR { namespace CNTK {
AttachInputs(configp, this->GetExpectedNumInputs());
bool isImage = configp->Get(L"isImage");
if (!isImage)
{
size_t rows = configp->Get(L"rows");
size_t cols = configp->Get(L"cols");
Init(TensorShape(rows), cols, isSparse); // no tensor, just a vector
}
Init(configp->Get(L"shape"), isSparse);
else
{
size_t cols = configp->Get(L"numImages"); // This is actually the MB size. --TODO: No need to specify it?
Init(ImageLayoutWHC(configp->Get(L"imageWidth"), configp->Get(L"imageHeight"), configp->Get(L"imageChannels")), cols, isSparse);
}
Init(ImageDimensions::AsTensorShape(configp->Get(L"imageWidth"), configp->Get(L"imageHeight"), configp->Get(L"imageChannels"), ImageLayoutKindFrom(configp->Get(L"imageLayout"))), isSparse);
}
public:
virtual void Save(File& fstream) const override
{
Base::Save(fstream);
size_t rows = GetNumRows(); // using explicitly typed variables to be 100% symmetrical to Load()
size_t cols = m_pMBLayout ? 0 : GetNumCols(); // if this Input depends on MB size, we write it as having 0 dimensions
fstream << rows << cols;
size_t rows = GetNumRows(); // using explicitly typed variables to be 100% symmetrical to Load()
size_t colsDummy = 0; // This should not be saved. InputValues always are minibatches.
fstream << rows << colsDummy;
m_sampleLayout.Save(fstream);
}
@ -288,11 +305,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
Base::Load(fstream, modelVersion);
size_t rows, cols;
fstream >> rows >> cols;
// some older files retained the #columns when saving, which is meaningless
if (m_pMBLayout)
cols = 0;
size_t rows, colsDummy;
fstream >> rows >> colsDummy;
TensorShape sampleLayout;
sampleLayout.Load(fstream);
// some older files may have inconsistent tensor information
@ -302,7 +316,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
NodeName().c_str(), string(sampleLayout).c_str(), (int)rows);
sampleLayout = TensorShape(rows);
}
Init(sampleLayout, cols, m_isSparse);
Init(sampleLayout, m_isSparse);
}
// InputValue must not resize its inputs because that might destroy it. It should already have the correct size.
@ -478,17 +492,16 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
if (isFinalValidationPass && Input(1)->GetNumRows() % Input(0)->GetNumCols() != 0)
InvalidArgument("Mismatched dimension. Rows in input1 must be multiples of cols in input0.");
int wordsInEachSample = Input(1)->GetNumRows() / Input(0)->GetNumCols();
SetDims(Input(0)->GetNumRows() * wordsInEachSample, Input(1)->GetNumCols());
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
// TODO: Should this add a tensor dimension?
SetDims(TensorShape(Input(0)->GetNumRows() * wordsInEachSample), Input(1)->GetNumCols());
}
bool UnitTest()
@ -499,19 +512,19 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t nHidden = 3;
size_t nOutput = 3;
Input(0)->SetDims(nInput, nHidden);
Input(0)->SetDims1(nInput, nHidden);
Input(0)->UpdateFunctionValuesSize();
Input(0)->Value().SetValue(1.0);
Input(1)->Value().TransferFromDeviceToDevice(m_deviceId, CPUDEVICE, true);
Input(1)->Value().SwitchToMatrixType(DENSE, matrixFormatDense, false);
Input(1)->SetDims(nHidden, nOutput);
Input(1)->SetDims1(nHidden, nOutput);
Input(1)->UpdateFunctionValuesSize();
Input(1)->Value().SetValue(0.0);
Input(1)->Value().SetValue(0, 0, 1.0);
Input(1)->Value().SetValue(1, 1, 2.0);
Input(1)->Value().TransferFromDeviceToDevice(CPUDEVICE, m_deviceId, true);
Input(1)->Value().SwitchToMatrixType(SPARSE, matrixFormatSparseCSC, true);
SetDims(nInput, nOutput);
SetDims1(nInput, nOutput);
UpdateFunctionValuesSize();
ForwardProp(FrameRange(m_pMBLayout));

561
Source/ComputationNetworkLib/LinearAlgebraNodes.h
Просмотреть файл

@ -6,10 +6,10 @@
#pragma once
#include "Basics.h"
#include "Matrix.h"
#include "TensorView.h"
#include "ComputationNode.h"
#include "ConvolutionalNodes.h"
#include "Matrix.h"
#include "TensorView.h"
#include <unordered_set>
#include <map>
@ -44,15 +44,16 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
#ifdef ENABLE_TENSORVIEW
static int c = 0; if (c++ == 0) { fprintf(stderr, "#PLUSBP#\n"); }
size_t rank = DetermineElementwiseTensorRank();
auto gradient = GradientTensorFor(rank, fr);
auto gradient = GradientTensorFor(rank, fr);
auto inputGradient = Input(inputIndex)->GradientTensorFor(rank, fr.AllowBroadcast());
// if reduction then mask the respective input(s) (zero out the gaps)
if (Input(inputIndex)->GetNumCols() < GetNumCols())
MaskMissingGradientColumnsToZero(fr);
inputGradient.DoSumOf(0.0f, inputGradient, gradient, 1.0f);
inputGradient.AddCopyOf(gradient);
#else
Matrix<ElemType> gradientValues = GradientFor(fr);
Matrix<ElemType> functionValues = ValueFor(fr);
@ -122,12 +123,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
#if 0//def ENABLE_TENSORVIEW
#ifdef ENABLE_TENSORVIEW
static int c = 0; if (c++ == 0) { fprintf(stderr, "#PLUS#\n"); }
size_t rank = DetermineElementwiseTensorRank();
auto result = ValueTensorFor(rank, fr);
auto result = ValueTensorFor(rank, fr);
auto input0 = Input(0)->ValueTensorFor(rank, fr.AllowBroadcast());
auto input1 = Input(1)->ValueTensorFor(rank, fr.AllowBroadcast());
result.DoSumOf(0.0f, input0, input1, 1.0f);
result.AssignSumOf(input0, input1);
#else
Matrix<ElemType> functionValues = ValueFor(fr);
Matrix<ElemType> inputFunctionValues0 = Input(0)->ValueFor(fr.AllowBroadcast());
@ -215,17 +217,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ElemType sign = inputIndex == 0 ? 1.0f : -1.0f;
#ifdef ENABLE_TENSORVIEW
size_t rank = DetermineElementwiseTensorRank();
auto gradient = GradientTensorFor(rank, fr);
auto gradient = GradientTensorFor(rank, fr);
auto inputGradient = Input(inputIndex)->GradientTensorFor(rank, fr.AllowBroadcast());
// if reduction then mask the respective input(s) (zero out the gaps)
if (Input(inputIndex)->GetNumCols() < GetNumCols())
MaskMissingGradientColumnsToZero(fr);
if (sign > 0)
inputGradient.DoSumOf(0.0f, inputGradient, gradient, 1.0f);
else
inputGradient.DoDifferenceOf(0.0f, inputGradient, gradient, 1.0f);
inputGradient.AddCopyOf(gradient, sign);
#else
Matrix<ElemType> gradientValues = GradientFor(fr);
@ -268,12 +267,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
#ifdef ENABLE_TENSORVIEW
static int c = 0; if (c++ == 0) { fprintf(stderr,"#MINUS#"); }
static int c = 0; if (c++ == 0) { fprintf(stderr,"#MINUS#\n"); }
size_t rank = DetermineElementwiseTensorRank();
auto result = ValueTensorFor(rank, fr);
auto result = ValueTensorFor(rank, fr);
auto input0 = Input(0)->ValueTensorFor(rank, fr.AllowBroadcast());
auto input1 = Input(1)->ValueTensorFor(rank, fr.AllowBroadcast());
result.DoDifferenceOf(0.0f, input0, input1, 1.0f);
result.AssignDifferenceOf(input0, input1);
#else
Matrix<ElemType> functionValues = ValueFor(fr);
Matrix<ElemType> inputFunctionValues0 = Input(0)->ValueFor(fr.AllowBroadcast());
@ -306,73 +305,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template class MinusNode<float>;
template class MinusNode<double>;
#ifndef ENABLE_TENSORVIEW
// -----------------------------------------------------------------------
// ScaleNode (scalar scaling factor, matrix)
//
// Identical to ElementTimesnNode with tensor lib (broadcasting). Can be removed.
// -----------------------------------------------------------------------
template<class ElemType>
class ScaleNode : public ComputationNode<ElemType>, public NumInputs<2>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembersBoilerplate;
static const std::wstring TypeName() { return L"Scale"; }
public:
DeclareConstructorFromConfigWithNumInputs(ScaleNode);
ScaleNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
if (inputIndex == 0) // left derivative
{
// this is a reduction over frames, so we must mask gaps to zero
Input(0)->Gradient() += Matrix<ElemType>::InnerProductOfMatrices(MaskedGradientFor(fr), Input(1)->MaskedValueFor(fr)); // element-wise product summed up over all
}
else if (inputIndex == 1) // right derivative
{
Matrix<ElemType> sliceInput1Grad = Input(1)->GradientFor(fr);
Matrix<ElemType>::Multiply1x1AndWeightedAdd(+1.0f, Input(0)->Value()/*1x1*/, GradientFor(fr), 1.0f, sliceInput1Grad);
}
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The ScaleNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
ValueFor(fr).Assign1x1ProductOf(Input(0)->Value()/*1x1*/, Input(1)->ValueFor(fr));
}
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
// left Node must be a scalar
if (isFinalValidationPass && (Input(0)->GetNumRows() != 1 || Input(0)->GetNumCols() != 1))
RuntimeError("The left value of ScaleNode must be a scalar value.");
SetDims(Input(1));
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(1);
}
};
template class ScaleNode<float>;
template class ScaleNode<double>;
#endif
// -----------------------------------------------------------------------
// NegateNode (input)
// computes the negative of its input
@ -494,6 +426,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
if (isFinalValidationPass && Input(0)->HasMBLayout())
InvalidArgument("%ls %ls operation requires the first factor to not be minibatch data (must not have an MBLayout).", NodeName().c_str(), OperationName().c_str());
InferMBLayoutFromInputsForStandardCase();
//support automatic dimension inference for learnable parameters
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
@ -515,20 +450,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
if (isFinalValidationPass && Input(1)->GetNumRows() != Input(0)->GetNumCols())
LogicError("The inner matrix dimension in the %ls %ls operation does not match (%d vs. %d).", NodeName().c_str(), OperationName().c_str(), (int)Input(1)->GetNumRows(), (int)Input(0)->GetNumCols());
SetDims(rows0, cols1);
if (isFinalValidationPass && Input(0)->HasMBLayout())
InvalidArgument("%ls %ls operation requires the first factor to not be minibatch data (must not have an MBLayout).", NodeName().c_str(), OperationName().c_str());
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(1, false); // the second one is the input since it's columnwise
// TODO: With tensors, inner dimensions must match.
// after multiplication the structure is lost
m_sampleLayout = TensorShape(Input(0)->GetNumRows());
SetDims(TensorShape(rows0), cols1);
}
virtual void AllocateGradientMatricesForInputs(MatrixPool& matrixPool) override
@ -636,6 +561,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
//support automatic dimension inference for learnable parameters
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
@ -654,17 +580,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
if (isFinalValidationPass && Input(1)->GetNumRows() != Input(0)->GetNumRows())
LogicError("The Matrix dimension in the TransposeTimes operation does not match.");
SetDims(cols0, cols1);
InferMBLayoutFromInputsForStandardCase(); // TODO: what does the MBLayout mean in the context of TransposeTimes? Can the left arg have an MBLayout?
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(1, false); //the second one is the input since it's column wize
// TODO: What should the tensor story be?
//after multiplication the structure is lost
m_sampleLayout = TensorShape(Input(0)->GetNumRows());
SetDims(TensorShape(cols0), cols1);
}
};
@ -692,20 +610,17 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
#ifdef ENABLE_TENSORVIEW
size_t rank = DetermineElementwiseTensorRank();
// depending on inputIndex, inputs swap their meaning
// inputIndex == 0 (left) - inputGradientValues[0], inputFunctionValues[1]
// inputIndex == 1 (right) - inputGradientValues[1], inputFunctionValues[0]
auto gradient = GradientTensorFor(rank, fr);
auto gradient = GradientTensorFor(rank, fr);
auto inputGradient = Input(inputIndex)->GradientTensorFor(rank, fr.AllowBroadcast());
auto otherInputValue = Input(1 - inputIndex)->ValueTensorFor(rank, fr.AllowBroadcast());
// if reduction then mask the respective input(s) (zero out the gaps)
if (Input(inputIndex)->GetNumCols() < GetNumCols())
MaskMissingGradientColumnsToZero(fr);
if (Input(1 - inputIndex)->GetNumCols() < GetNumCols())
if (Input(inputIndex)->GetNumCols() < Input(1 - inputIndex)->GetNumCols())
Input(1 - inputIndex)->MaskMissingValueColumnsToZero(fr);
inputGradient.DoElementwiseProductOf(1.0f/*add to*/, gradient, otherInputValue, 1.0f);
inputGradient.AddElementwiseProductOf(gradient, otherInputValue);
#else
Matrix<ElemType> sliceInput0Grad = Input(inputIndex)->GradientFor(fr);
Matrix<ElemType> sliceOutputGrad = GradientFor(fr);
@ -723,12 +638,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
#ifdef ENABLE_TENSORVIEW
static int c = 0; if (c++ == 0) { fprintf(stderr,"#ETIMES#"); }
static int c = 0; if (c++ == 0) { fprintf(stderr,"#ETIMES#\n"); }
size_t rank = DetermineElementwiseTensorRank();
auto result = ValueTensorFor(rank, fr);
auto result = ValueTensorFor(rank, fr);
auto input0 = Input(0)->ValueTensorFor(rank, fr.AllowBroadcast());
auto input1 = Input(1)->ValueTensorFor(rank, fr.AllowBroadcast());
result.DoElementwiseProductOf(0.0f, input0, input1, 1.0f);
result.AssignElementwiseProductOf(input0, input1);
#else
Matrix<ElemType> sliceInput0Value = Input(0)->ValueFor(fr);
Matrix<ElemType> sliceInput1Value = Input(1)->ValueFor(fr);
@ -743,317 +658,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template class ElementTimesNode<float>;
template class ElementTimesNode<double>;
#ifndef ENABLE_TENSORVIEW
// -----------------------------------------------------------------------
// RowElementTimesNode (left, right) --TODO: what are left and right?
//
// TODO: This is subsumed by ElementTimes with tensor lib.
// -----------------------------------------------------------------------
template<class ElemType>
class RowElementTimesNode : public ComputationNode<ElemType>, public NumInputs<2>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembersBoilerplate;
static const std::wstring TypeName() { return L"RowElementTimes"; }
public:
DeclareConstructorFromConfigWithNumInputs(RowElementTimesNode);
RowElementTimesNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
void BackpropToMap(const size_t inputIndex)
{
if (inputIndex > 1)
InvalidArgument("RowElementTimes operation only takes two inputs.");
if (inputIndex == 0)
{
BackpropToLeftS(Input(1)->Value(), Input(0)->Gradient(), Gradient(), *m_tempMatrix);
}
else
{
BackpropToRightS(Input(0)->Value(), Input(1)->Gradient(), Gradient(), *m_tempMatrix);
}
}
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
if (fr.IsAllFrames()) { BackpropToMap(inputIndex); return; } // TODO: remove these one by one
Matrix<ElemType> sliceInput0Grad = Input(inputIndex)->GradientFor(fr);
Matrix<ElemType> sliceOutputGrad = GradientFor(fr);
Matrix<ElemType> sliceInput1Value = Input(1 - inputIndex)->ValueFor(fr);
if (inputIndex == 0)
{
BackpropToLeftS(sliceInput1Value, sliceInput0Grad, sliceOutputGrad, *m_tempMatrix);
}
else
{
BackpropToRightS(sliceInput1Value, sliceInput0Grad, sliceOutputGrad, *m_tempMatrix);
}
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The RowElementTimesNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
//left (input 0) is a matrix
/*TODO: merge with call site*/void BackpropToLeftS(Matrix<ElemType>& input1FunctionValues,
Matrix<ElemType>& input0GradientValues,
const Matrix<ElemType>& gradientValues,
Matrix<ElemType>& tempMatrix)
{
tempMatrix.SetValue(gradientValues);
tempMatrix.RowElementMultiplyWith(input1FunctionValues);
input0GradientValues += tempMatrix;
#if NANCHECK
input0GradientValues.HasNan("RowElementTimes");
#endif
}
//right (input 1) is a row vector
/*TODO: merge with call site*/void BackpropToRightS(Matrix<ElemType>& input0FunctionValues,
Matrix<ElemType>& input1GradientValues,
const Matrix<ElemType>& gradientValues,
Matrix<ElemType>& tempMatrix)
{
tempMatrix.AssignInnerProductOf(gradientValues, input0FunctionValues, true);
input1GradientValues += tempMatrix;
#if NANCHECK
input1GradientValues.HasNan("RowElementTimes");
#endif
}
void ForwardPropMap() // TODO: This is a stop-gap; in most cases, we should just be able to delete this (but need to review one by one)
{
ForwardPropS(Value(), Input(0)->Value(), Input(1)->Value());
}
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
//if (fr.IsAllFrames()) { ForwardPropMap(); return; }
Matrix<ElemType> sliceInput0Value = Input(0)->ValueFor(fr);
Matrix<ElemType> sliceInput1Value = Input(1)->ValueFor(fr);
Matrix<ElemType> sliceOutputValue = ValueFor(fr);
ForwardPropS(sliceOutputValue, sliceInput0Value, sliceInput1Value);
}
/*TODO: merge with call site*/void ForwardPropS(Matrix<ElemType>& functionValues, const Matrix<ElemType>& input0, const Matrix<ElemType>& input1)
{
functionValues.SetValue(input0);
functionValues.RowElementMultiplyWith(input1);
#if NANCHECK
functionValues.HasNan("RowElementTimes");
#endif
}
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
size_t rows1 = Input(1)->GetNumRows(), cols1 = Input(1)->GetNumCols(); rows0;
if (isFinalValidationPass && cols0 != cols1 || rows1 != 1)
LogicError("RowElementTimes: Either the second operand is not a row vector or the number of columns of operands does not match.");
SetDims(Input(0));
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
// input 0 is the matrix and input 1 is a row vector
InferImageDimsFromInput(0);
}
//request matrices that are needed for gradient computation
virtual void RequestMatricesBeforeBackprop(MatrixPool& matrixPool)
{
Base::RequestMatricesBeforeBackprop(matrixPool);
RequestMatrixFromPool(m_tempMatrix, matrixPool);
}
//release gradient and temp matrices that no longer needed after all the children's gradients are computed.
virtual void ReleaseMatricesAfterBackprop(MatrixPool& matrixPool)
{
Base::ReleaseMatricesAfterBackprop(matrixPool);
ReleaseMatrixToPool(m_tempMatrix, matrixPool);
}
private:
shared_ptr<Matrix<ElemType>> m_tempMatrix;
};
template class RowElementTimesNode<float>;
template class RowElementTimesNode<double>;
// -----------------------------------------------------------------------
// ColumnElementTimesNode (left, right) --TODO: what are left and right?
//
// TODO: This is subsumed by ElementTimes with tensor lib.
// -----------------------------------------------------------------------
template<class ElemType>
class ColumnElementTimesNode : public ComputationNode<ElemType>, public NumInputs<2>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembersBoilerplate;
static const std::wstring TypeName() { return L"ColumnElementTimes"; }
public:
DeclareConstructorFromConfigWithNumInputs(ColumnElementTimesNode);
ColumnElementTimesNode(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
void BackpropToMap(const size_t inputIndex)
{
if (inputIndex > 1)
InvalidArgument("ColumnElementTimes operation only takes two inputs.");
if (inputIndex == 0)
{
BackpropToLeftS(Input(1)->Value(), Input(0)->Gradient(), Gradient(), *m_tempMatrix);
}
else
{
BackpropToRightS(Input(0)->Value(), Input(1)->Gradient(), Gradient(), *m_tempMatrix);
}
}
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
if (fr.IsAllFrames()) { BackpropToMap(inputIndex); return; } // TODO: remove these one by one
Matrix<ElemType> sliceOutputGrad = GradientFor(fr);
if (inputIndex == 0)
{
Matrix<ElemType> sliceInput0Grad = Input(0)->GradientFor(fr);
BackpropToLeftS(Input(1)->Value(), sliceInput0Grad, sliceOutputGrad, *m_tempMatrix);
}
else
{
Matrix<ElemType> sliceInput0Value = Input(0)->ValueFor(fr);
BackpropToRightS(sliceInput0Value, Input(1)->Gradient(), sliceOutputGrad, *m_tempMatrix);
}
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The ColumnElementTimesNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
//left (input 0) is a matrix
/*TODO: merge with call site*/void BackpropToLeftS(Matrix<ElemType>& input1FunctionValues,
Matrix<ElemType>& input0GradientValues,
const Matrix<ElemType>& gradientValues,
Matrix<ElemType>& tempMatrix)
{
tempMatrix.SetValue(gradientValues);
tempMatrix.ColumnElementMultiplyWith(input1FunctionValues);
input0GradientValues += tempMatrix;
#if NANCHECK
input0GradientValues.HasNan("ColumnElementTimes");
#endif
}
//right (input 1) is a col vector
/*TODO: merge with call site*/void BackpropToRightS(Matrix<ElemType>& input0FunctionValues,
Matrix<ElemType>& input1GradientValues,
const Matrix<ElemType>& gradientValues,
Matrix<ElemType>& tempMatrix)
{
tempMatrix.AssignInnerProductOf(gradientValues, input0FunctionValues, false);
input1GradientValues += tempMatrix;
#if NANCHECK
input1GradientValues.HasNan("ColumnElementTimes");
#endif
}
void ForwardPropMap() // TODO: This is a stop-gap; in most cases, we should just be able to delete this (but need to review one by one)
{
ForwardPropS(Value(), Input(0)->Value(), Input(1)->Value());
}
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
//if (fr.IsAllFrames()) { ForwardPropMap(); return; }
Matrix<ElemType> sliceInput0Value = Input(0)->ValueFor(fr);
Matrix<ElemType> sliceOutputValue = ValueFor(fr);
ForwardPropS(sliceOutputValue, sliceInput0Value, Input(1)->Value());
}
/*TODO: merge with call site*/void ForwardPropS(Matrix<ElemType>& functionValues, const Matrix<ElemType>& input0, const Matrix<ElemType>& input1)
{
functionValues.SetValue(input0);
functionValues.ColumnElementMultiplyWith(input1);
#if NANCHECK
functionValues.HasNan("ColumnElementTimes");
#endif
}
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
//derive number of rows if possible
for (size_t index = 0; index < 2; index++)
{
size_t rows = Input(index)->GetNumRows() == 0 ? Input(1 - index)->GetNumRows() : Input(index)->GetNumRows();
size_t cols = Input(index)->GetNumCols() == 0 ? Input(1 - index)->GetNumCols() : Input(index)->GetNumCols();
ValidateInferInputDims(index, rows, cols);
}
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
size_t rows1 = Input(1)->GetNumRows(), cols1 = Input(1)->GetNumCols(); cols0;
if (isFinalValidationPass && (rows0 != rows1 || cols1 != 1))
LogicError("ColumnElementTimes: Either the second operand is not a column vector or the number of rows of operands does not match.");
SetDims(Input(0));
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
// input 0 is a matrix and input 1 is a column vector
InferImageDimsFromInput(0);
}
//request matrices that are needed for gradient computation
virtual void RequestMatricesBeforeBackprop(MatrixPool& matrixPool)
{
Base::RequestMatricesBeforeBackprop(matrixPool);
RequestMatrixFromPool(m_tempMatrix, matrixPool);
}
//release gradient and temp matrices that no longer needed after all the children's gradients are computed.
virtual void ReleaseMatricesAfterBackprop(MatrixPool& matrixPool)
{
Base::ReleaseMatricesAfterBackprop(matrixPool);
ReleaseMatrixToPool(m_tempMatrix, matrixPool);
}
private:
shared_ptr<Matrix<ElemType>> m_tempMatrix;
};
template class ColumnElementTimesNode<float>;
template class ColumnElementTimesNode<double>;
#endif
// -----------------------------------------------------------------------
// DiagTimesNode (vector representing the diagonal of a square matrix, data)
// -----------------------------------------------------------------------
@ -1107,6 +711,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
//if dimension not specified we assume two operands' dimensions should match
if (Input(0)->GetNumRows() == 0 && Input(1)->GetNumRows() != 0)
@ -1124,14 +729,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
LogicError("The first matrix should be a vector representing the diagonal of a square matrix in the DiagTimes operation.");
}
SetDims(Input(0)->GetNumRows(), Input(1)->GetNumCols());
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs() //this is element wise scaling, so based on child 1
{
InferImageDimsFromInput(1);
// TODO: Should Input(0) have a specific tensor structure? E.g. match Input(1)?
SetDims(Input(1));
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
@ -1211,17 +810,8 @@ private:
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
SetDims(1, 1);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
SetDims(TensorShape(1), 1);
}
};
@ -1232,6 +822,7 @@ private:
// SumColumnElementsNode (input)
// sums up each column of the input
// TODO: This should be deprecated, in favor of a reduce node.
// TODO: Implement this with the tensor library.
// -----------------------------------------------------------------------
template<class ElemType>
@ -1280,17 +871,9 @@ private:
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
SetDims(1, Input(0)->GetNumCols());
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
SetDims(TensorShape(1), Input(0)->GetNumCols()); // each column is reduced to a scalar
}
};
@ -1366,22 +949,14 @@ private:
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
SetDims(cols0, rows0);
if (Input(0)->HasMBLayout())
InvalidArgument("%ls %ls operation cannot operate on minibatch data (which have a layout)", NodeName().c_str(), OperationName().c_str());
m_pMBLayout = nullptr; // this node does not hold mini-batch data
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false); // the second one is the input since it's column wize
// after transposition, the structure is lost
m_sampleLayout = TensorShape(Input(0)->GetNumCols());
if (Input(0)->HasSampleLayout()) // must be a plain matrix without tensor substructure
InvalidArgument("%ls %ls operation cannot operate on input tensors", NodeName().c_str(), OperationName().c_str());
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
SetDims(TensorShape(cols0), rows0);
}
};
@ -1412,16 +987,6 @@ private:
}
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, true);
m_sampleLayout = TensorShape(m_sampleLayout.GetHeight());
if (m_inputSampleLayout.GetWidth() * m_inputSampleLayout.GetNumChannels() != 1)
fprintf(stderr, "WARNING: Diagonal operation cannot inherit image size information from its child. Image size info is lost.\n");
}
virtual void PrintSelfBeforeValidation(bool allowNulls = false) const
{
fprintf(stderr, "\nValidating --> %ls = %ls", NodeName().c_str(), OperationName().c_str());
@ -1464,8 +1029,10 @@ private:
if (isFinalValidationPass && dim != Input(0)->GetNumRows())
InvalidArgument("%ls %ls operation requires a square matrix as its input.", NodeName().c_str(), OperationName().c_str());
SetDims(1, dim);
InferImageDimsFromInputs();
if (Input(0)->HasSampleLayout())
fprintf(stderr, "WARNING: Diagonal operation cannot inherit image size information from its child. Image size info is lost.\n");
SetDims(TensorShape(1), dim);
}
virtual void /*ComputationNodeNonLooping::*/ForwardPropNonLooping() override
@ -1572,6 +1139,8 @@ private:
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
ValidateInferBinaryInputDims();
#if 0
@ -1579,16 +1148,9 @@ private:
LogicError("%ls %ls operation: The input dimensions do not match.", NodeName().c_str(), OperationName().c_str());
#endif
SetDims(1, Input(1)->GetNumCols());
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
// TODO: We could do something more interesting with tensors.
// E.g. apply a cos distance of a whole set of data with a single reference.
SetDims(TensorShape(1), Input(1)->GetNumCols());
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
@ -1695,7 +1257,7 @@ private:
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
//support automatic dimension inference for learnable parameters
size_t rows0 = Input(0)->GetNumRows(), cols0 = Input(0)->GetNumCols();
@ -1710,17 +1272,9 @@ private:
if (isFinalValidationPass && !HasMBLayout() && Input(1)->GetNumCols() != Input(0)->GetNumCols())
LogicError("The Matrices should have same number of columns.");
SetDims(rows0 * rows1, Input(0)->GetNumCols());
}
virtual void InferImageDimsFromInputs()
{
// since it's symmetrical any one of the input may be the true input.
// since we dont' use the input image size info in the operation, the input part doesn't matter.
InferImageDimsFromInput(1, false);
// after KhatriRaoProduct the structure is lost
m_sampleLayout = TensorShape(m_value->GetNumRows());
// TODO: ^^ Is that correctWhat is the correct sample layout?
SetDims(TensorShape(rows0 * rows1), Input(0)->GetNumCols());
}
};
@ -1911,9 +1465,10 @@ private:
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
//if dimension is missing make the two operatants to have same size
// TODO: use a for loop??
// TODO: use a for loop?? Or don't we have a function for this?
size_t index = 0;
{
size_t rows = Input(index)->GetNumRows() == 0 ? Input(1 - index)->GetNumRows() : Input(index)->GetNumRows();
@ -1938,16 +1493,8 @@ private:
// input(2) is shift, input(3) is the #neg
size_t negNumber = (size_t)Input(3)->Get00Element();
SetDims(negNumber + 1, Input(1)->GetNumCols());
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
// TODO: This calls for a tensor representation!
SetDims(TensorShape(negNumber + 1), Input(1)->GetNumCols());
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override

382
Source/ComputationNetworkLib/NonlinearityNodes.h
Просмотреть файл

@ -5,6 +5,11 @@
//
#pragma once
#include "Basics.h"
#include "ComputationNode.h"
#include "Matrix.h"
#include "TensorView.h"
#include <unordered_set>
#include <map>
#include <string>
@ -18,27 +23,110 @@
#include <sstream>
#include <iostream>
#include "Basics.h"
#include "Matrix.h"
#include "ComputationNode.h"
namespace Microsoft { namespace MSR { namespace CNTK {
#ifdef ENABLE_TENSORVIEW
// -----------------------------------------------------------------------
// NonlinearityNodeBase (input) -- abstract base class that holds what's shared
// between non-linearity nodes like Sigmoid
// UnaryElementWiseWithOpCodeNodeBase (input) -- base for elementwise unary op
// where forward // and backward are single ElementWiseOperator opcodes and
// only inputs (but not // function values) are used.
// -----------------------------------------------------------------------
template<class ElemType, ElementWiseOperator opForward, ElementWiseOperator opBackward>
class UnaryElementWiseWithOpCodeNodeBase : public ComputationNode<ElemType>, public NumInputs<1>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembers;
public:
UnaryElementWiseWithOpCodeNodeBase(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override
{
static int c = 0; if (c++ == 0) { fprintf(stderr, "#NLop%d#\n", (int)opForward); }
size_t rank = DetermineElementwiseTensorRank();
auto result = ValueTensorFor(rank, fr);
auto input = Input(0)->ValueTensorFor(rank, fr);
result.DoUnaryOpOf(0, input, 1, opForward);
}
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
assert(inputIndex == 0); inputIndex;
// get the args
size_t rank = DetermineElementwiseTensorRank();
auto sliceOutputGrad = GradientTensorFor(rank, fr); // propagate from this one...
auto sliceInputGrad = Input(0)->GradientTensorFor(rank, fr); // ...to this one
auto sliceInputValue = Input(0)->ValueTensorFor(rank, fr);
// do the actual operation
sliceInputGrad.DoBinaryOpOf(1, sliceOutputGrad, sliceInputValue, 1, opBackward);
}
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
ValidateUnaryMap(isFinalValidationPass);
}
// We don't need our output values in backprop.
virtual bool OutputUsedInComputingInputNodesGradients() const override { return false; }
};
#define UnaryElementWiseWithOpCodeNodeBaseMembers UsingComputationNodeMembersBoilerplate;
// -----------------------------------------------------------------------
// SigmoidNode (input)
// TanhNode (input)
// RectifiedLinearNode (input)
// LogNode (input)
// ExpNode (input)
// CosineNode (input)
// These are all implemented by single-opcode functions and can thus be declared by a macro.
// -----------------------------------------------------------------------
#pragma push_macro("DeclareUnaryTensorOp")
#define DeclareUnaryElementWiseWithOpCodeNode(Name, Forward, Backward) \
template<class ElemType> \
class Name ## Node : public UnaryElementWiseWithOpCodeNodeBase<ElemType, op ## Forward, op ## Backward> \
{ \
typedef UnaryElementWiseWithOpCodeNodeBase<ElemType, op ## Forward, op ## Backward> Base; UnaryElementWiseWithOpCodeNodeBaseMembers; \
static const std::wstring TypeName() { return L ## #Name; } \
public: \
DeclareConstructorFromConfigWithNumInputs(Name ## Node); \
Name ## Node(DEVICEID_TYPE deviceId, const wstring & Name) : \
Base(deviceId, Name) \
{ } \
}
// Name Forward and Backward opcodes
DeclareUnaryElementWiseWithOpCodeNode(Sigmoid, Sigmoid, ElementwiseProductWithSigmoidDerivative);
DeclareUnaryElementWiseWithOpCodeNode(Tanh, Tanh, ElementwiseProductWithTanhDerivative);
DeclareUnaryElementWiseWithOpCodeNode(RectifiedLinear, LinearRectifier, ElementwiseProductWithLinearRectifierDerivative);
DeclareUnaryElementWiseWithOpCodeNode(Log, Log, ElementwiseQuotient);
DeclareUnaryElementWiseWithOpCodeNode(Exp, Exp, ElementwiseProductWithExp);
DeclareUnaryElementWiseWithOpCodeNode(Cosine, Cosine, ElementwiseProductWithCosDerivative);
#pragma pop_macro("DeclareUnaryTensorOp")
#endif
// -----------------------------------------------------------------------
// SoftmaxNodeBase (input) -- shared base of Softmax and LogSoftmax
// -----------------------------------------------------------------------
// shared base for all element-wise non-linearities
// What this adds over a ComputationNode<ElemType> is a member m_gradientTemp for temp use by derived classes.
// TODO: This was used more broadly, but no longer, so we may be able to simplify the signatures of the virtual functions.
template<class ElemType>
class NonlinearityNodeBase : public ComputationNode<ElemType>, public NumInputs<1>
class SoftmaxNodeBase : public ComputationNode<ElemType>, public NumInputs<1>
{
typedef ComputationNode<ElemType> Base; UsingComputationNodeMembers;
public:
//virtual ComputationNodeBase * NewThis(DEVICEID_TYPE deviceId, const wstring & name) = 0;
DeclareConstructorFromConfigWithNumInputs(NonlinearityNodeBase);
NonlinearityNodeBase(DEVICEID_TYPE deviceId, const wstring & name) :
DeclareConstructorFromConfigWithNumInputs(SoftmaxNodeBase);
SoftmaxNodeBase(DEVICEID_TYPE deviceId, const wstring & name) :
Base(deviceId, name)
{ }
@ -54,7 +142,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
auto sliceOutputValue = OutputUsedInComputingInputNodesGradients() ? ValueFor(fr) : Matrix<ElemType>();
// do the actual operation
// TODO: Once all is unified then make the order of arguments more logical (in -> out)
BackpropToV(*m_gradientTemp, sliceInputValue, sliceInputGrad, sliceOutputGrad, sliceOutputValue);
}
@ -80,7 +167,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
Base::CopyTo(nodeP, newName, flags);
if (flags & CopyNodeFlags::copyNodeValue)
{
auto node = dynamic_pointer_cast<NonlinearityNodeBase<ElemType>>(nodeP);
auto node = dynamic_pointer_cast<SoftmaxNodeBase<ElemType>>(nodeP);
*node->m_gradientTemp = *m_gradientTemp;
}
}
@ -102,250 +189,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
shared_ptr<Matrix<ElemType>> m_gradientTemp;
};
#define UsingNonlinearityNodeBaseMembers UsingComputationNodeMembersBoilerplate; using Base::m_gradientTemp
// -----------------------------------------------------------------------
// RectifiedLinearNode (input) -- ReLU non-linearity
// -----------------------------------------------------------------------
template<class ElemType>
class RectifiedLinearNode : public NonlinearityNodeBase<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
static const std::wstring TypeName() { return L"RectifiedLinear"; }
public:
DeclareConstructorFromConfigWithNumInputs(RectifiedLinearNode);
RectifiedLinearNode(DEVICEID_TYPE deviceId, const wstring & name) :
NonlinearityNodeBase<ElemType>(deviceId, name)
{ }
void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues) override
{
gradient.AssignLinearRectifierDerivativeOf(inputFunctionValues);
#if DUMPOUTPUT
inputGradientValues.Print("RecitifiedLinearNode-Partial-in");
#endif
inputGradientValues.AddElementProductOf(gradientValues, gradient);
#if DUMPOUTPUT
inputGradientValues.Print("RecitifiedLinearNode-Partial-out");
#endif
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The ReLU node does not require its output value for computing
// the gradients of its input nodes
return false;
}
void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignTruncateBottomOf(inputFunctionValues, 0);
#if DUMPOUTPUT
functionValues.Print("RectifiedLinearNode");
#endif
}
};
template class RectifiedLinearNode<float>;
template class RectifiedLinearNode<double>;
// -----------------------------------------------------------------------
// SigmoidNode (input) -- sigmoid non-linearity
// -----------------------------------------------------------------------
template<class ElemType>
class SigmoidNode : public NonlinearityNodeBase<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
static const std::wstring TypeName() { return L"Sigmoid"; }
public:
DeclareConstructorFromConfigWithNumInputs(SigmoidNode);
SigmoidNode(DEVICEID_TYPE deviceId, const wstring & name) :
NonlinearityNodeBase<ElemType>(deviceId, name)
{ }
virtual bool InputUsedInComputingInputNodesGradients(size_t childIndex) const override
{
// The Sigmoid node does not require any of it's input's values for computing
// the gradients of its input nodes
UNREFERENCED_PARAMETER(childIndex);
return false;
}
/*virtual*/ void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues)
{
gradient.AssignSigmoidDerivativeOf(functionValues);
inputGradientValues.AddElementProductOf(gradientValues, gradient);
}
/*virtual*/ void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignSigmoidOf(inputFunctionValues);
}
};
template class SigmoidNode<float>;
template class SigmoidNode<double>;
// -----------------------------------------------------------------------
// TanhNode (input) -- tanh non-linearity
// -----------------------------------------------------------------------
template<class ElemType>
class TanhNode : public NonlinearityNodeBase<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
static const std::wstring TypeName() { return L"Tanh"; }
public:
DeclareConstructorFromConfigWithNumInputs(TanhNode);
TanhNode(DEVICEID_TYPE deviceId, const wstring & name) :
NonlinearityNodeBase<ElemType>(deviceId, name)
{ }
virtual bool InputUsedInComputingInputNodesGradients(size_t childIndex) const override
{
// The plus node does not require any of it's input's values for computing
// the gradients of its input nodes
UNREFERENCED_PARAMETER(childIndex);
return false;
}
/*virtual*/ void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues)
{
gradient.AssignElementProductOf(functionValues, functionValues); // v .* v
gradient.AssignDifferenceOf(1, gradient); // 1-v^2
inputGradientValues.AddElementProductOf(gradientValues, gradient); // += d .* ((1-v) .* v))
}
/*virtual*/ void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignTanhOf(inputFunctionValues);
}
};
template class TanhNode<float>;
template class TanhNode<double>;
// -----------------------------------------------------------------------
// LogNode (input) -- component-wise log() of input
// -----------------------------------------------------------------------
template<class ElemType>
class LogNode : public NonlinearityNodeBase<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
static const std::wstring TypeName() { return L"Log"; }
public:
DeclareConstructorFromConfigWithNumInputs(LogNode);
LogNode(DEVICEID_TYPE deviceId, const wstring & name) :
NonlinearityNodeBase<ElemType>(deviceId, name)
{ }
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The plus node does not require its output value for computing
// the gradients of its input nodes
return false;
}
/*virtual*/ void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues)
{
gradient.AssignElementInverseOf(inputFunctionValues); // 1/x (x is input to log(x))
inputGradientValues.AddElementProductOf(gradientValues, gradient);
}
/*virtual*/ void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignLogOf(inputFunctionValues);
}
};
template class LogNode<float>;
template class LogNode<double>;
// -----------------------------------------------------------------------
// ExpNode (input) -- component-wise exp() of input
// -----------------------------------------------------------------------
template<class ElemType>
class ExpNode : public NonlinearityNodeBase<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
static const std::wstring TypeName() { return L"Exp"; }
public:
DeclareConstructorFromConfigWithNumInputs(ExpNode);
ExpNode(DEVICEID_TYPE deviceId, const wstring & name) :
NonlinearityNodeBase<ElemType>(deviceId, name)
{ }
virtual void /*ComputationNode::*/BackpropTo(const size_t inputIndex, const FrameRange & fr) override
{
assert(inputIndex == 0); inputIndex;
Matrix<ElemType> sliceInputGrad = Input(0)->GradientFor(fr);
Matrix<ElemType> sliceOutputGrad = GradientFor(fr);
Matrix<ElemType> sliceInputValue = Input(0)->ValueFor(fr);
m_gradientTemp->AssignExpOf(sliceInputValue); // Exp(x) is its own partial
sliceInputGrad.AddElementProductOf(sliceOutputGrad, *m_gradientTemp);
}
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The ExpNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
virtual void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues) override { NOT_IMPLEMENTED; } // not needed
void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignExpOf(inputFunctionValues);
}
};
template class ExpNode<float>;
template class ExpNode<double>;
// -----------------------------------------------------------------------
// CosineNode (input) -- component-wise cos() of input
// -----------------------------------------------------------------------
template<class ElemType>
class CosineNode : public NonlinearityNodeBase<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
static const std::wstring TypeName() { return L"Cosine"; }
public:
DeclareConstructorFromConfigWithNumInputs(CosineNode);
CosineNode(DEVICEID_TYPE deviceId, const wstring & name) :
NonlinearityNodeBase<ElemType>(deviceId, name)
{ }
virtual bool OutputUsedInComputingInputNodesGradients() const override
{
// The CosineNode does not require its output value for computing
// the gradients of its input nodes
return false;
}
/*virtual*/ void BackpropToV(Matrix<ElemType>& gradient, const Matrix<ElemType>& inputFunctionValues, Matrix<ElemType>& inputGradientValues, const Matrix<ElemType>& gradientValues, const Matrix<ElemType>& functionValues)
{
gradient.AssignNegativeSineOf(inputFunctionValues); // -sin(x) (x is input to Cosine(x))
inputGradientValues.AddElementProductOf(gradientValues, gradient);
}
/*virtual*/ void ForwardPropV(Matrix<ElemType>& functionValues, const Matrix<ElemType>& inputFunctionValues) override
{
functionValues.AssignCosineOf(inputFunctionValues);
}
};
template class CosineNode<float>;
template class CosineNode<double>;
#define UsingSoftmaxNodeBaseMembers UsingComputationNodeMembersBoilerplate; using Base::m_gradientTemp
// -----------------------------------------------------------------------
// SoftmaxNode (input) -- soft-max over input vector(s)
@ -354,14 +198,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
//we assume it's column-wise by default
//the derivative will increase the Matrix<ElemType> size to the power of column size and should not be used.
template<class ElemType>
class SoftmaxNode : public NonlinearityNodeBase<ElemType>
class SoftmaxNode : public SoftmaxNodeBase<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"Softmax"; }
public:
DeclareConstructorFromConfigWithNumInputs(SoftmaxNode);
SoftmaxNode(DEVICEID_TYPE deviceId, const wstring & name) :
NonlinearityNodeBase<ElemType>(deviceId, name)
Base(deviceId, name)
{ }
virtual bool InputUsedInComputingInputNodesGradients(size_t childIndex) const override
@ -421,14 +265,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// -----------------------------------------------------------------------
template<class ElemType>
class LogSoftmaxNode : public NonlinearityNodeBase<ElemType>
class LogSoftmaxNode : public SoftmaxNodeBase<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"LogSoftmax"; }
public:
DeclareConstructorFromConfigWithNumInputs(LogSoftmaxNode);
LogSoftmaxNode(DEVICEID_TYPE deviceId, const wstring & name) :
NonlinearityNodeBase<ElemType>(deviceId, name)
Base(deviceId, name)
{ }
virtual bool InputUsedInComputingInputNodesGradients(size_t childIndex) const override
@ -786,6 +630,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
InferMBLayoutFromInputsForStandardCase();
size_t rows[4], cols[4];
for (int i = 0; i < 4; i++)
@ -809,16 +654,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
LogicError("GMMLogLikelihoodNode: the number of rows in mean (second input) should equal rows(unnormedPrior(first input) * rows(feature(fourth input)).");
}
SetDims(1, cols[3]);
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(3, false);
m_sampleLayout = TensorShape();
SetDims(TensorShape(1), cols[3]);
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
@ -1002,9 +838,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// this node is not differentiable and so cannot be used in the backpropagation
// TODO: make function value sparse?
template<class ElemType>
class HardmaxNode : public NonlinearityNodeBase/*ComputationNode*/<ElemType>
class HardmaxNode : public SoftmaxNodeBase/*ComputationNode*/<ElemType>
{
typedef NonlinearityNodeBase<ElemType> Base; UsingNonlinearityNodeBaseMembers;
typedef SoftmaxNodeBase<ElemType> Base; UsingSoftmaxNodeBaseMembers;
static const std::wstring TypeName() { return L"Hardmax"; }
public:

4
Source/ComputationNetworkLib/RecurrentNodes.h
Просмотреть файл

@ -91,7 +91,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_initialActivationValue = initialActivationValue;
m_timeStep = 1;
CreateMatrixIfNull(m_value);
SetDims(row_size, col_size);
SetDims(TensorShape(row_size), col_size); // TODO: needed? Can we not infer it? How about setting a sample layout?
m_isHistoryCarryOverManagedExternally = false; // used for PairNetworkNode/PastValueNode combination
}
protected:
@ -149,7 +149,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
fstream >> rows >> cols;
// Note: Do we need load cols for delay node? I just set to zero to see if there is any problem.
SetDims(rows, 0);
SetDims(TensorShape(rows), 0); // tensor shape will be overwritten in Validate() --TODO: We should serialize it here.
m_delayedActivation.Resize(rows, 0); // Note: If we try to access history in first minibatch, we shall crash. It would be a consequence of a missing sentence-begin flag
if (modelVersion >= CNTK_MODEL_VERSION_2)

176
Source/ComputationNetworkLib/ReshapingNodes.h
Просмотреть файл

@ -170,8 +170,9 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_targetImageLayout(imageLayout)
{ }
ReshapeNode(const ScriptableObjects::IConfigRecordPtr configp) :
ReshapeNode(configp->Get(L"deviceId"), L"<placeholder>", configp->Get(L"numRows"), ImageLayoutWHC(configp->Get(L"imageWidth"), configp->Get(L"imageHeight"), configp->Get(L"imageChannels")))
ReshapeNode(configp->Get(L"deviceId"), L"<placeholder>", configp->Get(L"numRows"), ImageDimensions::AsTensorShape(configp->Get(L"imageWidth"), configp->Get(L"imageHeight"), configp->Get(L"imageChannels"), ImageLayoutKind::HWC/*legacy*/))
{
// BUGBUG: We should not operate on image layouts here, but on a proper tensor layout.
AttachInputs(configp, this->GetExpectedNumInputs());
}
@ -200,26 +201,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_targetImageLayout.Load(fstream);
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, true);
InferImageDimensions();
// setting any dimension to 0 means lose the tensor, flatten to vector
// TODO: We can use 0 to indicate "infer". One value can be 0. It will be filled in to match row dim.
if (m_targetImageLayout.GetWidth() == 0 || m_targetImageLayout.GetHeight() == 0 || m_targetImageLayout.GetNumChannels() == 0)
{
// TODO: We need to decide what reshaping means in presence of a tensor.
m_sampleLayout = TensorShape(m_numTargetRows);
if (m_inputSampleLayout.GetWidth() * m_inputSampleLayout.GetNumChannels() != 1)
fprintf(stderr, "WARNING: Reshape operation cannot inherit image size information from its child. Image size info is lost.\n");
}
else
{
m_sampleLayout = m_targetImageLayout;
}
}
virtual void /*IComputationNode::*/PrintSelfBeforeValidation() const override
{
fprintf(stderr, "\nValidating --> %ls = %ls", NodeName().c_str(), OperationName().c_str());
@ -234,12 +215,22 @@ namespace Microsoft { namespace MSR { namespace CNTK {
else
fprintf(stderr, "%ls[%lu, %lu]", child->NodeName().c_str(), child->GetNumRows(), child->GetNumCols());
}
fprintf(stderr, ", NumOfRows=%lu, imageWidth=%lu, imageHeight=%lu, imageChannels=%lu)", m_numTargetRows, m_targetImageLayout.GetWidth(), m_targetImageLayout.GetHeight(), m_targetImageLayout.GetNumChannels());
fprintf(stderr, ", NumOfRows=%lu, imageWidth=%lu, imageHeight=%lu, imageChannels=%lu)", m_numTargetRows, m_targetImageLayout[1], m_targetImageLayout[2], m_targetImageLayout[0]);
// BUGBUG: This interpretaion as image dims is only correct for the 'legacy format, not for cudnn.
}
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
if (factor() == 1) // canonical case: keeps the MBLayout(e.g. only changing the TensorShape)
m_pMBLayout = Input(0)->GetMBLayout();
else if (Input(0)->HasMBLayout())
{
if (!m_pMBLayout)
m_pMBLayout = make_shared<MBLayout>(); // mini-batch data: this generates a new layout
}
else
assert(!m_pMBLayout); // reshaping non-mini-batch data
size_t rows = Input(0)->GetNumRows(), cols = Input(0)->GetNumCols();
// Note: During initial validation, cols may not be a multiple. E.g. cols may be 1 or 3. So we cannot check here whether the integer-multiple conditions are fulfilled.
@ -253,17 +244,24 @@ namespace Microsoft { namespace MSR { namespace CNTK {
LogicError("%ls %ls operation: unexpected dimension mismatch", NodeName().c_str(), OperationName().c_str());
}
SetDims(m_numTargetRows, newCols);
if (factor() == 1) // canonical case: no reshaping actually (e.g. only changing the TensorShape)
m_pMBLayout = Input(0)->GetMBLayout();
else if (Input(0)->HasMBLayout())
// patch up m_targetImageLayout, which was originally a construction parameter
InferTargetSampleLayout();
// setting any dimension to 0 means lose the tensor, flatten to vector
// TODO: We can use 0 to indicate "infer". One value can be 0. It will be filled in to match row dim.
if (m_targetImageLayout[1] == 0 || m_targetImageLayout[2] == 0 || m_targetImageLayout[0] == 0)
{
if (!m_pMBLayout)
m_pMBLayout = make_shared<MBLayout>(); // mini-batch data: this generates its own layout
if (Input(0)->HasSampleLayout())
fprintf(stderr, "WARNING: Reshape operation cannot inherit image size information from its child. Image size info is lost.\n");
// TODO: We need to decide what reshaping means in presence of a tensor.
SetDims(TensorShape(m_numTargetRows), newCols);
}
else
assert(!m_pMBLayout); // reshaping non-mini-batch data
InferImageDimsFromInputs();
{
if (m_numTargetRows != m_targetImageLayout.GetNumElements())
LogicError("ReshapeNode: InferTargetSampleLayout() computed a sample layout [%s] that mismatches m_numTargetRows %d.", string(m_targetImageLayout).c_str(), (int)m_numTargetRows);
SetDims(m_targetImageLayout, newCols);
}
}
virtual void UpdateFunctionMBSize() override
@ -277,7 +275,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
#endif
}
else
SetDims(m_numTargetRows, newCols);
SetNumCols(newCols);
}
// TODO: there seems to be semantic overlap between BeginForwardProp() and UpdateFunctionMBSize()
@ -381,33 +379,36 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t factor() const { return m_numTargetRows > Input(0)->GetNumRows() ? m_numTargetRows / Input(0)->GetNumRows() : Input(0)->GetNumRows() / m_numTargetRows; } // factor by which we stack or unstack
TensorShape m_targetImageLayout;
void InferImageDimensions()
// this patches up m_targetImageLayout according to some rules
// TODO: Say in one sentence what this logic does.
void InferTargetSampleLayout()
{
if (m_targetImageLayout.GetWidth() > 0)
// BUGBUG: Below is the result of refactoring and only works for rank-3 tensors. Generalize.
if (m_targetImageLayout[1] > 0)
{
if (m_targetImageLayout.GetHeight() > 0)
if (m_targetImageLayout[2] > 0)
{
if (m_targetImageLayout.GetNumChannels() > 0)
if (m_targetImageLayout[0] > 0)
{
if (m_targetImageLayout.GetNumElements() != m_numTargetRows)
RuntimeError("Image dimensions do not match row size.");
}
else
{
if (m_numTargetRows % (m_targetImageLayout.GetWidth() * m_targetImageLayout.GetHeight()) > 0)
if (m_numTargetRows % (m_targetImageLayout[1] * m_targetImageLayout[2]) > 0)
RuntimeError("Image row size is not a multiple of specified image dimensions.");
else
m_targetImageLayout = ImageLayoutWHC(m_targetImageLayout.GetWidth(), m_targetImageLayout.GetHeight(), m_numTargetRows / (m_targetImageLayout.GetWidth() * m_targetImageLayout.GetHeight()));
m_targetImageLayout = TensorShape(m_numTargetRows / (m_targetImageLayout[1] * m_targetImageLayout[2]), m_targetImageLayout[1], m_targetImageLayout[2]);
}
}
else
{
if (m_targetImageLayout.GetNumChannels() > 0)
if (m_targetImageLayout[0] > 0)
{
if (m_numTargetRows % (m_targetImageLayout.GetWidth() * m_targetImageLayout.GetNumChannels()) > 0)
if (m_numTargetRows % (m_targetImageLayout[1] * m_targetImageLayout[0]) > 0)
RuntimeError("Image row size is not a multiple of specified image dimensions.");
else
m_targetImageLayout = ImageLayoutWHC(m_targetImageLayout.GetWidth(), m_numTargetRows / (m_targetImageLayout.GetWidth() * m_targetImageLayout.GetNumChannels()), m_targetImageLayout.GetNumChannels());
m_targetImageLayout = TensorShape(m_targetImageLayout[0], m_targetImageLayout[1], m_numTargetRows / (m_targetImageLayout[1] * m_targetImageLayout[0]));
}
else
{
@ -417,22 +418,22 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
else
{
if (m_targetImageLayout.GetHeight() > 0)
if (m_targetImageLayout[2] > 0)
{
if (m_targetImageLayout.GetNumChannels() > 0)
if (m_targetImageLayout[0] > 0)
{
if (m_numTargetRows % (m_targetImageLayout.GetHeight() * m_targetImageLayout.GetNumChannels()) > 0)
if (m_numTargetRows % (m_targetImageLayout[2] * m_targetImageLayout[0]) > 0)
RuntimeError("Image row size is not a multiple of specified image dimensions.");
else
m_targetImageLayout = ImageLayoutWHC(m_numTargetRows / (m_targetImageLayout.GetHeight() * m_targetImageLayout.GetNumChannels()), m_targetImageLayout.GetHeight(), m_targetImageLayout.GetNumChannels());
m_targetImageLayout = TensorShape(m_targetImageLayout[0], m_numTargetRows / (m_targetImageLayout[2] * m_targetImageLayout[0]), m_targetImageLayout[2]);
}
else
RuntimeError("At least two image dimensions must be specified.");
}
else if (m_targetImageLayout.GetNumChannels() > 0)
else if (m_targetImageLayout[0] > 0)
RuntimeError("At least two image dimensions must be specified.");
else
m_targetImageLayout = ImageLayoutWHC(m_numTargetRows, 1, 1);
m_targetImageLayout = TensorShape(1, m_numTargetRows, 1);
}
}
};
@ -483,14 +484,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
if (isFinalValidationPass && (!Input(0)->HasMBLayout() || !Input(1)->HasMBLayout()))
RuntimeError("%ls %ls operation requires two inputs that both have an associated MB layout.", NodeName().c_str(), OperationName().c_str());
m_pMBLayout = Input(1)->GetMBLayout(); // output layout is that of 'layoutInput'
// Note: We could also enforce that both inputs in fact have different layouts. But maybe there are edge cases where it isn't. Then this just becomes a nop. Also OK.
SetDims(Input(0));
InferImageDimsFromInputs();
}
};
@ -576,27 +575,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// RowSlice cannot slice tensors.
// TODO: Create a TensorSlice operation, or just Slice.
if (isFinalValidationPass && Input(0)->GetSampleLayout().GetRank() != 1
if (isFinalValidationPass && Input(0)->HasSampleLayout()
&& !Input(0)->GetSampleLayout().IsVectorStoredAsImage() // legacy
)
RuntimeError("%ls %ls operation: Input must be a vector, tensor shape [%s] not allowed.", NodeName().c_str(), OperationName().c_str(), string(Input(0)->GetSampleLayout()).c_str());
SetDims(TensorShape(m_sliceHeight), Input(0)->GetNumCols());
//InferImageDimsFromInputs();
}
#if 0
virtual void InferImageDimsFromInputs()
{
// TODO: This is outdated.
InferImageDimsFromInput(0, true);
m_sampleLayout = ImageLayoutWHC(m_sampleLayout.GetWidth(), m_sliceHeight, m_sampleLayout.GetNumChannels());
// warn that this node will destroy the image size information from the child
if (m_inputSampleLayout.GetWidth() * m_inputSampleLayout.GetNumChannels() != 1)
fprintf(stderr, "WARNING: RowSlice operation cannot inherit image size information from its child. Image size info is lost.\n");
}
#endif
private:
size_t m_startIndex, m_sliceHeight;
};
@ -663,10 +648,20 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t numCols = Input(0)->GetNumCols();
// we must fuse all tensor shapes
// All dimensions but the last must be the same.
// Note that trailing ones may be stripped, so we must first pad.
SmallVector<size_t> dims = Input(0)->GetSampleLayout().GetDims();
size_t maxRank = 0;
for (int i = 0; i < GetNumInputs(); i++)
if (maxRank < GetInputSampleLayout(i).GetRank())
maxRank = GetInputSampleLayout(i).GetRank();
dims.resize(maxRank-1, 1); // pad and/or strip trailing dimension
// count totalRows and form m_startRowIndices[] array, which is the cumulative sum of matrix heights
m_startRowIndices.resize(GetNumInputs());
size_t totalRows = 0;
size_t totalTrailingDim = 0; // last tensor dimension is what gets stacked up
for (int i = 0; i < GetNumInputs(); i++)
{
if (isFinalValidationPass && !HasMBLayout() && Input(i)->GetNumCols() != numCols)
@ -674,24 +669,25 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_startRowIndices[i] = totalRows;
totalRows += Input(i)->GetNumRows();
SmallVector<size_t> thisDims = Input(i)->GetSampleLayout().GetDims();
thisDims.resize(maxRank, 1); // pad and/or strip trailing dimension
totalTrailingDim += thisDims.back(); // count total trailing dimensions (that's what we have after stacking)
thisDims.resize(maxRank - 1); // verify that dimensions match
if (dims != thisDims)
InvalidArgument("%ls %ls operation: Incompatible tensor dimension [%s] for input %ls %ls",
NodeName().c_str(), OperationName().c_str(), std::string(Input(i)->GetSampleLayout()).c_str(),
Input(i)->NodeName().c_str(), Input(i)->OperationName().c_str());
}
SetDims(totalRows, numCols);
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, true);
#if 0
// TODO: stacked elements should become another tensor dimension
#else
m_sampleLayout = ImageLayoutWHC(m_sampleLayout.GetWidth(), GetNumRows(), m_sampleLayout.GetNumChannels());
#endif
// warn that this node will destroy the image size information from the child
if (m_inputSampleLayout.GetWidth() * m_inputSampleLayout.GetNumChannels() != 1)
if (Input(0)->HasSampleLayout())
fprintf(stderr, "WARNING: RowStack operation cannot inherit image size information from its child. Image size info is lost.\n");
dims.push_back(totalTrailingDim);
SetDims(TensorShape(dims), numCols);
if (totalRows != GetNumRows())
LogicError("%ls RowStack operation: Tensor shapes of inputs were not compatible after all?", NodeName().c_str());
}
private:
@ -743,20 +739,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
fstream >> m_numRepeat;
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, true);
#if 0
// TODO: This should add another tensor dimension.
#else
m_sampleLayout = ImageLayoutWHC(m_sampleLayout.GetWidth(), m_inputSampleLayout.GetHeight() * m_numRepeat, m_sampleLayout.GetNumChannels());
#endif
// watn that this node will destroy the image size information from the child
if (m_inputSampleLayout.GetWidth() * m_inputSampleLayout.GetNumChannels() != 1)
fprintf(stderr, "WARNING: RowRepeat operation cannot inherit image size information from its child. Image size info is lost.\n");
}
virtual void PrintSelfBeforeValidation(bool allowNulls = false) const
{
fprintf(stderr, "\nValidating --> %ls = %ls", NodeName().c_str(), OperationName().c_str());
@ -790,10 +772,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
SetDims(Input(0)->GetNumRows() * m_numRepeat, Input(0)->GetNumCols());
InferMBLayoutFromInputsForStandardCase();
InferImageDimsFromInputs();
// the trailing dimension gets multiplied
// TODO: Or should we add an additional dimension?
SmallVector<size_t> dims = GetInputSampleLayout(0).GetDims();
dims.back() *= m_numRepeat;
SetDims(TensorShape(dims), Input(0)->GetNumCols());
}
virtual void /*ComputationNode::*/ForwardProp(const FrameRange & fr) override

88
Source/ComputationNetworkLib/TrainingCriterionNodes.h
Просмотреть файл

@ -64,13 +64,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ValidateBinaryReduce(isFinalValidationPass);
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
{
Base::CopyTo(nodeP, newName, flags);
@ -190,13 +183,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ValidateBinaryReduce(isFinalValidationPass);
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
{
Base::CopyTo(nodeP, newName, flags);
@ -299,13 +285,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
LogicError("CrossEntropyNode criterion requires the first input to be the label.");
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
{
Base::CopyTo(nodeP, newName, flags);
@ -399,13 +378,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ValidateUnaryReduce(isFinalValidationPass);
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
{
Base::CopyTo(nodeP, newName, flags);
@ -480,13 +452,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
ValidateUnaryReduce(isFinalValidationPass);
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
};
template class MatrixL2RegNode<float>;
@ -641,6 +606,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
if (Input(0)->OperationName() != OperationNameOf(InputValue))
LogicError("NoiseContrastiveEstimationNode criterion requires the first input to be the label.");
@ -653,15 +619,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
//cerr << Input(3)->GetNumCols() << "\t" << Input(0)->GetNumCols() << endl;
SetDims(1,1);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
SetDims(TensorShape(1), 1);
}
protected:
@ -930,6 +888,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
if (Input(0)->OperationName() != OperationNameOf(InputValue)) // TODO: but why could that label not be post-processed through another node?
LogicError("ClassBasedCrossEntropyWithSoftmaxNode criterion requires the first input to be the label.");
@ -943,20 +902,11 @@ namespace Microsoft { namespace MSR { namespace CNTK {
InvalidArgument("%ls %ls operation requires that the layouts of inputs 0 (label), 1 (hidden activation), and 3 (log softmax) match.", NodeName().c_str(), OperationName().c_str());
}
SetDims(1, 1);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
InferImageDimsFromInputs();
SetDims(TensorShape(1), 1);
m_nbrCls = Input(3)->GetNumRows();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
protected:
Matrix<ElemType> m_logSoftmax;
Matrix<ElemType> m_softMax;
@ -1216,6 +1166,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
if (isFinalValidationPass)
if (!(Input(1)->GetNumRows() == Input(2)->GetNumRows() && // position dependent and pair scores have same number of labels
@ -1226,16 +1177,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
LogicError("The Matrix dimension in the CRFNode operation does not match.");
}
SetDims(1,1);
m_pMBLayout = nullptr; // this node does not hold mini-batch data
InferImageDimsFromInputs();
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
SetDims(TensorShape(1), 1);
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
@ -1380,6 +1322,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual void /*ComputationNodeBase::*/Validate(bool isFinalValidationPass) override
{
Base::Validate(isFinalValidationPass);
m_pMBLayout = nullptr; // no layout
if (Input(0)->OperationName() != L"InputValue" && Input(0)->OperationName() != L"SparseInputValue")
LogicError("SequenceWithSoftmaxNode criterion requires the first input to be the label.");
@ -1393,21 +1336,12 @@ namespace Microsoft { namespace MSR { namespace CNTK {
LogicError("The Matrix dimension in the SequenceWithSoftmaxNode operation does not match.");
}
SetDims(1, 1);
m_pMBLayout = nullptr; // no layout
InferImageDimsFromInputs();
SetDims(TensorShape(1), 1);
m_gammatime = 0;
m_partialtime = 0;
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
virtual void CopyTo(ComputationNodeBasePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const override
{
Base::CopyTo(nodeP, newName, flags);
@ -1628,12 +1562,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
ReleaseMatrixToPool(m_temp, matrixPool);
}
virtual void InferImageDimsFromInputs()
{
InferImageDimsFromInput(0, false);
m_sampleLayout = TensorShape();
}
virtual void CopyTo(const ComputationNodePtr nodeP, const std::wstring& newName, const CopyNodeFlags flags) const
{
Base::CopyTo(nodeP, newName, flags);

4
Source/EvalDll/stdafx.h
Просмотреть файл

@ -5,7 +5,9 @@
#pragma once
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#ifdef _WIN32
#include "targetver.h"
#endif

40
Source/Math/CPUMatrix.cpp
Просмотреть файл

@ -5538,7 +5538,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
// reduction case (non-reduction case is specialized)
static inline ElemType Loop(array<ElemType*, N> pointers, const OPFN & opfn,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, N> & reducingStrides)
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, N> & reducingStrides)
{
array<ptrdiff_t, N - 1> strides; // N-1 because last one is the result pointer, which is unused in reduction
for (size_t i = 0; i < N - 1; i++) // N = a small constant, this will be unrolled
@ -5562,7 +5562,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
struct TensorOpReduction<ElemType, OPFN, N, -1>
{
static inline ElemType Loop(array<ElemType*, N> pointers, const OPFN & opfn,
const vector<size_t> &, const array<vector<ptrdiff_t>, N> &)
const SmallVector<size_t> &, const array<SmallVector<ptrdiff_t>, N> &)
{
return opfn(pointers); // finally we are doing some work!!!
}
@ -5577,8 +5577,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
struct TensorOpIteration
{
static inline void Loop(ElemType beta, array<ElemType*, N> pointers, ElemType alpha, const OPFN & opfn,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, N> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, N> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, N> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, N> & reducingStrides)
{
// non-scalar case: still nested result loops left
array<ptrdiff_t, N> strides;
@ -5601,8 +5601,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
struct TensorOpIteration<ElemType, OPFN, 3, true/*vectorizable*/, -1/*no reduction*/, 0/*innermost loop*/>
{
static inline void Loop(ElemType beta, array<ElemType*, 3> pointers, ElemType alpha, const OPFN & opfn,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 3> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 3> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 3> & reducingStrides)
{
ElemType* pa = pointers[0];
ElemType* pb = pointers[1];
@ -5630,8 +5630,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
struct TensorOpIteration<ElemType, OPFN, 2, true/*vectorizable*/, -1/*no reduction*/, 0/*innermost loop*/>
{
static inline void Loop(ElemType beta, array<ElemType*, 2> pointers, ElemType alpha, const OPFN & opfn,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 2> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 2> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 2> & reducingStrides)
{
ElemType* pa = pointers[0];
ElemType* pb = pointers[1];
@ -5656,8 +5656,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
struct TensorOpIteration<ElemType, OPFN, N, vectorizable, m, -1>
{
static inline void Loop(ElemType beta, array<ElemType*, N> pointers, ElemType alpha, const OPFN & opfn,
const vector<size_t> &, const array<vector<ptrdiff_t>, N> &,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, N> & reducingStrides)
const SmallVector<size_t> &, const array<SmallVector<ptrdiff_t>, N> &,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, N> & reducingStrides)
{
// we are at element level for the result: perform the op (there may still be reduction)
ElemType val = TensorOpReduction<ElemType, OPFN, N, m>::Loop(pointers, opfn, reducingOpDims, reducingStrides);
@ -5680,8 +5680,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// tensor operation with k+1 dimensions (-1 means scalar)
template<class ElemType, typename OPFN, size_t N, int k>
static void TensorOpWithRegularLoop(ElemType beta, const array<ElemType*, N> & pointers, ElemType alpha, const OPFN & opfn,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, N> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, N> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, N> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, N> & reducingStrides)
{
size_t dims = reducingOpDims.size();
switch (dims)
@ -5708,8 +5708,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType, typename OPFN, size_t N>
static void TensorOpWithFn(ElemType beta, array<ElemType*, N> pointers, ElemType alpha, const OPFN & opfn,
const array<size_t, N> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, N> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, N> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, N> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, N> & reducingStrides)
{
for (size_t i = 0; i < N; i++) // N = a small constant, this will be unrolled
pointers[i] += offsets[i];
@ -5734,8 +5734,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType>
void CPUMatrix<ElemType>::TensorOp(ElemType beta, const CPUMatrix<ElemType>& a, ElemType alpha, ElementWiseOperator op,
const array<size_t, 2> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 2> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 2> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 2> & reducingStrides)
{
#define CaseUnaryTensorOp(oper) \
case ElementWiseOperator::op ## oper: \
@ -5754,8 +5754,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType>
void CPUMatrix<ElemType>::TensorOp(ElemType beta, const CPUMatrix<ElemType>& a, const CPUMatrix<ElemType>& b, ElemType alpha, ElementWiseOperator op,
const array<size_t, 3> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 3> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 3> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 3> & reducingStrides)
{
#define CaseBinaryTensorOp(oper) \
case ElementWiseOperator::op ## oper: \
@ -5774,8 +5774,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType>
void CPUMatrix<ElemType>::TensorOp(ElemType beta, const CPUMatrix<ElemType>& a, const CPUMatrix<ElemType>& b, const CPUMatrix<ElemType>& c, ElemType alpha, ElementWiseOperator op,
const array<size_t, 4> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 4> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 4> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 4> & reducingStrides)
{
#define CaseTernaryTensorOp(oper) \
case ElementWiseOperator::op ## oper: \

12
Source/Math/CPUMatrix.h
Просмотреть файл

@ -337,16 +337,16 @@ namespace Microsoft { namespace MSR { namespace CNTK {
void TensorOp(ElemType beta, const CPUMatrix<ElemType>& a, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 2> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 2> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 2> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 2> & reducingStrides);
void TensorOp(ElemType beta, const CPUMatrix<ElemType>& a, const CPUMatrix<ElemType>& b, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 3> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 3> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 3> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 3> & reducingStrides);
void TensorOp(ElemType beta, const CPUMatrix<ElemType>& a, const CPUMatrix<ElemType>& b, const CPUMatrix<ElemType>& c, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 4> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 4> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 4> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 4> & reducingStrides);
static CPUMatrix<ElemType> Ones(const size_t rows, const size_t cols);
static CPUMatrix<ElemType> Zeros(const size_t rows, const size_t cols);

32
Source/Math/CommonMatrix.h
Просмотреть файл

@ -39,7 +39,7 @@
MATH_API DEVICEID_TYPE EnforceOneGPUOnly(DEVICEID_TYPE requestedDeviceId);
namespace Microsoft { namespace MSR { namespace CNTK {
namespace Microsoft { namespace MSR { namespace CNTK {
// -----------------------------------------------------------------------
// ElementWiseOperator -- This enum represents which function to apply.
@ -48,41 +48,49 @@ namespace Microsoft { namespace MSR { namespace CNTK {
enum ElementWiseOperator
{
// nullary
opConstOne,
// unary (or binary with constant parameter)
opCopy,
opNegate, opNot,
opAbs,
opSigmoid, opSigmoidDerivative, opTanh, opSqrt, opExp, opLog, opLinearRectifierDerivative, opCosine, opNegativeSine,
// these are not implemented yet:
opSaturateBetaAlpha, opSumAlpha, opSubDifferenceToAlpha, opSubDifferenceFromAlpha,
opSigmoid, opTanh, opSqrt, opExp, opLog, opLinearRectifier, opCosine,
// unary ops for use by Matrix class only (there is no TensorView implementation)
opSigmoidDerivative, opLinearRectifierDerivative, opNegativeSine,
// binary
opSum, opDifference, opElementwiseProduct, opElementwiseQuotient,
opLogSum, opMax, opMin,
opEQ, opNE, opGT, opLT, opGE, opLE,
opAnd, opOr, opXor,
opMaskNegative,
opElementwiseProductWithSigmoidDerivative/* a * dsigmoid/dx(b) */, opElementwiseProductWithTanhDerivative, opElementwiseProductWithExp,
opElementwiseProductWithLinearRectifierDerivative, opElementwiseProductWithCosDerivative,
// ternary
opCond
// Note: not all of the above are actually implement at present; and not all that's implemented has an opcode.
opCond/*a ? b : c*/, opClip/*clip a within interval b..c*/
// Note: not all that's implemented in CNTK ComputationNodes has an opcode yet.
};
// helper to apply a C macro for all operations of each kind
#define ForAllNullaryOps(Macro) \
Macro(ConstOne);
#define ForAllUnaryOps(Macro) \
Macro(Copy); \
Macro(Negate); Macro(Not); \
Macro(Abs); \
Macro(Sigmoid); Macro(SigmoidDerivative); Macro(Tanh); Macro(Sqrt); Macro(Exp); Macro(Log); Macro(LinearRectifierDerivative); Macro(Cosine); Macro(NegativeSine);
#define ForAllParameterizedUnaryOps(Macro) \
Macro(SaturateBetaAlpha); Macro(SumAlpha); Macro(SubDifferenceToAlpha); Macro(SubDifferenceFromAlpha);
Macro(Sigmoid); Macro(Tanh); Macro(Sqrt); Macro(Exp); Macro(Log); Macro(LinearRectifier); Macro(Cosine);
#define ForAllBinaryOps(Macro) \
Macro(Sum); Macro(Difference); Macro(ElementwiseProduct); Macro(ElementwiseQuotient); \
Macro(LogSum); Macro(Max); Macro(Min); \
Macro(EQ); Macro(NE); Macro(GT); Macro(LT); Macro(GE); Macro(LE); \
Macro(MaskNegative);
Macro(And); Macro(Or); Macro(Xor);\
Macro(MaskNegative); \
Macro(ElementwiseProductWithSigmoidDerivative); Macro(ElementwiseProductWithTanhDerivative); Macro(ElementwiseProductWithExp); \
Macro(ElementwiseProductWithLinearRectifierDerivative); Macro(ElementwiseProductWithCosDerivative);
#define ForAllTernaryOps(Macro) \
Macro(Cond);
Macro(Cond); Macro(Clip);
// -----------------------------------------------------------------------
// various enums to describe

17
Source/Math/ConvolutionEngine.cpp
Просмотреть файл

@ -265,7 +265,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
assert(outT.w() * outT.h() * outT.c() == out.GetNumRows());
assert(outT.n() == out.GetNumCols());
Mat o = out.ColumnSlice(0, out.GetNumCols());
Mat o = out.ColumnSlice(0, out.GetNumCols()); // same as .AsReference()
Mat d = dst.Reshaped(biasT.c(), outT.w() * outT.h() * outT.n());
d.AssignSumOf(o.Reshaped(biasT.c(), outT.w() * outT.h() * outT.n()), bias);
}
@ -436,23 +436,30 @@ namespace Microsoft { namespace MSR { namespace CNTK {
};
template<class ElemType>
std::unique_ptr<ConvolutionEngineFactory<ElemType>> ConvolutionEngineFactory<ElemType>::Create(DEVICEID_TYPE deviceId, EngineType engType)
std::unique_ptr<ConvolutionEngineFactory<ElemType>> ConvolutionEngineFactory<ElemType>::Create(DEVICEID_TYPE deviceId, EngineType engType, ImageLayoutKind imageLayoutKind)
{
if (engType == EngineType::Auto)
{
// REVIEW alexeyk: make cuDNN default when running on GPU and compiled with cuDNN, add config parameter to enable runtime switch between implementations.
if (deviceId >= 0 && CuDnnConvolutionEngineFactory<ElemType>::IsSupported(deviceId))
return std::make_unique<CuDnnConvolutionEngineFactory<ElemType>>();
return std::make_unique<DefaultConvolutionEngineFactory<ElemType>>();
if (deviceId >= 0 && CuDnnConvolutionEngineFactory<ElemType>::IsSupported(deviceId) && imageLayoutKind == ImageLayoutKind::CHW)
return Create(deviceId, EngineType::CuDnn, imageLayoutKind);
else
return Create(deviceId, EngineType::Legacy, imageLayoutKind);
}
else if (engType == EngineType::CuDnn)
{
if (imageLayoutKind != ImageLayoutKind::CHW)
InvalidArgument("ConvolutionEngineFactory: ImageLayout '%s' is not compatible with the cuDNN engine.", ToString(imageLayoutKind).c_str());
if (deviceId >= 0 && CuDnnConvolutionEngineFactory<ElemType>::IsSupported(deviceId))
return std::make_unique<CuDnnConvolutionEngineFactory<ElemType>>();
RuntimeError("cuDNN convolution engine is not supported, check the device id and whether the code was compiled with cuDNN.");
}
else if (engType == EngineType::Legacy)
{
if (imageLayoutKind != ImageLayoutKind::HWC)
InvalidArgument("ConvolutionEngineFactory: ImageLayout '%s' is not compatible with the legacy convolution engine.", ToString(imageLayoutKind).c_str());
return std::make_unique<DefaultConvolutionEngineFactory<ElemType>>();
}
RuntimeError("Not supported convolution engine type: %d.", engType);
}

3
Source/Math/ConvolutionEngine.h
Просмотреть файл

@ -18,6 +18,7 @@
#endif
#include "Matrix.h"
#include "DataTensor.h" // for ImageLayoutKind
namespace Microsoft { namespace MSR { namespace CNTK {
@ -252,7 +253,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
virtual PoolEnginePtr CreatePoolEngine(DEVICEID_TYPE deviceId) = 0;
enum class EngineType { Auto, CuDnn, Legacy };
static std::unique_ptr<ConvolutionEngineFactory<ElemType>> Create(DEVICEID_TYPE deviceId, EngineType engType = EngineType::Auto);
static std::unique_ptr<ConvolutionEngineFactory<ElemType>> Create(DEVICEID_TYPE deviceId, EngineType engType, ImageLayoutKind imageLayoutKind);
public:
ConvolutionEngineFactory(const ConvolutionEngineFactory&) = delete;

6
Source/Math/CuDnnConvolutionEngine.cpp
Просмотреть файл

@ -10,11 +10,7 @@
#ifdef USE_CUDNN
#include <cudnn.h>
template<> const char* CudaErrString(cudnnStatus_t x)
{
return cudnnGetErrorString(x);
}
#define CUDNN_CALL(expr) (CudaCall((expr), #expr, "cuDNN", CUDNN_STATUS_SUCCESS))
template<> const char* CudaErrString<cudnnStatus_t>(cudnnStatus_t x) { return cudnnGetErrorString(x); }
// A note on the formats: CNTK originally used NHWC for input/output tensors and CHWN for filters.
// Such formats have very limited support in cuDNN and not used in other frameworks.

679
Source/Math/GPUMatrix.cu
Просмотреть файл

@ -5,25 +5,27 @@
//
#include "stdafx.h"
#include "Basics.h"
#include "BestGpu.h"
#include "DebugUtil.h"
#ifndef CPUONLY
#include "cublas_v2.h"
#include "Basics.h"
#include "GPUMatrix.h"
#include "GPUMatrixCUDAKernels.cuh"
#include "GPUSparseMatrix.h"
#include "GPUTensor.h"
#include "CommonMatrix.h"
#define TENSOR_OPS_DECL __device__ __host__
#include "TensorOps.h"
#include "device_launch_parameters.h"
#include <assert.h>
#include <cuda.h>
#include <cuda_runtime.h>
#include <curand.h>
#include <curand_kernel.h>
#include "cublas_v2.h"
#include <assert.h>
#include <memory>
#pragma comment (lib, "cudart.lib") // instruct linker to reference these libs
#pragma comment (lib, "cublas.lib")
@ -47,8 +49,6 @@ bool do_sync = true;
#ifdef _WIN32
// thread local storage to access the current stream, initalize to default stream
__declspec (thread)
#else
static
#endif
cudaStream_t t_stream = cudaStreamDefault;
@ -78,9 +78,9 @@ cudaStream_t MATH_API GetStream()
performElementWiseFunction(ElementWiseOperator::op##f, a.m_pArray); \
return *this; }
static const char * CudaErrString(cudaError_t x) { cudaDeviceSynchronize(); return cudaGetErrorString(x); }
static const char * CudaErrString(cublasStatus_t) { cudaDeviceSynchronize(); return "(see cublas_api.h & look for cublasStatus_t or CUBLAS_STATUS_xxx)"; }
static const char * CudaErrString(curandStatus) { cudaDeviceSynchronize(); return "(see curand.h & look for curandStatus or CURAND_STATUS_xxx)"; }
template<> const char * CudaErrString<cudaError_t>(cudaError_t x) { cudaDeviceSynchronize(); return cudaGetErrorString(x); }
template<> const char * CudaErrString<cublasStatus_t>(cublasStatus_t) { cudaDeviceSynchronize(); return "(see cublas_api.h & look for cublasStatus_t or CUBLAS_STATUS_xxx)"; }
template<> const char * CudaErrString<curandStatus>(curandStatus) { cudaDeviceSynchronize(); return "(see curand.h & look for curandStatus or CURAND_STATUS_xxx)"; }
namespace Microsoft { namespace MSR { namespace CNTK {
@ -384,7 +384,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
#pragma region Constructors and Destructor
//should only be used by constructors.
// should only be used by constructors
template<class ElemType>
void GPUMatrix<ElemType>::ZeroInit(int deviceId)
{
@ -449,13 +449,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
m_numRows = moveFrom.m_numRows;
m_numCols = moveFrom.m_numCols;
m_computeDevice = moveFrom.m_computeDevice;
m_pArray = moveFrom.m_pArray; //shallow copy the pointer
m_pArray = moveFrom.m_pArray; // shallow copy the pointer
m_matrixName=moveFrom.m_matrixName;
m_elemSizeAllocated = moveFrom.m_elemSizeAllocated;
m_format = moveFrom.m_format;
m_externalBuffer = moveFrom.m_externalBuffer;
//release the pointer from the source object so that the destructor won't release it twice
// release the pointer from the source object so that the destructor won't release it twice
moveFrom.ZeroInit(0);
}
@ -477,10 +477,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
{
if (this != &moveFrom)
{
if (OwnBuffer() && m_pArray!=NULL)
{
if (OwnBuffer() && m_pArray)
CUDA_CALL(cudaFree(m_pArray));
}
m_numRows = moveFrom.m_numRows;
m_numCols = moveFrom.m_numCols;
@ -500,8 +498,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
GPUMatrix<ElemType>::~GPUMatrix(void)
{
Clear();
if (m_workspace != nullptr)
delete m_workspace;
delete m_workspace;
}
template<class ElemType>
@ -1960,7 +1957,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
PrepareDevice();
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
// _elementWIseSigmoidOnCuda has an implementation that avoids possible overflow errors, but is slightly slower and may have an accuracy regression.
// We have a new implementation that is non-branching (yay!) that Frank will check in.
#if 0
_elementWiseSigmoidOnCuda<<<blocksPerGrid, threadsPerBlock, 0, t_stream>>>(a.m_pArray, m_pArray, N);
#else
_assignSigmoidOf<<<blocksPerGrid,GridDim::maxThreadsPerBlock,0,t_stream>>>(a.m_pArray,m_pArray,N);
#endif
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
@ -2213,19 +2216,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType>
GPUMatrix<ElemType>& GPUMatrix<ElemType>::InplaceTruncateBottom (const ElemType threshold)
{
if (IsEmpty())
LogicError("InplaceTruncateBottom: Matrix is empty.");
CUDA_LONG N=(CUDA_LONG)GetNumElements();
int blocksPerGrid =(int)ceil(N*1.0/GridDim::maxThreadsPerBlock);
PrepareDevice();
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_inplaceTruncateBottom<ElemType><<<blocksPerGrid,GridDim::maxThreadsPerBlock,0,t_stream>>>(m_pArray,threshold,N);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
return *this;
return AssignTruncateBottomOf(*this, threshold);
}
template<class ElemType>
@ -2255,18 +2246,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType>
GPUMatrix<ElemType>& GPUMatrix<ElemType>::InplaceTruncateTop (const ElemType threshold)
{
if (IsEmpty())
LogicError("InplaceTruncateTop: Matrix is empty.");
CUDA_LONG N=(CUDA_LONG)GetNumElements();
int blocksPerGrid =(int)ceil(N*1.0/GridDim::maxThreadsPerBlock);
PrepareDevice();
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_inplaceTruncateTop<ElemType><<<blocksPerGrid,GridDim::maxThreadsPerBlock,0,t_stream>>>(m_pArray,threshold,N);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
return *this;
return AssignTruncateTopOf(*this, threshold);
}
template<class ElemType>
@ -3276,6 +3256,16 @@ namespace Microsoft { namespace MSR { namespace CNTK {
#pragma endregion Other helper functions
#pragma region Static BLAS Functions
// float/double overloads of cublasSgemm()/cublasDgemm()
static cublasStatus_t cublas_gemm(cublasHandle_t handle, cublasOperation_t transa, cublasOperation_t transb, int m, int n, int k, const float *alpha, const float *A, int lda, const float *B, int ldb, const float *beta, float *C, int ldc)
{
return cublasSgemm(handle, transa, transb, m, n, k, alpha, A, lda, B, ldb, beta, C, ldc);
}
static cublasStatus_t cublas_gemm(cublasHandle_t handle, cublasOperation_t transa, cublasOperation_t transb, int m, int n, int k, const double *alpha, const double *A, int lda, const double *B, int ldb, const double *beta, double *C, int ldc)
{
return cublasDgemm(handle, transa, transb, m, n, k, alpha, A, lda, B, ldb, beta, C, ldc);
}
template<class ElemType>
void GPUMatrix<ElemType>::MultiplyAndWeightedAdd(ElemType alpha, const GPUMatrix<ElemType>& a, const bool transposeA, const GPUMatrix<ElemType>& b, const bool transposeB,
ElemType beta, GPUMatrix<ElemType>& c)
@ -3295,28 +3285,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
if (beta == 0)
c.Resize(m,n);
else
c.VerifySize(m, n); // Can't resize if beta != 0
c.VerifySize(m, n); // Can't resize if beta != 0
if (!(m>0 && k>0 && l>0 && n>0))
{
RuntimeError("!(m>0 && k>0 && l>0 && n>0)"); //converting from size_t to int may cause overflow
}
if (k!=l)
{
RuntimeError("matrix dim mismatch in MultiplyAndWeightedAdd");
}
if (sizeof(ElemType)==sizeof(float))
{
CUBLAS_CALL(cublasSgemm(cuHandle,transA,transB,m,n,k,reinterpret_cast<float*>(&alpha),reinterpret_cast<float*>(a.m_pArray),(int)a.m_numRows,reinterpret_cast<float*>(b.m_pArray),(int)b.m_numRows,reinterpret_cast<float*>(&beta),reinterpret_cast<float*>(c.m_pArray),(int)c.m_numRows));
}
else if (sizeof(ElemType)==sizeof(double))
{
CUBLAS_CALL(cublasDgemm(cuHandle,transA,transB,m,n,k,reinterpret_cast<double*>(&alpha),reinterpret_cast<double*>(a.m_pArray),(int)a.m_numRows,reinterpret_cast<double*>(b.m_pArray),(int)b.m_numRows,reinterpret_cast<double*>(&beta),reinterpret_cast<double*>(c.m_pArray),(int)c.m_numRows));
}
else
{
RuntimeError("Unsupported template argument in GPUMatrix");
}
CUBLAS_CALL(cublas_gemm(cuHandle, transA, transB, m, n, k, &alpha, a.m_pArray, (int)a.m_numRows, b.m_pArray, (int)b.m_numRows, &beta, c.m_pArray, (int)c.m_numRows));
c.m_numRows=m;
c.m_numCols=n;
}
@ -4176,138 +4151,136 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return *this;
}
template<class ElemType>
void GPUMatrix<ElemType>::InnerProductWithShiftNeg(const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, GPUMatrix<ElemType>& c, const size_t shift, const size_t nt)
{
if (a.GetComputeDeviceId() != b.GetComputeDeviceId() || b.GetComputeDeviceId() != c.GetComputeDeviceId()) //different GPUs
InvalidArgument("All matrices must be on the same GPU");
template<class ElemType>
void GPUMatrix<ElemType>::InnerProductWithShiftNeg(const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, GPUMatrix<ElemType>& c, const size_t shift, const size_t nt)
{
if (a.GetComputeDeviceId() != b.GetComputeDeviceId() || b.GetComputeDeviceId() != c.GetComputeDeviceId()) //different GPUs
InvalidArgument("All matrices must be on the same GPU");
if (a.IsEmpty() || b.IsEmpty())
LogicError("Scale: one of the input matrices is empty.");
if (a.IsEmpty() || b.IsEmpty())
LogicError("Scale: one of the input matrices is empty.");
const int m = (int)a.GetNumRows();
const int n = (int)a.GetNumCols();
const int k = (int)b.GetNumRows();
const int l = (int)b.GetNumCols();
const int m = (int)a.GetNumRows();
const int n = (int)a.GetNumCols();
const int k = (int)b.GetNumRows();
const int l = (int)b.GetNumCols();
assert(m>0 && n>0 && k>0 && l>0); //converting from size_t to int may cause overflow
assert(m == k && n == l); //converting from size_t to int may cause overflow
if (m != k || n != l)
InvalidArgument("Matrices a and b should have same dimension.");
assert(m > 0 && n > 0 && k > 0 && l > 0); //converting from size_t to int may cause overflow
assert(m == k && n == l); //converting from size_t to int may cause overflow
if (m != k || n != l)
InvalidArgument("Matrices a and b should have same dimension.");
c.Resize(nt + 1, n);
c.Resize(nt + 1, n);
if (true)
{
if (true)
{
cudaEvent_t done = nullptr;;
c.PrepareDevice();
c.PrepareDevice();
dim3 thread_tail(DEFAULT_THREAD_PER_DIM, DEFAULT_THREAD_PER_DIM);
dim3 block_tail((nt + 1 + DEFAULT_THREAD_PER_DIM - 1) / DEFAULT_THREAD_PER_DIM, (n + DEFAULT_THREAD_PER_DIM - 1) / DEFAULT_THREAD_PER_DIM);
dim3 thread_tail(DEFAULT_THREAD_PER_DIM, DEFAULT_THREAD_PER_DIM);
dim3 block_tail((nt + 1 + DEFAULT_THREAD_PER_DIM - 1) / DEFAULT_THREAD_PER_DIM, (n + DEFAULT_THREAD_PER_DIM - 1) / DEFAULT_THREAD_PER_DIM);
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_innerProductWithShiftNeg<ElemType> << <block_tail, thread_tail, 0, t_stream >> >(c.m_pArray, a.m_pArray, b.m_pArray, m, n, shift, nt + 1);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
}
}
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_innerProductWithShiftNeg<ElemType> << <block_tail, thread_tail, 0, t_stream >> >(c.m_pArray, a.m_pArray, b.m_pArray, m, n, shift, nt + 1);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
}
}
template<class ElemType>
GPUMatrix<ElemType>& GPUMatrix<ElemType>::GetARowByIndex(const GPUMatrix<ElemType>& a, const size_t m)
{
if (a.IsEmpty())
LogicError("GetARowByIndex: Matrix is empty.");
template<class ElemType>
GPUMatrix<ElemType>& GPUMatrix<ElemType>::GetARowByIndex(const GPUMatrix<ElemType>& a, const size_t m)
{
if (a.IsEmpty())
LogicError("GetARowByIndex: Matrix is empty.");
Resize(1, a.GetNumCols());
Resize(1, a.GetNumCols());
int n = a.GetNumRows();
int P = a.GetNumCols();
int n = a.GetNumRows();
int P = a.GetNumCols();
if (m >= n)
LogicError("GetARowByIndex: m is out of range.");
if (m >= n)
LogicError("GetARowByIndex: m is out of range.");
int blocksPerGrid = (int)ceil(((double)P) / GridDim::maxThreadsPerBlock);
int blocksPerGrid = (int)ceil(((double)P) / GridDim::maxThreadsPerBlock);
a.PrepareDevice();
a.PrepareDevice();
cudaEvent_t done = nullptr;;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_getARowByIndex<ElemType> << <blocksPerGrid, GridDim::maxThreadsPerBlock, 0, t_stream >> >(m_pArray, a.m_pArray, n, P, m);
// _assignElementProductOf<ElemType> << <block_tail, thread_tail, 0, t_stream >> >(m_pArray, a.m_pArray, b.m_pArray, nt);
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_getARowByIndex<ElemType> << <blocksPerGrid, GridDim::maxThreadsPerBlock, 0, t_stream >> >(m_pArray, a.m_pArray, n, P, m);
// _assignElementProductOf<ElemType> << <block_tail, thread_tail, 0, t_stream >> >(m_pArray, a.m_pArray, b.m_pArray, nt);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
return *this;
}
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
return *this;
}
template<class ElemType>
void GPUMatrix<ElemType>::ConductRowElementMultiplyWithShift(const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, GPUMatrix<ElemType>& c, const size_t shift, const bool isafixed)
{
if (a.GetComputeDeviceId() != b.GetComputeDeviceId() || b.GetComputeDeviceId() != c.GetComputeDeviceId()) //different GPUs
InvalidArgument("All matrices must be on the same GPU");
template<class ElemType>
void GPUMatrix<ElemType>::ConductRowElementMultiplyWithShift(const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, GPUMatrix<ElemType>& c, const size_t shift, const bool isafixed)
{
if (a.GetComputeDeviceId() != b.GetComputeDeviceId() || b.GetComputeDeviceId() != c.GetComputeDeviceId()) //different GPUs
InvalidArgument("All matrices must be on the same GPU");
if (a.IsEmpty() || b.IsEmpty())
LogicError("Scale: one of the input matrices is empty.");
if (a.IsEmpty() || b.IsEmpty())
LogicError("Scale: one of the input matrices is empty.");
const int m = (int)a.GetNumRows();
const int n = (int)a.GetNumCols();
const int O = (int)b.GetNumRows();
const int P = (int)b.GetNumCols();
const int m = (int)a.GetNumRows();
const int n = (int)a.GetNumCols();
const int O = (int)b.GetNumRows();
const int P = (int)b.GetNumCols();
assert(m>0 && n>0 && O>0 && P>0); //converting from size_t to int may cause overflow
if (m != 1 || n != P)
InvalidArgument("Matrices a and b should have same dimension.");
assert(m > 0 && n > 0 && O > 0 && P > 0); //converting from size_t to int may cause overflow
if (m != 1 || n != P)
InvalidArgument("Matrices a and b should have same dimension.");
c.Resize(O, P);
c.Resize(O, P);
if (true)
{
if (true)
{
cudaEvent_t done = nullptr;;
c.PrepareDevice();
c.PrepareDevice();
dim3 thread_tail(DEFAULT_THREAD_PER_DIM, DEFAULT_THREAD_PER_DIM);
dim3 block_tail((O + DEFAULT_THREAD_PER_DIM - 1) / DEFAULT_THREAD_PER_DIM, (P + DEFAULT_THREAD_PER_DIM - 1) / DEFAULT_THREAD_PER_DIM);
dim3 thread_tail(DEFAULT_THREAD_PER_DIM, DEFAULT_THREAD_PER_DIM);
dim3 block_tail((O + DEFAULT_THREAD_PER_DIM - 1) / DEFAULT_THREAD_PER_DIM, (P + DEFAULT_THREAD_PER_DIM - 1) / DEFAULT_THREAD_PER_DIM);
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_conductRowElementMultiplyWithShift<ElemType> << <block_tail, thread_tail, 0, t_stream >> >(c.m_pArray, a.m_pArray, b.m_pArray, O, P, shift, isafixed);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
}
}
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_conductRowElementMultiplyWithShift<ElemType> << <block_tail, thread_tail, 0, t_stream >> >(c.m_pArray, a.m_pArray, b.m_pArray, O, P, shift, isafixed);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
}
}
template<class ElemType>
GPUMatrix<ElemType>& GPUMatrix<ElemType>::AssignElementProductOfWithShift(const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, const size_t shift)
{
if (a.IsEmpty() || b.IsEmpty())
LogicError("AssignElementProductOfWithShift: Matrix is empty.");
assert(a.GetNumRows() == b.GetNumRows() && a.GetNumCols() == b.GetNumCols());
if (!(a.GetNumRows() == b.GetNumRows() && a.GetNumCols() == b.GetNumCols()))
InvalidArgument("The input matrix dimensions do not match.");
template<class ElemType>
GPUMatrix<ElemType>& GPUMatrix<ElemType>::AssignElementProductOfWithShift(const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, const size_t shift)
{
if (a.IsEmpty() || b.IsEmpty())
LogicError("AssignElementProductOfWithShift: Matrix is empty.");
//int O = a.GetNumRows();
int P = a.GetNumCols();
assert(a.GetNumRows() == b.GetNumRows() && a.GetNumCols() == b.GetNumCols());
if (!(a.GetNumRows() == b.GetNumRows() && a.GetNumCols() == b.GetNumCols()))
InvalidArgument("The input matrix dimensions do not match.");
//int O = a.GetNumRows();
int P = a.GetNumCols();
Resize(1, P);
CUDA_LONG N = (CUDA_LONG)GetNumElements();
int blocksPerGrid = (int)ceil(((double)N) / GridDim::maxThreadsPerBlock);
a.PrepareDevice();
Resize(1, P);
CUDA_LONG N = (CUDA_LONG)GetNumElements();
int blocksPerGrid = (int)ceil(((double)N) / GridDim::maxThreadsPerBlock);
a.PrepareDevice();
cudaEvent_t done = nullptr;;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_assignElementProductOfWithShift<ElemType> << <blocksPerGrid, GridDim::maxThreadsPerBlock, 0, t_stream >> >(m_pArray, a.m_pArray, b.m_pArray, shift, N);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
return *this;
}
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_assignElementProductOfWithShift<ElemType> << <blocksPerGrid, GridDim::maxThreadsPerBlock, 0, t_stream >> >(m_pArray, a.m_pArray, b.m_pArray, shift, N);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
return *this;
}
//sequence training
template<class ElemType>
@ -4455,366 +4428,87 @@ namespace Microsoft { namespace MSR { namespace CNTK {
CUDA_CALL(cudaFree(d_zeta));
};
// =======================================================================
// TensorView support
// =======================================================================
// BUGBUG: This is a stub that currently is just the CPU code. This is not functional yet.
// To save time, this makes extensive use of templates and macros.
// -----------------------------------------------------------------------
// simple fixed-size arrays for passing dimension information by value
// since CUDA can't just take our std::array and std::vector
// -----------------------------------------------------------------------
template<typename T, size_t N>
struct FixedArray
{
T m_data[N];
__device__ __host__ size_t size() const { return N; }
__device__ __host__ T & operator[](size_t n) { return m_data[n]; }
__device__ __host__ T operator[](size_t n) const { return m_data[n]; }
template<class VEC> FixedArray(const VEC & data) // construct from CPU-side STL array or vector
{
assert(data.size() == N);
for (size_t n = 0; n < N; n++)
{
m_data[n] = (T)data[n];
if (m_data[n] != data[n]) // overflow check
InvalidArgument("FixedArray: Dimensions out of range, too few bits.");
}
}
};
template<typename T> // specialized version for 0 elements
struct FixedArray<T, 0>
{
__device__ __host__ size_t size() const { return 0; }
template<class VEC> FixedArray(const VEC & data) { assert(data.size() == 0); UNUSED(data); }
};
template<typename T, size_t N, size_t K> // N = which input/output; K = index depth
struct FixedMatrix
{
T m_data[N][K];
__device__ __host__ size_t getNumRows() const { return N; }
__device__ __host__ size_t getNumCols() const { return K; }
__device__ __host__ T & operator()(size_t n, size_t k) { return m_data[n][k]; }
__device__ __host__ T operator()(size_t n, size_t k) const { return m_data[n][k]; }
template<typename U> FixedMatrix(const array<vector<U>, N> & data) // construct from CPU-side array of vectors
{
assert(data.size() == N);
for (size_t n = 0; n < N; n++)
{
assert(data[n].size() == K);
for (size_t k = 0; k < K; k++)
{
m_data[n][k] = (T)data[n][k];
if (m_data[n][k] != data[n][k]) // overflow check
InvalidArgument("FixedArray: Dimensions out of range, too few bits.");
}
}
}
};
template<typename T, size_t N> // specialized version for 0 elements
struct FixedMatrix<T, N, 0>
{
__device__ __host__ size_t getNumRows() const { return N; }
__device__ __host__ size_t getNumCols() const { return 0; }
template<typename U> FixedMatrix(const array<vector<U>, N> & data) { assert(data.size() == N); for (size_t n = 0; n < N; n++) assert(data[n].size() == 0); UNUSED(data); }
};
// -----------------------------------------------------------------------
// function to actually compute a function of (N-1) inputs based on the opcode
// TensorView entry points from Matrix.cpp
// -----------------------------------------------------------------------
// helper to provide a vector of ones of at least the given number of elements
// TODO: Use this to implement ComputationNode::ConstOnes? Or do we even need that anymore?
template<class ElemType>
struct TensorOps
static shared_ptr<GPUMatrix<ElemType>> GetOnesVector(size_t N, DEVICEID_TYPE deviceId)
{
static __device__ ElemType Compute(const FixedArray<ElemType*, 2> & pointers, ElementWiseOperator op)
// using an array of shared_ptrs because those are thread-safe. The objects themselves are immutable.
// And using a plain array so this will never get freed, avoiding free-after-DLL-unload issues.
static shared_ptr<GPUMatrix<ElemType>> onesCache[32]; // cache of objects
if (deviceId >= _countof(onesCache))
LogicError("GetOnesVector: onesCache[] too small (%d entries), increase (you need %d) and recompile.", (int)_countof(onesCache), (int)deviceId+1);
auto p = onesCache[deviceId];
if (!p || p->GetNumRows() < N) // must (re-)allocate
{
ElemType a = *(pointers[0]);
#define CaseUnaryTensorOp(oper) case ElementWiseOperator::op ## oper: return Op ## oper(a)
switch (op)
{
ForAllUnaryOps(CaseUnaryTensorOp);
default: return 0; // (failure)
}
p = make_shared<GPUMatrix<ElemType>>(GPUMatrix<ElemType>::Ones(N, 1, deviceId));
onesCache[deviceId] = p; // this will replace the pointer thread-safely (although weird race conditions may happen where a larger entry is overwritten by a smaller one; will still run correctly)
}
static __device__ ElemType Compute(const FixedArray<ElemType*, 3> & pointers, ElementWiseOperator op)
{
ElemType a = *(pointers[0]);
ElemType b = *(pointers[1]);
#define CaseBinaryTensorOp(oper) case ElementWiseOperator::op ## oper: return Op ## oper(a,b)
switch (op)
{
ForAllBinaryOps(CaseBinaryTensorOp); // note: this costs about 6% compared to having only a single case
default: return 0; // (failure)
}
}
static __device__ ElemType Compute(const FixedArray<ElemType*, 4> & pointers, ElementWiseOperator op)
{
ElemType a = *(pointers[0]);
ElemType b = *(pointers[1]);
ElemType c = *(pointers[2]);
#define CaseTernaryTensorOp(oper) case ElementWiseOperator::op ## oper: return Op ## oper(a,b,c)
switch (op)
{
ForAllTernaryOps(CaseTernaryTensorOp);
default: return 0; // (failure)
}
}
};
// -----------------------------------------------------------------------
// function to compute the value for a given output location (perform reduction if needed)
// -----------------------------------------------------------------------
#define C_size_t CUDA_LONG
#define C_int CUDA_LONG
#define C_unsigned_int CUDA_LONG
template<class ElemType, C_size_t N, C_int M, C_int m>
struct TensorOpReduce
{
// this version for m >= 0
static __device__ ElemType Compute(FixedArray<ElemType*, N> pointers, ElementWiseOperator op,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides)
{
// start with index 0
// Using 'double' since we are memory-bound anyway.
double/*ElemType*/ aggregate = TensorOpReduce<ElemType, N, M, m - 1>::Compute(pointers, op, reducingOpDims, reducingStrides);
// apply this index to the pointers
C_size_t dim = reducingOpDims[m];
for (C_size_t k = 1/*done with k=0 already*/; k < dim; k++)
{
// bump the pointers
for (C_size_t i = 0; i < N; i++)
pointers[i] += reducingStrides(i,(C_size_t)m);
ElemType val = TensorOpReduce<ElemType, N, M, m - 1>::Compute(pointers, op, reducingOpDims, reducingStrides);
aggregate += val;
}
return (ElemType)aggregate;
}
};
// this one terminates the template recursion over reduction dimensions
// The pointers are pointing to the input element.
template<class ElemType, C_size_t N, C_int M>
struct TensorOpReduce<ElemType, N, M, /*m=*/-1>
{
// this version for m = -1
// the pointers are pointing to the right location(s) to take the operation over
static __device__ ElemType Compute(FixedArray<ElemType*, N> pointers, ElementWiseOperator op,
const FixedArray<C_unsigned_int, M> & /*reducingOpDims*/, const FixedMatrix<C_int, N, M> & /*reducingStrides*/)
{
return TensorOps<ElemType>::Compute(pointers, op); // finally computing something!
}
};
// -----------------------------------------------------------------------
// perform loop over regular index k for N-nary operations (N counting the output)
// -----------------------------------------------------------------------
// The canonical case, vector op without reduction, is this PTX function:
// _ZN9Microsoft3MSR4CNTK15_launchTensorOpIfLy3ELi1ELi0EEEvT_NS1_10FixedArrayIPS3_XT0_EEES3_NS1_19ElementWiseOperatorENS4_IjXT2_EEENS1_11FixedMatrixIiXT0_EXT2_EEENS4_IjXT1_EEENS9_IiXT0_EXT1_EEEi
// float ^ ^ aggregate loop
// _ZN9Microsoft3MSR4CNTK15_launchTensorOpIfLy3ELi0ELi1EEEvT_NS1_10FixedArrayIPS3_XT0_EEES3_NS1_19ElementWiseOperatorENS4_IjXT2_EEENS1_11FixedMatrixIiXT0_EXT2_EEENS4_IjXT1_EEENS9_IiXT0_EXT1_EEEi
// args? ^ ^ input dims
// _ZN9Microsoft3MSR4CNTK15_launchTensorOpIfLi3ELi0ELi1EEEvT_NS1_10FixedArrayIPS3_XT0_EEES3_NS1_19ElementWiseOperatorENS4_IiXT2_EEENS1_11FixedMatrixIiXT0_EXT2_EEENS4_IiXT1_EEENS9_IiXT0_EXT1_EEEi
// I see:
// - C_size_t causes sign extend operations
// increment a pointer by a number of elements
// This will later change into pre-scaled strides.
template<class ElemType>
static __device__ void IncPtr(ElemType * &p, C_int index, C_int stride)
{
//p = (ElemType*)(byteOffset + (char *)p);
p = p + index * stride;
return p;
}
// The 'pointers' only refer to a single element, so we will bump them in-place to perform indexing.
template<class ElemType, C_size_t N, C_int M, C_int K, C_int k>
struct TensorOpElement
{
// template-recursive version loops over indices
static __device__ void Compute(CUDA_LONG id, ElemType beta, FixedArray<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const FixedArray<C_unsigned_int, K> & regularOpStrides, const FixedMatrix<C_int, N, K> & regularStrides,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides)
{
// map id (location on grid) to index[k]
C_size_t stride = regularOpStrides[(C_size_t)k];
C_size_t index = id / stride; // this dimension
id = id % stride; // remaining dimensions inside this
// apply this index to the pointers
for (C_size_t i = 0; i < N; i++)
pointers[i] += index * regularStrides(i,(C_size_t)k); // now this dimension is taken care of
// process the previous index
TensorOpElement<ElemType, N, M, K, k - 1>::Compute(id, beta, pointers, alpha, op, regularOpStrides, regularStrides, reducingOpDims, reducingStrides);
}
};
// specialization for k=0 where stride is guaranteed to be 1
template<class ElemType, C_size_t N, C_int M, C_int K>
struct TensorOpElement<ElemType, N, M, K, /*k=*/0>
{
// template-recursive version loops over indices
static __device__ void Compute(CUDA_LONG id, ElemType beta, FixedArray<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const FixedArray<C_unsigned_int, K> & regularOpStrides, const FixedMatrix<C_int, N, K> & regularStrides,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides)
{
// map id (location on grid) to index[k]
C_size_t index = id; // this dimension
// apply this index to the pointers
for (C_size_t i = 0; i < N; i++)
pointers[i] += index * regularStrides(i,0); // now this dimension is taken care of
// process the previous index
TensorOpElement<ElemType, N, M, K, -1>::Compute(/*id*/0, beta, pointers, alpha, op, regularOpStrides, regularStrides, reducingOpDims, reducingStrides);
}
};
// specialization for k = -1 terminates the template recursion
template<class ElemType, C_size_t N, C_int M, C_int K>
struct TensorOpElement<ElemType, N, M, K, /*k=*/-1>
{
// template-recursion-teminating version computes the actual value for this output location
// now the pointers point to the right element
static __device__ void Compute(CUDA_LONG /*id*/, ElemType beta, FixedArray<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const FixedArray<C_unsigned_int, K> & /*regularOpStrides*/, const FixedMatrix<C_int, N, K> & /*regularStrides*/,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides)
{
// compute the operation for this output coordinate
// This may still involve a reduction over inverse-broadcasting dimensions.
ElemType val = TensorOpReduce<ElemType, N, M, M - 1>::Compute(pointers, op, reducingOpDims, reducingStrides);
// scale
val *= alpha;
// combine with previous value in target matrix, then write it out
auto * pout = pointers[N - 1];
if (beta != 0)
val += beta * *pout;
// save
*pout = val;
}
};
// -----------------------------------------------------------------------
// kernel and launch
// -----------------------------------------------------------------------
// the top-level kernel
template<class ElemType, C_size_t N, C_int M, C_int K>
__global__ void _launchTensorOp(ElemType beta, FixedArray<ElemType*, N> pointers, ElemType alpha, ElementWiseOperator op,
FixedArray<C_unsigned_int, K> regularOpStrides, FixedMatrix<C_int, N, K> regularStrides,
FixedArray<C_unsigned_int, M> reducingOpDims, FixedMatrix<C_int, N, M> reducingStrides, CUDA_LONG numElements)
{
CUDA_LONG id = GridDim::GetLinearThreadId(); // blockDim.x * blockIdx.x + threadIdx.x;
if (id >= numElements)
return;
TensorOpElement<ElemType, N, M, K, K - 1>::Compute(id, beta, pointers, alpha, op, regularOpStrides, regularStrides, reducingOpDims, reducingStrides);
}
// launch tensor op with CUDA
// All dimensions (N-ariness, number of input dimensions K and number of reduction dimensions M) are bound to template parameters now.
template<class ElemType, C_size_t N, C_int M, C_int K>
static void LaunchTensorOp(ElemType beta, array<ElemType*, N> pointerVector, ElemType alpha, ElementWiseOperator op,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, N> & regularStrideVectors,
const vector<size_t> & reducingOpDimVector, const array<vector<ptrdiff_t>, N> & reducingStrideVectors)
{
// copy all parameters to CUDA-compatible data structures
FixedArray<ElemType*, N> pointers(pointerVector);
vector<C_size_t> regularOpStrideVector; // kernel needs the strides for converting thread index back to multi-dimensional tensor index
C_size_t numElements = 1;
for (C_size_t k = 0; k < regularOpDims.size(); k++)
{
regularOpStrideVector.push_back(numElements);
numElements *= (C_size_t)regularOpDims[k];
}
FixedArray<C_unsigned_int, K> regularOpStrides(regularOpStrideVector);
FixedMatrix<C_int, N, K> regularStrides(regularStrideVectors);
FixedArray<C_unsigned_int, M> reducingOpDims(reducingOpDimVector);
FixedMatrix<C_int, N, M> reducingStrides(reducingStrideVectors);
CUDA_LONG NN = (CUDA_LONG)numElements;
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
GridDim grid(NN);
_launchTensorOp<ElemType, N, M, K> << <grid.m_blocksPerGrid, grid.m_threadsPerBlock, 0, t_stream >> >(beta, pointers, alpha, op, regularOpStrides, regularStrides, reducingOpDims, reducingStrides, NN);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
}
// -----------------------------------------------------------------------
// map runtime parameters N to template parameters
// -----------------------------------------------------------------------
// tensor operation with k+1 dimensions (-1 means scalar)
template<class ElemType, C_size_t N, C_int K>
static void TensorOpWithRegularLoop(ElemType beta, const array<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, N> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, N> & reducingStrides)
{
size_t dims = reducingOpDims.size();
switch (dims)
{
case 2: return LaunchTensorOp<ElemType, N, 2, K>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 1: return LaunchTensorOp<ElemType, N, 1, K>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 0: return LaunchTensorOp<ElemType, N, 0, K>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
default: LogicError("TensorOp: %d non-flattened reduction dimensions are not supported.", (C_int)dims);
}
}
// tensor operation, generalized in number of arguments
// This function now expands into different k. It also eliminates the offsets by adding them to the pointers.
template<class ElemType, C_size_t N>
static void TensorOpN(ElemType beta, array<ElemType*, N> pointers, ElemType alpha, ElementWiseOperator op,
const array<size_t, N> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, N> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, N> & reducingStrides)
{
for (C_size_t i = 0; i < N; i++) // N = a small constant, this will be unrolled
pointers[i] += offsets[i];
size_t dims = regularOpDims.size();
switch (dims)
{
case 4: return TensorOpWithRegularLoop<ElemType, N, 4>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 3: return TensorOpWithRegularLoop<ElemType, N, 3>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 2: return TensorOpWithRegularLoop<ElemType, N, 2>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 1: return TensorOpWithRegularLoop<ElemType, N, 1>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 0: return TensorOpWithRegularLoop<ElemType, N, 0>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
default: LogicError("TensorOp: %d non-flattened input dimensions are not supported.", (C_int)dims);
}
}
// -----------------------------------------------------------------------
// entry points from Matrix.cpp
// -----------------------------------------------------------------------
// perform unary operation 'op' on a giving 'this', reinterpreting the matrices as tensors as specified by the dims and strides
// This binds the N-ariness to a template parameter N, and gets the data pointers out from the matrix objects.
template<class ElemType>
void GPUMatrix<ElemType>::TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, ElemType alpha, ElementWiseOperator op,
const array<size_t, 2> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 2> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 2> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 2> & reducingStrides)
{
a.PrepareDevice();
if (a.GetComputeDeviceId() != GetComputeDeviceId())
InvalidArgument("All matrices must be on the same GPU");
return TensorOpN<ElemType, 2>(beta, array<ElemType*, 2> { a.m_pArray, m_pArray }, alpha, op, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
// special case: linear processing
// The case statement has measurable impact for unary ops (but not for binary ops it seems, due to double mem access).
// Linear gap-free unary ops happen so regularly that we will eliminate the case statement from the CUDA kernel, and instead expand all.
if (regularOpDims.size() == 1 && regularStrides[0][0] == 1 && regularStrides[1][0] == 1 && reducingOpDims.size() == 0)
return LaunchUnaryTensorOp<ElemType>(beta, a.m_pArray + offsets[0], m_pArray + offsets[1], alpha, op, regularOpDims[0]);
// special case: recuding a matrix onto a column vector; can be done with SGEMM
// Note: A minor risk is that with this, our own reduction function will rarely be used.
// That function was tested to give the same results with 'double', and nearly the same with 'float' (different summation order matters).
else if (op == ElementWiseOperator::opCopy && // we are just adding to target without any further operation
#ifdef _DEBUG
sizeof(ElemType) == sizeof(float) && // in debug don't shortcut 'double' so we have some test of our own codepath
#endif
regularOpDims.size() == 1 && regularStrides[0][0] == 1 && regularStrides[1][0] == 1 && // we are processing a column
reducingOpDims.size() == 1 && reducingStrides[0][0] >= (ptrdiff_t)regularOpDims[0]) // reducing across columns and no overlap
{
assert(reducingStrides[1][0] == 0);
auto ARows = regularOpDims[0]; // vertical steps
auto ACols = reducingOpDims[0]; // horizontal steps (reduction)
auto ALd = reducingStrides[0][0]; // horizontal step width through matrix
cublasHandle_t cuHandle = GetCublasHandle(a.GetComputeDeviceId());
CUBLAS_CALL(cublas_gemm(cuHandle, CUBLAS_OP_N, CUBLAS_OP_N, (int)/*CRows=*/ARows, /*CCols=*/1, (int)ACols, &alpha,
/*A00=*/a.m_pArray + offsets[0], (int)ALd,
/*B00=*/GetOnesVector<ElemType>(ACols, a.GetComputeDeviceId())->m_pArray, (int)/*BRows=*/ACols, &beta,
/*C00=*/m_pArray + offsets[1], (int)/*CRows=*/ARows));
return;
}
// TODO: Add a special case for tensor bias reduction. cudnn is ~7% faster on Image/QuickE2E.
// regular case
else
return TensorOpN<ElemType, 2>(beta, array<ElemType*, 2> { a.m_pArray, m_pArray }, alpha, op, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
}
// perform binary operation 'op' on a and b giving 'this', reinterpreting the matrices as tensors as specified by the dims and strides
template<class ElemType>
void GPUMatrix<ElemType>::TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, ElemType alpha, ElementWiseOperator op,
const array<size_t, 3> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 3> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 3> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 3> & reducingStrides)
{
a.PrepareDevice();
if (a.GetComputeDeviceId() != GetComputeDeviceId() || b.GetComputeDeviceId() != GetComputeDeviceId())
InvalidArgument("All matrices must be on the same GPU");
return TensorOpN<ElemType, 3>(beta, array<ElemType*, 3> { a.m_pArray, b.m_pArray, m_pArray }, alpha, op, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
}
@ -4822,8 +4516,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType>
void GPUMatrix<ElemType>::TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, const GPUMatrix<ElemType>& c, ElemType alpha, ElementWiseOperator op,
const array<size_t, 4> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 4> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 4> & reducingStrides)
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 4> & reducingStrides)
{
a.PrepareDevice();
if (a.GetComputeDeviceId() != GetComputeDeviceId() || b.GetComputeDeviceId() != GetComputeDeviceId() || c.GetComputeDeviceId() != GetComputeDeviceId())
@ -4831,7 +4525,6 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return TensorOpN<ElemType, 4>(beta, array<ElemType*, 4> { a.m_pArray, b.m_pArray, c.m_pArray, m_pArray }, alpha, op, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
}
// =======================================================================
// explicit instantiations business
// =======================================================================
@ -4842,10 +4535,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template class DeviceBoundNumber<double>;
template<class ElemType>
cublasHandle_t GPUMatrix<ElemType>::s_cuHandle[GPUMatrix<ElemType>::MaxGpus]={0};
cublasHandle_t GPUMatrix<ElemType>::s_cuHandle[GPUMatrix<ElemType>::MaxGpus] = { 0 };
template<class ElemType>
void* GPUMatrix<ElemType>::s_curandGenerator=NULL;
void* GPUMatrix<ElemType>::s_curandGenerator = NULL;
// We use Matrix<char> as the backing store for QuantizedMatrix
// Let's explicitly instantiate the methods we need for that purpose

21
Source/Math/GPUMatrix.h
Просмотреть файл

@ -9,6 +9,7 @@
#include "File.h"
#include "Helpers.h"
#include "CommonMatrix.h"
#include "DataTensor.h" // only for SmallVector; I was hoping to keep this out
#include "DebugUtil.h"
#include "BestGpu.h" // for CPUONLY macro
#include "ConcStack.h"
@ -46,9 +47,7 @@ typedef struct CUstream_st *cudaStream_t;
void MATH_API SetStream(cudaStream_t stream);
cudaStream_t MATH_API GetStream();
namespace Microsoft {
namespace MSR {
namespace CNTK {
namespace Microsoft { namespace MSR { namespace CNTK {
// -----------------------------------------------------------------------
// DeviceBoundNumber -- This class represents a number which resides on a particular device. Use it to avoid unnecessary transfers between CPU and GPU
@ -411,16 +410,16 @@ namespace Microsoft {
void TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 2> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 2> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 2> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 2> & reducingStrides);
void TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 3> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 3> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 3> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 3> & reducingStrides);
void TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, const GPUMatrix<ElemType>& c, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 4> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 4> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 4> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 4> & reducingStrides);
static void CreateCurandObject(unsigned long seed, const char *caller);
static void ResetCurandObject(unsigned long seed, const char *caller);
@ -505,7 +504,7 @@ namespace Microsoft {
}}}
// Error handling
template<typename ERRTYPE> static const char * CudaErrString(ERRTYPE x);
template<typename ERRTYPE> const char * CudaErrString(ERRTYPE x); // actual error function is defined inside .cu files
template<typename ERRTYPE> static void CudaCall(ERRTYPE retCode, const char * exprString, const char * libName, ERRTYPE successCode)
{
if (retCode != successCode)
@ -522,7 +521,9 @@ template<typename ERRTYPE> static void CudaCall(ERRTYPE retCode, const char * ex
}
}
}
#define CUDA_CALL(expr) (CudaCall((expr), #expr, "CUDA", cudaSuccess))
#define CUBLAS_CALL(expr) (CudaCall((expr), #expr, "CUBLAS", CUBLAS_STATUS_SUCCESS))
#define CUSPARSE_CALL(expr) (CudaCall((expr), #expr, "CUSPARSE", CUSPARSE_STATUS_SUCCESS))
#define CURAND_CALL(expr) (CudaCall((expr), #expr, "CURAND", CURAND_STATUS_SUCCESS))
#define CUDNN_CALL(expr) (CudaCall((expr), #expr, "cuDNN", CUDNN_STATUS_SUCCESS))

367
Source/Math/GPUMatrixCUDAKernels.cuh
Просмотреть файл

@ -4,15 +4,22 @@
// </copyright>
//
#pragma once
#include "BestGpu.h"
#ifndef CPUONLY
#include <float.h>
#include <cuda_runtime.h>
#pragma push_macro("TENSOR_OPS_DECL")
#define TENSOR_OPS_DECL __device__ __host__
#include "CommonMatrix.h"
#include "GPUMatrix.h"
#include "TensorOps.h" // for exp_() etc.
#include "device_functions.h"
#include <cuda_runtime.h>
#include <assert.h>
#include <float.h>
#pragma pop_macro("TENSOR_OPS_DECL")
// REVIEW alexeyk: disable warnings properly for GCC/clang
#ifdef _MSC_VER
@ -35,40 +42,117 @@
#endif
#define IDX2C(i,j,ld) (((j)*(ld))+(i)) // 0 based indexing
#define CALCULATE_ELEMENTWISE_INDEX_OR_EXIT CUDA_LONG id = blockDim.x * blockIdx.x + threadIdx.x; if (id>=N) return;
// CUDA atomicAdd() only exists for 'float'. This is the 'double' version.
static __inline__ __device__ double atomicAdd(double* address, double val)
{
unsigned long long int* address_as_ull = (unsigned long long int*)address;
unsigned long long int old = *address_as_ull, assumed;
do {
assumed = old;
old = atomicCAS(address_as_ull, assumed, __double_as_longlong(val + __longlong_as_double(assumed)));
} while (assumed != old);
return __longlong_as_double(old);
}
// TODO: replace this with TensorOps.h LogAdd(). It differs in using ElemType throughout, while this one seems to use 'double' versions of exp() and log().
// The 'k' in the name is to avoid naming conflicts with various versions of logadd() that are defined throughout the codebase.
template<class ElemType>
static inline __device__ __host__ ElemType logaddk(ElemType x, ElemType y)
{
ElemType temp, diff, z;
if (x < y)
{
temp = x; x = y; y = temp;
}
diff = y - x;
if (diff < MINLOGEXP)
{
return (x < LSMALL) ? LZERO : x;
}
else
{
z = exp(diff);
return x + log(1.0 + z);
}
}
namespace Microsoft { namespace MSR { namespace CNTK {
// ---------------------------------------------------------------------------
// GridDim -- helper to choose the CUDA grid dimensions
// ---------------------------------------------------------------------------
// TODO: move the computation of 'id' here as well
template<class INT, class INT2>
static INT CeilDiv(INT a, INT2 b) // ceil(a/b)
{
return (INT)(((size_t)a + (size_t)b - 1) / (size_t)b); // these size_t casts are necessary since b may be INT_MAX (for maxGridSize[])
}
struct GridDim
{
static const CUDA_LONG maxThreadsPerBlock = 512; // use this many threads per block
static const CUDA_LONG minBlocksPerGrid = 48; // use at least that many blocks --TODO: base this on actual hardware
static const CUDA_LONG maxWarpsPerBlock = 16; // use this many warps per block
// use these for launching
// GridDim grid(NN);
// kernel<<<grid.m_blocksPerGrid, grid.m_threadsPerBlock, ...>>>(...)
int m_blocksPerGrid, m_threadsPerBlock; // (these may in the future be extended to multi-dimensional ones)
CUDA_LONG m_N;
GridDim(CUDA_LONG N) // linear grid
{
m_N = N;
if (N == 0) // CUDA will fail to launch with 0 blocks
N = 1;
m_threadsPerBlock = GridDim::maxThreadsPerBlock;
m_blocksPerGrid = (N + m_threadsPerBlock - 1) / m_threadsPerBlock;
if (m_blocksPerGrid < minBlocksPerGrid)
// get device information
const auto & props = GetDeviceProps();
CUDA_LONG numProcs = props.multiProcessorCount;
CUDA_LONG warpSize = props.warpSize;
// distribute warps evenly over processors
CUDA_LONG warpsPerProc = CeilDiv(N, numProcs * warpSize);
// if too many warps per block then reduce #warps
if (warpsPerProc > maxWarpsPerBlock)
{
// we cannot fill all blocks -> use less threads
m_threadsPerBlock = (N + minBlocksPerGrid - 1) / minBlocksPerGrid;
// round to multiples of 32 (warp size) for efficient memory access
m_threadsPerBlock = (m_threadsPerBlock + 31) / 32 * 32;
m_blocksPerGrid = (N + m_threadsPerBlock - 1) / m_threadsPerBlock;
CUDA_LONG overBy = CeilDiv(warpsPerProc, maxWarpsPerBlock); // we are over by this factor
warpsPerProc = CeilDiv(warpsPerProc, overBy);
}
// put it back together
m_threadsPerBlock = warpsPerProc * warpSize;
m_blocksPerGrid = CeilDiv(N, m_threadsPerBlock);
if (m_blocksPerGrid == 1)
m_threadsPerBlock = N; // don't launch more than necessary --TODO: Does this make a difference at all?
assert(m_blocksPerGrid * m_threadsPerBlock >= N);
}
static std::vector<cudaDeviceProp> CacheDeviceProps()
{
int numDevices;
CUDA_CALL(cudaGetDeviceCount(&numDevices));
std::vector<cudaDeviceProp> props(numDevices);
for (int i = 0; i < numDevices; i++)
CUDA_CALL(cudaGetDeviceProperties(&props[i], i));
#if 1 // on Linux, maxGridSize[0] gets reported as 0
for (int i = 0; i < numDevices; i++)
fprintf(stderr, "%d procs %d warps %d %d %d max grid on %s\n", (int)props[i].multiProcessorCount, (int)props[i].warpSize, (int)props[i].maxGridSize[0], (int)props[i].maxGridSize[1], (int)props[i].maxGridSize[2], props[i].name);
#endif
return props;
}
// get device properties of current device
static const cudaDeviceProp & GetDeviceProps()
{
static std::vector<cudaDeviceProp> props = CacheDeviceProps(); // thread-safe according to C++ standard
int deviceId;
cudaGetDevice(&deviceId);
return props[deviceId];
}
// compute our location on the grid
static __device__ CUDA_LONG GetLinearThreadId()
{
@ -76,15 +160,25 @@ struct GridDim
}
};
#define CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N) CUDA_LONG id = GridDim::GetLinearThreadId(); if (id>=N) return;
#ifdef __GNUC__
#define UNUSED_FUNCTION_ATTRIBUTE __attribute__ ((unused))
#else
#define UNUSED_FUNCTION_ATTRIBUTE
#endif
// Predefine this for later.
static __inline__ __device__ double atomicAdd(double* address, double val) UNUSED_FUNCTION_ATTRIBUTE;
//CUDA Kernels code
// ===========================================================================
// CUDA kernels follow, lots of them
// ===========================================================================
// _elementWise*() kernels
//
// Designed to operate on contiguous blocks of memory, where the output is a simple function of the inputs.
// The first parameters of every function are inputs, and the last two arguments to each function are always
// (ElemenType *res, CUDA_LONG N), a pointer and length of the output block. Each thread computes a function
// of the inputs for one value in the output.
template<class ElemType>
__global__ void _elementWisePowerOnCuda(
const ElemType alpha,
@ -92,7 +186,7 @@ __global__ void _elementWisePowerOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
if (alpha==0)
{
res[id]=1;
@ -122,70 +216,51 @@ __global__ void _elementWisePowerOnCuda(
}
};
// Note that this code is inefficient on CUDA due to diverging code paths.
// Use Sigmoid() in TensorOps.h instead, which solves this problem.
template<class ElemType>
__global__ void _elementWiseSigmoidOnCuda(
const ElemType *a,
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
if (sizeof(ElemType)==sizeof(double))
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
#if 0 // this computes the same thing but is twice as fast on CUDA
res[id] = Microsoft::MSR::CNTK::Sigmoid(a[id]);
#else
if (a[id] >= 0)
{
if (a[id]>=0)
{
double e = exp(-1*a[id]);
res[id]=1/(1+e);
}
else
{
double e = exp(a[id]);
res[id]=e/(1+e);
}
ElemType e = exp_(-a[id]);
res[id] = 1 / (1 + e);
}
else
{
if (res[id]>=0)
{
float e = expf(-1*a[id]);
res[id]=1/(1+e);
}
else
{
float e = exp(a[id]);
res[id]=e/(1+e);
}
ElemType e = exp_(a[id]);
res[id] = e / (1 + e);
}
#endif
};
__device__ __forceinline__ float _exp(float f)
{
return expf(f);
}
__device__ __forceinline__ double _exp(double f)
{
return exp(f);
}
template<class ElemType>
__global__ void _assignSigmoidOf(
const ElemType* a,
ElemType* res,
const CUDA_LONG N)
{
CUDA_LONG id = blockDim.x * blockIdx.x + threadIdx.x;
if (id >= N)
{
return;
}
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
// This function computes 1 / (1 + e^(-x)) which yields 1 / (1 + e^|x|) if x is negative,
// and e^x / (1 + e^x) if x is positive.
// BUGBUG: This does not invert the calculation when the exp argument becomes large, potentially causing overflows.
// There is a second version of this function that does. That should be used.
#if 0 // this has the same speed now, although not identical accuracy
res[id] = Microsoft::MSR::CNTK::Sigmoid(a[id]);
#else
ElemType negElem = -a[id];
ElemType e = _exp(negElem);
ElemType e = exp_(negElem);
res[id] = 1 / (e + 1);
#endif
};
template<class ElemType>
@ -194,7 +269,7 @@ __global__ void _elementWiseLinRectDerivativeOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = (a[id] <= 0) ? 0 : 1;
}
@ -204,7 +279,7 @@ __global__ void _elementWiseSigmoidDerivativeOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = a[id] * (1-a[id]);
}
@ -214,16 +289,8 @@ __global__ void _elementWiseTanhOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
if (sizeof(ElemType)==sizeof(double))
{
res[id]=tanh(a[id]);
}
else
{
res[id]=tanhf(a[id]);
}
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = tanh_(a[id]);
};
//to prevent negative values caused by floating operations, we force inputs to be >=0
@ -234,15 +301,8 @@ __global__ void _elementWiseSqrtOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
if (sizeof(ElemType)==sizeof(double))
{
res[id]=sqrt(max((ElemType)0, a[id]));
}
else
{
res[id]=sqrtf(max(ElemType(0), a[id]));
}
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = sqrt_(max((ElemType)0, a[id]));
};
template<class ElemType>
@ -251,15 +311,8 @@ __global__ void _elementWiseExpOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
if (sizeof(ElemType)==sizeof(double))
{
res[id]=exp(a[id]);
}
else
{
res[id]=expf(a[id]);
}
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = exp_(a[id]);
};
template<class ElemType>
@ -268,22 +321,8 @@ __global__ void _elementWiseLogOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
if (a[id]<EPS_IN_LOG)
{
res[id]=LOG_OF_EPS_IN_LOG;
}
else
{
if (sizeof(ElemType)==sizeof(double))
{
res[id]=log(a[id]);
}
else
{
res[id]=logf(a[id]);
}
}
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = (a[id] < EPS_IN_LOG) ? LOG_OF_EPS_IN_LOG : log_(a[id]);
};
template<class ElemType>
@ -292,15 +331,8 @@ __global__ void _elementWiseAbsOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
if (sizeof(ElemType)==sizeof(double))
{
res[id]=fabs(a[id]);
}
else
{
res[id]=fabsf(a[id]);
}
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = fabs_(a[id]);
};
template<class ElemType>
@ -309,15 +341,8 @@ __global__ void _elementWiseCosineOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
if (sizeof(ElemType)==sizeof(double))
{
res[id]=cos(a[id]);
}
else
{
res[id]=cosf(a[id]);
}
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = cos_(a[id]);
};
template<class ElemType>
@ -326,18 +351,10 @@ __global__ void _elementWiseNegativeSineOnCuda(
ElemType *res,
const CUDA_LONG N)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
if (sizeof(ElemType)==sizeof(double))
{
res[id]=-sin(a[id]);
}
else
{
res[id]=-sinf(a[id]);
}
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
res[id] = -sin_(a[id]);
};
template<class ElemType>
__global__ void _setValue(
ElemType* a,
@ -1131,6 +1148,7 @@ __global__ void _assignColumnwiseHardmaxOf(
}
}
#if 0
template<class ElemType>
__global__ void _inplaceTruncateBottom(
ElemType* a,
@ -1143,6 +1161,7 @@ __global__ void _inplaceTruncateBottom(
if (a[id]<threshold)
a[id]=threshold;
}
#endif
template<class ElemType>
__global__ void _assignTruncateBottom(
@ -1151,15 +1170,11 @@ __global__ void _assignTruncateBottom(
const ElemType threshold,
const CUDA_LONG N)
{
CUDA_LONG id = blockDim.x * blockIdx.x + threadIdx.x;
if (id>=N)
return;
if (a[id]<threshold)
us[id]=threshold;
else
us[id]=a[id];
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
us[id] = a[id] < threshold ? threshold : a[id];
}
#if 0
template<class ElemType>
__global__ void _inplaceTruncateTop(
ElemType* a,
@ -1172,6 +1187,7 @@ __global__ void _inplaceTruncateTop(
if (a[id]>threshold)
a[id]=threshold;
}
#endif
template<class ElemType>
__global__ void _assignTruncateTop(
@ -1180,13 +1196,8 @@ __global__ void _assignTruncateTop(
const ElemType threshold,
const CUDA_LONG N)
{
CUDA_LONG id = blockDim.x * blockIdx.x + threadIdx.x;
if (id>=N)
return;
if (a[id]>threshold)
us[id]=threshold;
else
us[id]=a[id];
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
us[id] = a[id] > threshold ? threshold : a[id];
}
template<class ElemType>
@ -2442,7 +2453,7 @@ __global__ void _matrixMatrixAddOnCuda(
const CUDA_LONG N
)
{
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
c[id] = alpha * a[id] + b[id];
}
@ -2455,8 +2466,8 @@ __global__ void _matrixVectorRowWiseAddWithThreadPerElem(
const CUDA_LONG m, //number of rows
const CUDA_LONG n) //number of cols
{
CUDA_LONG N = m*n; // used in CALCULATE_ELEMENTWISE_INDEX_OR_EXIT macro
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
CUDA_LONG N = m*n; // used in CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N) macro
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
CUDA_LONG col = id / m;
@ -2473,8 +2484,8 @@ __global__ void _matrixVectorColumnWiseAddWithThreadPerElem(
const CUDA_LONG m, //number of rows
const CUDA_LONG n) //number of cols
{
CUDA_LONG N = m*n; // used in CALCULATE_ELEMENTWISE_INDEX_OR_EXIT macro
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT;
CUDA_LONG N = m*n; // used in CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N) macro
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N);
CUDA_LONG col = id / m;
CUDA_LONG row = id - col*m;
@ -3568,7 +3579,7 @@ __global__ void _assignNoiseContrastiveEstimation(
if (positive)
prob = -prob;
ElemType score_noise = log_num_noise_samples + prob;
ElemType z = logadd(tmp[i], score_noise);
ElemType z = logaddk(tmp[i], score_noise);
ElemType logprob = tmp[i] - z;
ElemType logprob_noise = score_noise - z;
tmp[i] = -exp(logprob);
@ -3791,9 +3802,7 @@ __global__ void _inplaceTruncate(
const ElemType threshold,
const CUDA_LONG N)
{
CUDA_LONG id = blockDim.x * blockIdx.x + threadIdx.x;
if (id>=N)
return;
CALCULATE_ELEMENTWISE_INDEX_OR_EXIT(id,N)
ElemType locThresholdPos = abs(threshold);
ElemType locTHresholdNeg = -locThresholdPos;
if (a[id] > locThresholdPos)
@ -3862,40 +3871,6 @@ __global__ void _normalGradForSparseBlock(
lhsValues[index] = rhs[IDX2C(row, col, numRows)];
}
static __inline__ __device__ double atomicAdd(double* address, double val)
{
unsigned long long int* address_as_ull = (unsigned long long int*)address;
unsigned long long int old = *address_as_ull, assumed;
do {
assumed = old;
old = atomicCAS(address_as_ull, assumed, __double_as_longlong(val + __longlong_as_double(assumed)));
} while (assumed != old);
return __longlong_as_double(old);
}
template<class ElemType>
static __inline__ __device__ ElemType logadd(ElemType x, ElemType y)
{
ElemType temp, diff, z;
if (x < y)
{
temp = x; x = y; y = temp;
}
diff = y - x;
if (diff < MINLOGEXP)
{
return (x < LSMALL)?LZERO:x;
}
else
{
z = exp(diff);
return x + log(1.0 + z);
}
}
//This function should be called with 1024 threads per block and 1 block
//THIS IS NOT THE MOST EFFICIENT IMPLEMENTATION!!!
template<class ElemType>
@ -4660,7 +4635,7 @@ __global__ void _rcrfBackwardCompute(
fSum = LZERO;
for (int j = 0; j < iNumLab; j++)
{
fSum = logadd(fSum, alpha[IDX2C(j, t, iNumLab)]);
fSum = logaddk(fSum, alpha[IDX2C(j, t, iNumLab)]);
}
fTmp = alpha[IDX2C(id, t, iNumLab)] - fSum;
@ -4672,10 +4647,10 @@ __global__ void _rcrfBackwardCompute(
fSum = LZERO;
for (int m = 0; m < iNumLab; m++)
{
fSum = logadd(fSum, alpha[IDX2C(m, t, iNumLab)] + pair_scores[IDX2C(j, m, iNumLab)]);
fSum = logaddk(fSum, alpha[IDX2C(m, t, iNumLab)] + pair_scores[IDX2C(j, m, iNumLab)]);
}
fTmp = logadd(fTmp, beta[IDX2C(j, t + 1, iNumLab)] + alpha[IDX2C(id, t, iNumLab)] + pair_scores[IDX2C(j, id, iNumLab)] - fSum);
fTmp = logaddk(fTmp, beta[IDX2C(j, t + 1, iNumLab)] + alpha[IDX2C(id, t, iNumLab)] + pair_scores[IDX2C(j, id, iNumLab)] - fSum);
}
}
@ -4736,7 +4711,7 @@ __global__ void _rcrfBackwardCompute(
{
for (int j = 0; j < iNumLab; j++)
{
fTmp = logadd(fTmp, beta_t1[j] + alpha[id] + pair_scores[j] - zeta[j]);
fTmp = logaddk(fTmp, beta_t1[j] + alpha[id] + pair_scores[j] - zeta[j]);
}
}
@ -4777,9 +4752,9 @@ __global__ void _rcrfBackwardComputeZeta(
for (int m = 0; m < iNumLab; m++)
{
if (t == iNumPos - 1)
fSum = logadd(fSum, alpha[IDX2C(m, 0, iNumLab)]);
fSum = logaddk(fSum, alpha[IDX2C(m, 0, iNumLab)]);
else
fSum = logadd(fSum, alpha[IDX2C(m, 0, iNumLab)] + pair_scores[m]);
fSum = logaddk(fSum, alpha[IDX2C(m, 0, iNumLab)] + pair_scores[m]);
}
gzeta[id] = fSum;
@ -4831,7 +4806,7 @@ __global__ void _rcrfTransGrdComputeZeta(
else
fTmp = alpha[m];
fSum = logadd(fSum, pair_scores[m] + fTmp);
fSum = logaddk(fSum, pair_scores[m] + fTmp);
}
gzeta[id] = fSum;
@ -4934,7 +4909,7 @@ __global__ void _reductionLogAddSum(
{
ElemType lSum = LZERO;
if (tid < s){
lSum = logadd(partialLogAddSum[tid], partialLogAddSum[tid + s]);
lSum = logaddk(partialLogAddSum[tid], partialLogAddSum[tid + s]);
partialLogAddSum[tid] = lSum;
}
}
@ -5059,4 +5034,6 @@ __global__ void _maskColumnsValue(ElemType *a, const char *columnsMask, CUDA_LON
}
}
}}}
#endif // !CPUONLY

10
Source/Math/GPUSparseMatrix.cu
Просмотреть файл

@ -34,11 +34,7 @@ static
#endif
cudaStream_t t_stream;
// support for CudaCall() function template
static const char * CudaErrString(cudaError_t x) { cudaDeviceSynchronize(); return cudaGetErrorString(x); }
static const char * CudaErrString(cublasStatus_t) { cudaDeviceSynchronize(); return "(see cublas_api.h & look for cublasStatus_t or CUBLAS_STATUS_xxx)"; }
static const char * CudaErrString(cusparseStatus_t) { cudaDeviceSynchronize(); return "(see cusparse.h & look for cusparseStatus_t or CUSPARSE_STATUS_xxx)"; }
template<> const char * CudaErrString<cusparseStatus_t>(cusparseStatus_t) { cudaDeviceSynchronize(); return "(see cusparse.h & look for cusparseStatus_t or CUSPARSE_STATUS_xxx)"; }
namespace Microsoft { namespace MSR { namespace CNTK {
@ -2573,7 +2569,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
int blocksPerGrid =(int)ceil(N*1.0/GridDim::maxThreadsPerBlock);
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_inplaceTruncateBottom<ElemType> << <blocksPerGrid, GridDim::maxThreadsPerBlock >> >(NzValues(), threshold, N);
_assignTruncateBottom<ElemType> << <blocksPerGrid, GridDim::maxThreadsPerBlock >> >(NzValues(), NzValues(), threshold, N);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
@ -2617,7 +2613,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
int blocksPerGrid =(int)ceil(N*1.0/GridDim::maxThreadsPerBlock);
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
_inplaceTruncateTop<ElemType> << <blocksPerGrid, GridDim::maxThreadsPerBlock >> >(NzValues(), threshold, N);
_assignTruncateTop<ElemType> << <blocksPerGrid, GridDim::maxThreadsPerBlock >> >(NzValues(), NzValues(), threshold, N);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));

692
Source/Math/GPUTensor.cu Normal file
Просмотреть файл

@ -0,0 +1,692 @@
//
// <copyright file="GPUMatrix.cu" company="Microsoft">
// Copyright (c) Microsoft Corporation. All rights reserved.
// </copyright>
//
#include "stdafx.h"
#include "Basics.h"
#include "BestGpu.h"
//#include "DebugUtil.h"
#ifndef CPUONLY
#include "GPUTensor.h"
#include "GPUMatrix.h"
#include "GPUMatrixCUDAKernels.cuh"
#include "CommonMatrix.h"
#define TENSOR_OPS_DECL __device__ __host__
#include "TensorOps.h"
#include <cuda.h>
#include <cuda_runtime.h>
#include "cublas_v2.h"
#include <assert.h>
#ifndef let
#define let const auto
#endif
#pragma comment (lib, "cudart.lib") // instruct linker to reference these libs
#pragma comment (lib, "cublas.lib")
#pragma warning (disable: 4267) // conversion from 'size_t' to 'unsigned int'; happens in CUDA <<<a,b>>> syntax if a and b are size_t
#pragma warning (disable: 4127) // conditional expression is constant; "if (sizeof(ElemType)==sizeof(float))" triggers this
#pragma warning (disable: 4702) // unreachable code; triggered for unknown reasons
extern bool do_sync;
#ifdef _WIN32
// thread local storage to access the current stream, initalize to default stream
__declspec (thread)
#endif
extern cudaStream_t t_stream;
namespace Microsoft { namespace MSR { namespace CNTK {
// =======================================================================
// TensorView support
// =======================================================================
// To save time, this makes extensive use of templates and macros.
// -----------------------------------------------------------------------
// simple fixed-size arrays for passing dimension information by value
// since CUDA can't just take our std::array and std::vector
// -----------------------------------------------------------------------
template<typename T, size_t N>
struct FixedArray
{
T m_data[N];
__device__ __host__ size_t size() const { return N; }
__device__ __host__ T & operator[](size_t n) { return m_data[n]; }
__device__ __host__ T operator[](size_t n) const { return m_data[n]; }
template<class VEC> FixedArray(const VEC & data) // construct from CPU-side STL array or vector
{
assert(data.size() == N);
for (size_t n = 0; n < N; n++)
{
m_data[n] = (T)data[n];
if (m_data[n] != data[n]) // overflow check
InvalidArgument("FixedArray: Dimensions out of range, too few bits.");
}
}
};
template<typename T> // specialized version for 0 elements
struct FixedArray<T, 0>
{
__device__ __host__ size_t size() const { return 0; }
template<class VEC> FixedArray(const VEC & data) { assert(data.size() == 0); UNUSED(data); }
FixedArray() { }
};
template<typename T, size_t N, size_t K> // N = which input/output; K = index depth
struct FixedMatrix
{
T m_data[N][K];
__device__ __host__ size_t getNumRows() const { return N; }
__device__ __host__ size_t getNumCols() const { return K; }
__device__ __host__ T & operator()(size_t n, size_t k) { return m_data[n][k]; }
__device__ __host__ T operator()(size_t n, size_t k) const { return m_data[n][k]; }
template<typename U> FixedMatrix(const array<SmallVector<U>, N> & data) // construct from CPU-side array of vectors
{
assert(data.size() == N);
for (size_t n = 0; n < N; n++)
{
assert(data[n].size() == K);
for (size_t k = 0; k < K; k++)
{
m_data[n][k] = (T)data[n][k];
if (m_data[n][k] != data[n][k]) // overflow check
InvalidArgument("FixedArray: Dimensions out of range, too few bits.");
}
}
}
};
template<typename T, size_t N> // specialized version for 0 elements
struct FixedMatrix<T, N, 0>
{
__device__ __host__ size_t getNumRows() const { return N; }
__device__ __host__ size_t getNumCols() const { return 0; }
template<typename U> FixedMatrix(const array<SmallVector<U>, N> & data) { assert(data.size() == N); for (size_t n = 0; n < N; n++) assert(data[n].size() == 0); UNUSED(data); }
FixedMatrix() { }
};
// -----------------------------------------------------------------------
// function to actually compute a function of (N-1) inputs based on the opcode
// -----------------------------------------------------------------------
template<class ElemType>
struct TensorOps
{
static __device__ ElemType Compute(const FixedArray<ElemType*, 1> & pointers, ElementWiseOperator op)
{
#define CaseNullaryTensorOp(oper) case ElementWiseOperator::op ## oper: return Op ## oper<ElemType>()
switch (op)
{
ForAllNullaryOps(CaseNullaryTensorOp);
default: return OpConstOne<ElemType>(); // (failure--we only have one nullary op, so use the same, maybe it will eliminate the switch altogether)
}
}
static __device__ ElemType Compute(const FixedArray<ElemType*, 2> & pointers, ElementWiseOperator op)
{
ElemType a = *(pointers[0]);
#define CaseUnaryTensorOp(oper) case ElementWiseOperator::op ## oper: return Op ## oper(a)
switch (op)
{
ForAllUnaryOps(CaseUnaryTensorOp);
default: return 0; // (failure)
}
}
static __device__ ElemType Compute(const FixedArray<ElemType*, 3> & pointers, ElementWiseOperator op)
{
ElemType a = *(pointers[0]);
ElemType b = *(pointers[1]);
#define CaseBinaryTensorOp(oper) case ElementWiseOperator::op ## oper: return Op ## oper(a,b)
switch (op)
{
ForAllBinaryOps(CaseBinaryTensorOp); // note: this costs about 6% compared to having only a single case
default: return 0; // (failure)
}
}
static __device__ ElemType Compute(const FixedArray<ElemType*, 4> & pointers, ElementWiseOperator op)
{
ElemType a = *(pointers[0]);
ElemType b = *(pointers[1]);
ElemType c = *(pointers[2]);
#define CaseTernaryTensorOp(oper) case ElementWiseOperator::op ## oper: return Op ## oper(a,b,c)
switch (op)
{
ForAllTernaryOps(CaseTernaryTensorOp);
default: return 0; // (failure)
}
}
};
// -----------------------------------------------------------------------
// function to compute the value for a given output location (this version performs reduction if needed)
// -----------------------------------------------------------------------
//#define ReduceElemType double
#define ReduceElemType ElemType
template<class ElemType, C_size_t N, C_int M, C_int m>
struct TensorOpReduce
{
// this version for m >= 0
static __device__ ElemType Compute(FixedArray<ElemType*, N> pointers, ElementWiseOperator op,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides)
{
// start with index 0
// We may use 'double' since we are memory-bound anyway.
ReduceElemType aggregate = TensorOpReduce<ElemType, N, M, m - 1>::Compute(pointers, op, reducingOpDims, reducingStrides);
// apply this index to the pointers
C_size_t dim = reducingOpDims[m];
for (C_size_t k = 1/*done with k=0 already*/; k < dim; k++)
{
// bump the pointers
for (C_size_t i = 0; i < N - 1; i++) // N-1 because output is not used here
pointers[i] += reducingStrides(i,(C_size_t)m);
ElemType val = TensorOpReduce<ElemType, N, M, m - 1>::Compute(pointers, op, reducingOpDims, reducingStrides);
aggregate += val;
}
return (ElemType)aggregate;
}
};
// this one terminates the template recursion over reduction dimensions
// The pointers are pointing to the input element.
template<class ElemType, C_size_t N, C_int M>
struct TensorOpReduce<ElemType, N, M, /*m=*/-1>
{
// this version for m = -1
// the pointers are pointing to the right location(s) to take the operation over
static __device__ ElemType Compute(FixedArray<ElemType*, N> pointers, ElementWiseOperator op,
const FixedArray<C_unsigned_int, M> & /*reducingOpDims*/, const FixedMatrix<C_int, N, M> & /*reducingStrides*/)
{
return TensorOps<ElemType>::Compute(pointers, op); // finally computing something!
}
};
// -----------------------------------------------------------------------
// function to compute one constituent of the value for a given output location (this version has reduction done outside)
// -----------------------------------------------------------------------
template<class ElemType, C_size_t N, C_int M, C_int m>
struct TensorOpParallelReduce
{
// this version for m >= 0
static __device__ ElemType Compute(CUDA_LONG id, FixedArray<ElemType*, N> pointers, ElementWiseOperator op,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides)
{
// map id (location on grid) to index[k]
C_size_t stride = 1; // compute the stride. This seems expensive, but since we we only currently support M <= 2, this is just compile-time selection between 1 and reducingOpDims[0].
for (int i = 0; i < m; i++)
stride *= reducingOpDims[(C_size_t)i];
C_size_t index = id / stride; // this dimension. For m=0, the stride is 1 and hence the division will be removed at compile time.
id = id % stride; // remaining dimensions inside this. For m=0 this value is ignored and hence not even computed.
// apply this index to the pointers
for (C_size_t i = 0; i < N - 1; i++)
pointers[i] += index * reducingStrides(i, (C_size_t)m); // now this dimension is taken care of
return TensorOpParallelReduce<ElemType, N, M, m - 1>::Compute(id, pointers, op, reducingOpDims, reducingStrides);
}
};
// this one terminates the template recursion over reduction dimensions
// The pointers are pointing to the input element.
template<class ElemType, C_size_t N, C_int M>
struct TensorOpParallelReduce<ElemType, N, M, /*m=*/-1>
{
// this version for m = -1
// the pointers are pointing to the right location(s) to take the operation over
static __device__ ElemType Compute(CUDA_LONG /*id*/, FixedArray<ElemType*, N> pointers, ElementWiseOperator op,
const FixedArray<C_unsigned_int, M> & /*reducingOpDims*/, const FixedMatrix<C_int, N, M> & /*reducingStrides*/)
{
return TensorOps<ElemType>::Compute(pointers, op); // finally computing something!
}
};
// -----------------------------------------------------------------------
// perform loop over regular index k for N-nary operations (N counting the output)
// -----------------------------------------------------------------------
// The canonical case, vector op without reduction, is this PTX function:
// _ZN9Microsoft3MSR4CNTK15_launchTensorOpIfLi3ELi0ELi1EEEvT_NS1_10FixedArrayIPS3_XT0_EEES3_NS1_19ElementWiseOperatorENS4_IiXT2_EEENS1_11FixedMatrixIiXT0_EXT2_EEENS4_IiXT1_EEENS9_IiXT0_EXT1_EEEi
// float ^ ^ aggregate loop
// args? ^ ^ input dims
// _ZN9Microsoft3MSR4CNTK15_launchTensorOpIfLi2ELi0ELi1EEEvT_NS1_10FixedArrayIPS3_XT0_EEES3_NS1_19ElementWiseOperatorENS4_IiXT2_EEENS1_11FixedMatrixIiXT0_EXT2_EEENS4_IiXT1_EEENS9_IiXT0_EXT1_EEEi
// The 'pointers' only refer to a single element, so we will bump them in-place to perform indexing.
template<class ElemType, C_size_t N, C_int M, C_int K, bool parallelReduce, C_int k>
struct TensorOpElement
{
// template-recursive version loops over indices
static __device__ void Compute(CUDA_LONG id, ElemType beta, FixedArray<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const FixedArray<C_unsigned_int, K> & regularOpStrides, const FixedMatrix<C_int, N, K> & regularStrides,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides,
CUDA_LONG reductionBegin, CUDA_LONG reductionChunkSize)
{
// map id (location on grid) to index[k]
C_size_t stride = regularOpStrides[(C_size_t)k];
C_size_t index = id / stride; // this dimension
id = id % stride; // remaining dimensions inside this
// apply this index to the pointers
for (C_size_t i = 0; i < N; i++)
pointers[i] += index * regularStrides(i,(C_size_t)k); // now this dimension is taken care of
// process the previous index
TensorOpElement<ElemType, N, M, K, parallelReduce, k - 1>::Compute(id, beta, pointers, alpha, op, regularOpStrides, regularStrides, reducingOpDims, reducingStrides, reductionBegin, reductionChunkSize);
}
};
// specialization for k=0 where op stride is guaranteed to be 1
template<class ElemType, C_size_t N, C_int M, C_int K, bool parallelReduce>
struct TensorOpElement<ElemType, N, M, K, parallelReduce, /*k=*/0>
{
// template-recursive version loops over indices
static __device__ void Compute(CUDA_LONG id, ElemType beta, FixedArray<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const FixedArray<C_unsigned_int, K> & regularOpStrides, const FixedMatrix<C_int, N, K> & regularStrides,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides,
CUDA_LONG reductionBegin, CUDA_LONG reductionChunkSize)
{
// map id (location on grid) to index[k]
C_size_t index = id; // this dimension
// apply this index to the pointers
for (C_size_t i = 0; i < N; i++)
pointers[i] += index * regularStrides(i,0); // now this dimension is taken care of
// process the previous index
TensorOpElement<ElemType, N, M, K, parallelReduce, -1>::Compute(/*id*/0, beta, pointers, alpha, op, regularOpStrides, regularStrides, reducingOpDims, reducingStrides, reductionBegin, reductionChunkSize);
}
};
//// apply beta and alpha and save
//template<class ElemType, class PointersType>
//static __device__ void SetFinalValue(ElemType val, ElemType beta, const PointersType & pointers, ElemType alpha)
//{
// // scale
// val *= alpha;
// // combine with previous value in target matrix, then write it out
// auto * pout = pointers[pointers.size() - 1];
// if (beta != 0)
// val += beta * *pout;
// // save
// *pout = val;
//}
// specialization for k = -1 terminates the template recursion, and computes reductions in a for loop
template<class ElemType, C_size_t N, C_int M, C_int K>
struct TensorOpElement<ElemType, N, M, K, /*parallelReduce=*/false, /*k=*/-1>
{
// template-recursion-teminating version computes the actual value for this output location
// now the output pointers point to the right element (input pointers may still iterate for reduction)
static __device__ void Compute(CUDA_LONG /*id*/, ElemType beta, FixedArray<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const FixedArray<C_unsigned_int, K> & /*regularOpStrides*/, const FixedMatrix<C_int, N, K> & /*regularStrides*/,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides, CUDA_LONG /*reductionBegin*/, CUDA_LONG /*reductionChunkSize*/)
{
// compute the operation for this output coordinate
// This may still involve a reduction over inverse-broadcasting dimensions.
ElemType val = TensorOpReduce<ElemType, N, M, M - 1>::Compute(pointers, op, reducingOpDims, reducingStrides);
// scale
val *= alpha;
// combine with previous value in target matrix, then write it out
auto * pout = pointers[pointers.size() - 1];
if (beta != 0)
val += beta * *pout;
// save
*pout = val;
}
};
// specialization for k = -1 terminates the template recursion, and computes reductions in parallel
template<class ElemType, C_size_t N, C_int M, C_int K>
struct TensorOpElement<ElemType, N, M, K, /*parallelReduce=*/true, /*k=*/-1>
{
// template-recursion-teminating version computes the actual value for this output location
// now the output pointers point to the right element (input pointers may still iterate for reduction)
static __device__ void Compute(CUDA_LONG /*id*/, ElemType beta, FixedArray<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const FixedArray<C_unsigned_int, K> & /*regularOpStrides*/, const FixedMatrix<C_int, N, K> & /*regularStrides*/,
const FixedArray<C_unsigned_int, M> & reducingOpDims, const FixedMatrix<C_int, N, M> & reducingStrides, CUDA_LONG reductionBegin, CUDA_LONG reductionChunkSize)
{
CUDA_LONG reductionBlock = blockIdx.z; // block index --larger reductions are split into blocks
CUDA_LONG reductionBlocks = gridDim.z; // number of blocks
CUDA_LONG tid = threadIdx.x; // thread index
CUDA_LONG tids = blockDim.x; // out of how many threads --note: last block is partial
// determine our range --this is a single int mul, we can stomach it (we could alternatively pass in yet another parameter)
CUDA_LONG reductionDim = (CUDA_LONG)reducingOpDims[0];
for (C_size_t i = 1; i < reducingOpDims.size(); i++)
reductionDim *= reducingOpDims[i];
// determine the redId range that we operate on
// Each thread takes a stride tid + (multiples of tids) within this range.
reductionBegin += reductionChunkSize * reductionBlock;
CUDA_LONG reductionEnd = min(reductionBegin + reductionChunkSize, reductionDim);
// compute the operation for this input coordinate
ReduceElemType sum = 0;
for (CUDA_LONG redId = reductionBegin + tid; redId < reductionEnd; redId += tids)
{
auto val = TensorOpParallelReduce<ElemType, N, M, M - 1>::Compute(redId, pointers, op, reducingOpDims, reducingStrides);
sum += val;
}
// reduce --cf https://docs.nvidia.com/cuda/samples/6_Advanced/reduction/doc/reduction.pdf
__shared__ ReduceElemType accumulators[GridDim::maxThreadsPerBlock/*tids*/];
accumulators[tid] = sum;
__syncthreads();
static_assert(GridDim::maxThreadsPerBlock <= 512, "GridDim::maxThreadsPerBlock too large, need to add manually unrolled steps");
for (CUDA_LONG i = 256; i; i >>= 1)
{
if (tid < i && tid + i < tids) accumulators[tid] += accumulators[tid + i];
if (0 + i < tids) __syncthreads(); // sync if condition true for at least one thread
}
// now set final value to output coordinate
if (tid == 0)
{
ElemType val = (ElemType)accumulators[0];
// scale
val *= alpha;
// combine with previous value in target matrix, then write it out
auto * pout = pointers[pointers.size() - 1];
if (reductionBlocks > 1) // multiple blocks: need to use atomicAdd()
{
// in this case, outer calling code must pass beta = 1
val = atomicAdd(pout, val);
}
else
{
if (beta != 0)
val += beta * *pout;
// save
*pout = val;
}
}
}
};
// -----------------------------------------------------------------------
// kernel and launch --no reduction
// -----------------------------------------------------------------------
// launch tensor op with CUDA
template<class ElemType, C_size_t N, C_int M, C_int K>
__global__ void _launchTensorOp(ElemType beta, FixedArray<ElemType*, N> pointers, ElemType alpha, ElementWiseOperator op,
FixedArray<C_unsigned_int, K> regularOpStrides, FixedMatrix<C_int, N, K> regularStrides, CUDA_LONG numElements,
FixedArray<C_unsigned_int, M> reducingOpDims, FixedMatrix<C_int, N, M> reducingStrides)
{
CUDA_LONG id = GridDim::GetLinearThreadId();
if (id < numElements) // note: there are no __syncthread() calls inside
TensorOpElement<ElemType, N, M, K, false, K - 1>::Compute(id, beta, pointers, alpha, op, regularOpStrides, regularStrides, reducingOpDims, reducingStrides, 0, 0);
}
template<class ElemType, C_size_t N, C_int K>
static void LaunchTensorOp(ElemType beta, array<ElemType*, N> pointerVector, ElemType alpha, ElementWiseOperator op,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, N> & regularStrideVectors)
{
// copy all parameters to CUDA-compatible data structures
FixedArray<ElemType*, N> pointers(pointerVector);
SmallVector<C_size_t> regularOpStrideVector; // kernel needs the strides for converting thread index back to multi-dimensional tensor index
C_size_t numElements = 1;
for (C_size_t k = 0; k < regularOpDims.size(); k++)
{
regularOpStrideVector.push_back(numElements);
numElements *= (C_size_t)regularOpDims[k];
}
FixedArray<C_unsigned_int, K> regularOpStrides(regularOpStrideVector);
FixedMatrix<C_int, N, K> regularStrides(regularStrideVectors);
FixedArray<C_unsigned_int, /*M=*/0> reducingOpDims;
FixedMatrix<C_int, N, /*M=*/0> reducingStrides;
// launch the kernel
CUDA_LONG NN = (CUDA_LONG)numElements; // linear space identifying each individual input element
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
GridDim grid(NN);
_launchTensorOp<ElemType, N, /*M=*/0, K> << <grid.m_blocksPerGrid, grid.m_threadsPerBlock, 0, t_stream >> >(beta, pointers, alpha, op, regularOpStrides, regularStrides, grid.m_N, reducingOpDims, reducingStrides);
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
}
// -----------------------------------------------------------------------
// kernel and launch --with reduction
// -----------------------------------------------------------------------
template<class ElemType, C_size_t N, C_int M, C_int K>
__global__ void _launchTensorOpWithReduction(ElemType beta, FixedArray<ElemType*, N> pointers, ElemType alpha, ElementWiseOperator op,
FixedArray<C_unsigned_int, K> regularOpStrides, FixedMatrix<C_int, N, K> regularStrides, CUDA_LONG numElements,
FixedArray<C_unsigned_int, M> reducingOpDims, FixedMatrix<C_int, N, M> reducingStrides, CUDA_LONG reductionBegin, CUDA_LONG reductionChunkSize)
{
CUDA_LONG id = gridDim.x * blockIdx.y + blockIdx.x; // input dimensions are Y dimension of blocks in this case, so we can use thread dim for shared-memory/parallelization
if (id < numElements) // note: we have __syncthread() calls but only entire blocks in sync, so this is OK
TensorOpElement<ElemType, N, M, K, true, K - 1>::Compute(id, beta, pointers, alpha, op, regularOpStrides, regularStrides, reducingOpDims, reducingStrides, reductionBegin, reductionChunkSize);
}
// All dimensions (N-ariness, number of input dimensions K and number of reduction dimensions M) are bound to template parameters now.
template<class ElemType, C_size_t N, C_int M, C_int K>
static void LaunchTensorOpWithReduction(ElemType beta, array<ElemType*, N> pointerVector, ElemType alpha, ElementWiseOperator op,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, N> & regularStrideVectors,
const SmallVector<size_t> & reducingOpDimVector, const array<SmallVector<ptrdiff_t>, N> & reducingStrideVectors)
{
// copy all parameters to CUDA-compatible data structures
FixedArray<ElemType*, N> pointers(pointerVector);
SmallVector<C_size_t> regularOpStrideVector; // kernel needs the strides for converting thread index back to multi-dimensional tensor index
C_size_t numElements = 1;
for (C_size_t k = 0; k < regularOpDims.size(); k++)
{
regularOpStrideVector.push_back(numElements);
numElements *= (C_size_t)regularOpDims[k];
}
FixedArray<C_unsigned_int, K> regularOpStrides(regularOpStrideVector);
FixedMatrix<C_int, N, K> regularStrides(regularStrideVectors);
FixedArray<C_unsigned_int, M> reducingOpDims(reducingOpDimVector);
FixedMatrix<C_int, N, M> reducingStrides(reducingStrideVectors);
// launch the kernel
CUDA_LONG NN = (CUDA_LONG)numElements; // linear space identifying each individual input element
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
// do some optimization for reductions
// Cases:
// - #output elements >= GPU procs --> use one proc per element, do reduction in inner loop
// - reduction dimension fits into a single kernel --> launch it that way
// - reduction dimension requires multiple kernels --> use atomic add, to avoid temp mem alloc
// - PlusNode: reducing to a bias for small matrices
// - ScaleNode: big elementwise product reduced to a scalar (dot product)
// - E.g. 3072 GPU procs:
// If >= 3072 reduced output values must be computed, just loop inside.
// If less, and reduction per value does not fit into a single proc,
// then we break it into procs, say, 24.
// This way we will need 24 atomicAdd()s of 3072/24 = 128 values.
// If reduction is along stride=1, then we'd have 24 atomicAdd()s of 32 coalesced writes.
// Does not sound scary at all.
// Precondition: matrix cannot at the same time participate in reduction and operation.
C_size_t reductionDim = 1; // number of elements to reduce over
for (C_size_t k = 0; k < reducingOpDimVector.size(); k++)
reductionDim *= (C_size_t)reducingOpDimVector[k];
let & props = GridDim::GetDeviceProps();
GridDim grid(NN);
if (reductionDim > 1 && grid.m_blocksPerGrid < props.multiProcessorCount /* && NN == 10 && reductionDim <= GridDim::maxThreadsPerBlock*/)
{
// we are reducing and are underutilizing the multiprocs we have: get more parallelism by doing reduction in parallel
// Change of strategy: All NN elements get their own block. Reduction gets split over blocks as well.
// By how much do we underutilize?
// We increase #blocks by that factor by breaking reduction into that many chunks.
let numReductionChunks = CeilDiv(props.multiProcessorCount, NN);
// NN may be too large for a single dimension
let blockXOverBy = CeilDiv(NN, props.maxGridSize[0]);
let numBlocksX = CeilDiv(NN, blockXOverBy);
let numBlocksY = CeilDiv(NN, numBlocksX);
let numBlocksZ = numReductionChunks;
// Block dim is now:
// - X, Y: such that X*Y covers NN
// - Z: reduction chunks
// reduction goes into thread dim X
let reductionChunkSize = CeilDiv(reductionDim, numReductionChunks);
let numThreadsX = min(reductionChunkSize, GridDim::maxThreadsPerBlock); // any that's over will be done by looping inside the kernel
if (beta == 1 || numBlocksZ == 1)
{
_launchTensorOpWithReduction<ElemType, N, M, K> << <dim3(numBlocksX, numBlocksY, numBlocksZ), numThreadsX, numThreadsX * sizeof(ReduceElemType), t_stream >> >(/*beta=*/1, pointers, alpha, op, regularOpStrides, regularStrides, NN, reducingOpDims, reducingStrides, 0, reductionChunkSize);
}
else
{
// We need more than one chunk, we will use atomicAdd().
// First reset/pre-multiply input; then do the remaining chunks using atomicAdd().
_launchTensorOpWithReduction<ElemType, N, M, K> << <dim3(numBlocksX, numBlocksY, 1), numThreadsX, numThreadsX * sizeof(ReduceElemType), t_stream >> >(beta, pointers, alpha, op, regularOpStrides, regularStrides, NN, reducingOpDims, reducingStrides, 0, reductionChunkSize);
_launchTensorOpWithReduction<ElemType, N, M, K> << <dim3(numBlocksX, numBlocksY, numBlocksZ - 1), numThreadsX, numThreadsX * sizeof(ReduceElemType), t_stream >> >(/*beta=*/1, pointers, alpha, op, regularOpStrides, regularStrides, NN, reducingOpDims, reducingStrides, reductionChunkSize, reductionChunkSize);
}
}
else
{
// we got enough elements to generate: do one element per thread, and reduction inside
_launchTensorOp<ElemType, N, M, K> << <grid.m_blocksPerGrid, grid.m_threadsPerBlock, 0, t_stream >> >(beta, pointers, alpha, op, regularOpStrides, regularStrides, grid.m_N, reducingOpDims, reducingStrides);
}
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
}
// -----------------------------------------------------------------------
// kernel and launch --linear unary
// -----------------------------------------------------------------------
// for linear unary ops, we need to define a functor for every function for use as a template parameter (lambda syntax doesn't work in CUDA 7)
#define DefineUnaryTensorFunctor(oper) \
struct Functor ## oper { template<class ElemType> static __device__ ElemType f(ElemType a) { return Op ## oper(a); } };
ForAllUnaryOps(DefineUnaryTensorFunctor);
// the top-level kernel for linear unary ops
// Note: If we have a beta, we have 2 memory accesses, so this optimization may no longer be needed as we are memory-bound.
template<class ElemType, class FN>
__global__ void _launchUnaryTensorOp(ElemType beta, const ElemType * pa, ElemType * pb, ElemType alpha, CUDA_LONG numElements)
{
CUDA_LONG id = GridDim::GetLinearThreadId();
if (id >= numElements)
return;
ElemType a = pa[id];
ElemType val = FN::f(a);
val *= alpha;
if (beta != 0)
val += beta * pb[id];
pb[id] = val;
}
// version without beta and alpha
template<class ElemType, class FN>
__global__ void _launchUnaryTensorOp(const ElemType * pa, ElemType * pb, CUDA_LONG numElements)
{
CUDA_LONG id = GridDim::GetLinearThreadId();
if (id >= numElements)
return;
ElemType a = pa[id];
ElemType val = FN::f(a);
pb[id] = val;
}
// special case of linear unary operation
template<class ElemType>
void LaunchUnaryTensorOp(ElemType beta, const ElemType * pa, ElemType * pb, ElemType alpha, ElementWiseOperator op, size_t regularOpDim)
{
//////if (op == 1)fprintf(stderr, "LaunchUnaryTensorOp: %d", (int)__LINE__);
CUDA_LONG NN = (CUDA_LONG)regularOpDim;
#define CaseLaunchUnaryTensorOp(oper) case ElementWiseOperator::op ## oper: \
if (beta == 0 && alpha == 1) \
return _launchUnaryTensorOp<ElemType,Functor ## oper> << <grid.m_blocksPerGrid, grid.m_threadsPerBlock, 0, t_stream >> >(pa, pb, NN); \
else \
return _launchUnaryTensorOp<ElemType,Functor ## oper> << <grid.m_blocksPerGrid, grid.m_threadsPerBlock, 0, t_stream >> >(beta, pa, pb, alpha, NN);
cudaEvent_t done = nullptr;
if (do_sync) CUDA_CALL(cudaEventCreate(&done));
GridDim grid(NN);
switch (op)
{
ForAllUnaryOps(CaseLaunchUnaryTensorOp);
default: LogicError("LaunchTensorOp1: Unknown op code %d.", (int)op);
}
if (do_sync) CUDA_CALL(cudaEventRecord(done));
if (do_sync) CUDA_CALL(cudaEventSynchronize(done));
if (do_sync) CUDA_CALL(cudaEventDestroy(done));
}
// -----------------------------------------------------------------------
// map runtime parameters N to template parameters
// -----------------------------------------------------------------------
// tensor operation with k+1 dimensions (-1 means scalar)
template<class ElemType, C_size_t N, C_int K>
static void TensorOpWithRegularLoop(ElemType beta, const array<ElemType*, N> & pointers, ElemType alpha, ElementWiseOperator op,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, N> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, N> & reducingStrides)
{
size_t dims = reducingOpDims.size();
switch (dims)
{
case 2: return LaunchTensorOpWithReduction<ElemType, N, 2, K>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 1: return LaunchTensorOpWithReduction<ElemType, N, 1, K>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 0: return LaunchTensorOp<ElemType, N, K>(beta, pointers, alpha, op, regularOpDims, regularStrides);
default: LogicError("TensorOp: %d non-flattened reduction dimensions are not supported.", (C_int)dims);
}
}
// tensor operation, generalized in number of arguments
// This function now expands into different k. It also eliminates the offsets by adding them to the pointers.
template<class ElemType, C_size_t N>
void TensorOpN(ElemType beta, array<ElemType*, N> pointers, ElemType alpha, ElementWiseOperator op,
const array<size_t, N> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, N> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, N> & reducingStrides)
{
for (C_size_t i = 0; i < N; i++) // N = a small constant, this will be unrolled
pointers[i] += offsets[i];
size_t dims = regularOpDims.size();
switch (dims)
{
case 4: return TensorOpWithRegularLoop<ElemType, N, 4>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 3: return TensorOpWithRegularLoop<ElemType, N, 3>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 2: return TensorOpWithRegularLoop<ElemType, N, 2>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 1: return TensorOpWithRegularLoop<ElemType, N, 1>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
case 0: return TensorOpWithRegularLoop<ElemType, N, 0>(beta, pointers, alpha, op, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
default: LogicError("TensorOp: %d non-flattened input dimensions are not supported.", (C_int)dims);
}
}
//------------------------------------------------------------------------
// explicit instantiations--these are being called from GPUMatrix.cu
//------------------------------------------------------------------------
template void TensorOpN<float, 2>(float beta, array<float*, 2> pointers, float alpha, ElementWiseOperator op,
const array<size_t, 2> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 2> & reducingStrides);
template void TensorOpN<float, 3>(float beta, array<float*, 3> pointers, float alpha, ElementWiseOperator op,
const array<size_t, 3> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 3> & reducingStrides);
template void TensorOpN<float, 4>(float beta, array<float*, 4> pointers, float alpha, ElementWiseOperator op,
const array<size_t, 4> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 4> & reducingStrides);
template void TensorOpN<double, 2>(double beta, array<double*, 2> pointers, double alpha, ElementWiseOperator op,
const array<size_t, 2> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 2> & reducingStrides);
template void TensorOpN<double, 3>(double beta, array<double*, 3> pointers, double alpha, ElementWiseOperator op,
const array<size_t, 3> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 3> & reducingStrides);
template void TensorOpN<double, 4>(double beta, array<double*, 4> pointers, double alpha, ElementWiseOperator op,
const array<size_t, 4> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 4> & reducingStrides);
template void LaunchUnaryTensorOp(float beta, const float * pa, float * pb, float alpha, ElementWiseOperator op, size_t regularOpDim);
template void LaunchUnaryTensorOp(double beta, const double * pa, double * pb, double alpha, ElementWiseOperator op, size_t regularOpDim);
}}}
#endif // CPUONLY

30
Source/Math/GPUTensor.h Normal file
Просмотреть файл

@ -0,0 +1,30 @@
//
// <copyright file="GPUTensor.h" company="Microsoft">
// Copyright (c) Microsoft Corporation. All rights reserved.
// </copyright>
//
#pragma once
#include "CommonMatrix.h"
#include "DataTensor.h" // only for SmallVector; I was hoping to keep this out
#include "GPUMatrixCUDAKernels.cuh"
#include <array>
namespace Microsoft { namespace MSR { namespace CNTK {
// GPUMatrix::TensorOp() interfaces with actual tensor code through these two functions, which are independent of the GPUMatrix class
#define C_size_t CUDA_LONG
#define C_int CUDA_LONG
#define C_unsigned_int CUDA_LONG
template<class ElemType, C_size_t N>
void TensorOpN(ElemType beta, array<ElemType*, N> pointers, ElemType alpha, ElementWiseOperator op,
const array<size_t, N> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, N> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, N> & reducingStrides);
template<class ElemType>
void LaunchUnaryTensorOp(ElemType beta, const ElemType * pa, ElemType * pb, ElemType alpha, ElementWiseOperator op, size_t regularOpDim);
}}}

57
Source/Math/Math.vcxproj.filters
Просмотреть файл

@ -1,9 +1,7 @@
<?xml version="1.0" encoding="utf-8"?>
<Project ToolsVersion="4.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
<ItemGroup>
<ClCompile Include="dllmain.cpp" />
<ClCompile Include="Matrix.cpp" />
<ClCompile Include="stdafx.cpp" />
<ClCompile Include="..\Common\File.cpp">
<Filter>Common</Filter>
</ClCompile>
@ -25,22 +23,31 @@
<ClCompile Include="MatrixQuantizerCPU.cpp">
<Filter>CPU\1bitSGD</Filter>
</ClCompile>
<ClCompile Include="MatrixQuantizer.cpp" />
<ClCompile Include="QuantizedMatrix.cpp" />
<ClCompile Include="CUDAPageLockedMemAllocator.cpp">
<Filter>GPU\1bitSGD</Filter>
</ClCompile>
<ClCompile Include="ConvolutionEngine.cpp" />
<ClCompile Include="TensorView.cpp">
<Filter>Tensors</Filter>
</ClCompile>
<ClCompile Include="dllmain.cpp">
<Filter>Misc</Filter>
</ClCompile>
<ClCompile Include="ConvolutionEngine.cpp">
<Filter>Convolution</Filter>
</ClCompile>
<ClCompile Include="stdafx.cpp">
<Filter>Misc</Filter>
</ClCompile>
<ClCompile Include="QuantizedMatrix.cpp">
<Filter>1bitSGD</Filter>
</ClCompile>
<ClCompile Include="MatrixQuantizer.cpp">
<Filter>1bitSGD</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<ClInclude Include="CommonMatrix.h" />
<ClInclude Include="Helpers.h" />
<ClInclude Include="Matrix.h" />
<ClInclude Include="stdafx.h" />
<ClInclude Include="targetver.h" />
<ClInclude Include="..\Common\Include\File.h">
<Filter>Common\Include</Filter>
</ClInclude>
@ -59,14 +66,10 @@
<ClInclude Include="MatrixQuantizerCPU.h">
<Filter>CPU\1bitSGD</Filter>
</ClInclude>
<ClInclude Include="MatrixQuantizer.h" />
<ClInclude Include="QuantizedMatrix.h" />
<ClInclude Include="MemAllocator.h" />
<ClInclude Include="CUDAPageLockedMemAllocator.h">
<Filter>GPU\1bitSGD</Filter>
</ClInclude>
<ClInclude Include="..\Common\Include\DebugUtil.h" />
<ClInclude Include="ConvolutionEngine.h" />
<ClInclude Include="TensorView.h">
<Filter>Tensors</Filter>
</ClInclude>
@ -76,6 +79,27 @@
<ClInclude Include="..\Common\Include\DataTensor.h">
<Filter>Common\Include</Filter>
</ClInclude>
<ClInclude Include="Helpers.h">
<Filter>Misc</Filter>
</ClInclude>
<ClInclude Include="..\Common\Include\DebugUtil.h">
<Filter>Common\Include</Filter>
</ClInclude>
<ClInclude Include="ConvolutionEngine.h">
<Filter>Convolution</Filter>
</ClInclude>
<ClInclude Include="stdafx.h">
<Filter>Misc</Filter>
</ClInclude>
<ClInclude Include="targetver.h">
<Filter>Misc</Filter>
</ClInclude>
<ClInclude Include="QuantizedMatrix.h">
<Filter>1bitSGD</Filter>
</ClInclude>
<ClInclude Include="MatrixQuantizer.h">
<Filter>1bitSGD</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
<None Include="GPUMatrix.h">
@ -113,5 +137,14 @@
<Filter Include="Tensors">
<UniqueIdentifier>{70fb07cf-603e-4444-bc10-f0add4920fd2}</UniqueIdentifier>
</Filter>
<Filter Include="Misc">
<UniqueIdentifier>{62b92193-92d0-4e5b-8c3e-67ffd01a98c0}</UniqueIdentifier>
</Filter>
<Filter Include="Convolution">
<UniqueIdentifier>{3a49e94d-14ee-4ca1-a56e-a1472206a076}</UniqueIdentifier>
</Filter>
<Filter Include="1bitSGD">
<UniqueIdentifier>{546cacbd-253e-485b-8c8c-8b9ee0e2f631}</UniqueIdentifier>
</Filter>
</ItemGroup>
</Project>

7
Source/Math/MathCUDA.vcxproj
Просмотреть файл

@ -157,7 +157,9 @@ if exist "$(CuDnnDll)" (xcopy /Y "$(CuDnnDll)" $(OutputPath))
<ClInclude Include="cudalatticeops.h" />
<ClInclude Include="cudalib.h" />
<ClInclude Include="CuDnnConvolutionEngine.h" />
<ClInclude Include="GPUTensor.h" />
<ClInclude Include="latticefunctionskernels.h" />
<ClInclude Include="TensorOps.h" />
<ClInclude Include="ValueQuantizer.h" />
<None Include="GPUWatcher.h">
<FileType>CppHeader</FileType>
@ -171,6 +173,9 @@ if exist "$(CuDnnDll)" (xcopy /Y "$(CuDnnDll)" $(OutputPath))
<ClInclude Include="targetver.h" />
</ItemGroup>
<ItemGroup>
<CudaCompile Include="GPUTensor.cu">
<InterleaveSourceInPTX Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</InterleaveSourceInPTX>
</CudaCompile>
<CudaCompile Include="cudalatticeops.cu">
<FileType>CppCode</FileType>
</CudaCompile>
@ -202,7 +207,7 @@ if exist "$(CuDnnDll)" (xcopy /Y "$(CuDnnDll)" $(OutputPath))
<CudaCompile Include="GPUMatrix.cu">
<FileType>CppCode</FileType>
<Keep Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</Keep>
<InterleaveSourceInPTX Condition="'$(Configuration)|$(Platform)'=='Release|x64'">true</InterleaveSourceInPTX>
<InterleaveSourceInPTX Condition="'$(Configuration)|$(Platform)'=='Release|x64'">false</InterleaveSourceInPTX>
</CudaCompile>
<CudaCompile Include="GPUMatrixCUDAKernels.cuh">
<ExcludedFromBuild>true</ExcludedFromBuild>

52
Source/Math/MathCUDA.vcxproj.filters
Просмотреть файл

@ -22,25 +22,28 @@
<CudaCompile Include="GPUMatrixCUDAKernels.cuh">
<Filter>GPU</Filter>
</CudaCompile>
<CudaCompile Include="GPUTensor.cu">
<Filter>GPU\Tensors</Filter>
</CudaCompile>
</ItemGroup>
<ItemGroup>
<ClCompile Include="stdafx.cpp" />
<ClCompile Include="cudalattice.cpp">
<Filter>GPU\SequenceTraining</Filter>
</ClCompile>
<ClCompile Include="cudalib.cpp">
<Filter>GPU\SequenceTraining</Filter>
</ClCompile>
<ClCompile Include="..\Common\DebugUtil.cpp" />
<ClCompile Include="..\Common\DebugUtil.cpp">
<Filter>Misc</Filter>
</ClCompile>
<ClCompile Include="stdafx.cpp">
<Filter>Misc</Filter>
</ClCompile>
<ClCompile Include="CuDnnConvolutionEngine.cpp">
<Filter>GPU</Filter>
<Filter>GPU\Convolution</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
<ClInclude Include="CommonMatrix.h" />
<ClInclude Include="Helpers.h" />
<ClInclude Include="stdafx.h" />
<ClInclude Include="targetver.h" />
<ClInclude Include="..\Common\Include\File.h">
<Filter>Common\Include</Filter>
</ClInclude>
@ -80,8 +83,26 @@
<ClInclude Include="latticefunctionskernels.h">
<Filter>GPU\SequenceTraining</Filter>
</ClInclude>
<ClInclude Include="GPUTensor.h">
<Filter>GPU\Tensors</Filter>
</ClInclude>
<ClInclude Include="Helpers.h">
<Filter>Misc</Filter>
</ClInclude>
<ClInclude Include="stdafx.h">
<Filter>Misc</Filter>
</ClInclude>
<ClInclude Include="targetver.h">
<Filter>Misc</Filter>
</ClInclude>
<ClInclude Include="CommonMatrix.h">
<Filter>from Math</Filter>
</ClInclude>
<ClInclude Include="CuDnnConvolutionEngine.h">
<Filter>GPU</Filter>
<Filter>GPU\Convolution</Filter>
</ClInclude>
<ClInclude Include="TensorOps.h">
<Filter>from Math</Filter>
</ClInclude>
</ItemGroup>
<ItemGroup>
@ -105,14 +126,23 @@
<Filter Include="GPU">
<UniqueIdentifier>{cc9a219d-d8ab-484a-b253-fd2a29ad7c7c}</UniqueIdentifier>
</Filter>
<Filter Include="Include">
<UniqueIdentifier>{3c982109-64b1-469a-8d85-2abdf12d636a}</UniqueIdentifier>
</Filter>
<Filter Include="GPU\1bitSGD">
<UniqueIdentifier>{3415233d-9ef7-41c6-abbb-cec1b4f8d14c}</UniqueIdentifier>
</Filter>
<Filter Include="GPU\SequenceTraining">
<UniqueIdentifier>{6a3569b1-6c9e-47b3-870f-bb581349e75e}</UniqueIdentifier>
</Filter>
<Filter Include="Misc">
<UniqueIdentifier>{3c982109-64b1-469a-8d85-2abdf12d636a}</UniqueIdentifier>
</Filter>
<Filter Include="GPU\Tensors">
<UniqueIdentifier>{16214e65-2d24-4e4c-a0dd-c37e505bda32}</UniqueIdentifier>
</Filter>
<Filter Include="from Math">
<UniqueIdentifier>{b1b59e2e-5c54-4e40-ad0a-1523ddeb63ba}</UniqueIdentifier>
</Filter>
<Filter Include="GPU\Convolution">
<UniqueIdentifier>{3155488f-128f-494e-858d-459b4cc9fab7}</UniqueIdentifier>
</Filter>
</ItemGroup>
</Project>

36
Source/Math/Matrix.cpp
Просмотреть файл

@ -5189,11 +5189,11 @@ namespace Microsoft { namespace MSR { namespace CNTK {
#pragma endregion Static BLAS Functions
template<class ElemType>
void Matrix<ElemType>::TensorOp(ElemType beta, const Matrix<ElemType>& a, ElemType alpha, ElementWiseOperator op,
const array<size_t, 2> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 2> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 2> & reducingStrides)
{
void Matrix<ElemType>::TensorOp(ElemType beta, const Matrix<ElemType>& a, ElemType alpha, ElementWiseOperator op,
const array<size_t, 2> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 2> & reducingStrides)
{
DecideAndMoveToRightDevice(*this, a);
DISPATCH_MATRIX_ON_FLAG(this,
@ -5203,14 +5203,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
NOT_IMPLEMENTED,
NOT_IMPLEMENTED
);
}
}
template<class ElemType>
void Matrix<ElemType>::TensorOp(ElemType beta, const Matrix<ElemType>& a, const Matrix<ElemType>& b, ElemType alpha, ElementWiseOperator op,
const array<size_t, 3> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 3> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 3> & reducingStrides)
{
void Matrix<ElemType>::TensorOp(ElemType beta, const Matrix<ElemType>& a, const Matrix<ElemType>& b, ElemType alpha, ElementWiseOperator op,
const array<size_t, 3> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 3> & reducingStrides)
{
DecideAndMoveToRightDevice(*this, a, b);
DISPATCH_MATRIX_ON_FLAG(this,
@ -5220,14 +5220,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
NOT_IMPLEMENTED,
NOT_IMPLEMENTED
);
}
}
template<class ElemType>
void Matrix<ElemType>::TensorOp(ElemType beta, const Matrix<ElemType>& a, const Matrix<ElemType>& b, const Matrix<ElemType>& c, ElemType alpha, ElementWiseOperator op,
const array<size_t, 4> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 4> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 4> & reducingStrides)
{
void Matrix<ElemType>::TensorOp(ElemType beta, const Matrix<ElemType>& a, const Matrix<ElemType>& b, const Matrix<ElemType>& c, ElemType alpha, ElementWiseOperator op,
const array<size_t, 4> & offsets,
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 4> & reducingStrides)
{
DecideAndMoveToRightDevice(*this, a, b, c);
DISPATCH_MATRIX_ON_FLAG(this,
@ -5237,7 +5237,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
NOT_IMPLEMENTED,
NOT_IMPLEMENTED
);
}
}
template class Matrix<float>;
template class Matrix<double>;

15
Source/Math/Matrix.h
Просмотреть файл

@ -13,8 +13,9 @@
#include "Basics.h"
#include "File.h"
#include "CommonMatrix.h"
#include "DataTensor.h" // only for SmallVector; I was hoping to keep this out
#include <limits.h>
#include <memory> // for shared_ptr
#include <memory> // for shared_ptr
#include <array>
#include <initializer_list>
@ -465,16 +466,16 @@ namespace Microsoft { namespace MSR { namespace CNTK {
void TensorOp(ElemType beta, const Matrix<ElemType>& a, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 2> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 2> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 2> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 2> & reducingStrides);
void TensorOp(ElemType beta, const Matrix<ElemType>& a, const Matrix<ElemType>& b, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 3> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 3> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 3> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 3> & reducingStrides);
void TensorOp(ElemType beta, const Matrix<ElemType>& a, const Matrix<ElemType>& b, const Matrix<ElemType>& c, ElemType alpha, ElementWiseOperator op,
const std::array<size_t, 4> & offsets,
const std::vector<size_t> & regularOpDims, const std::array<std::vector<ptrdiff_t>, 4> & regularStrides,
const std::vector<size_t> & reducingOpDims, const std::array<std::vector<ptrdiff_t>, 4> & reducingStrides);
const SmallVector<size_t> & regularOpDims, const std::array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const std::array<SmallVector<ptrdiff_t>, 4> & reducingStrides);
public:
void Read(File& stream);
void Write(File& stream) const;

13
Source/Math/NoGPU.cpp
Просмотреть файл

@ -13,6 +13,7 @@
#include "GPUSparseMatrix.h"
#include "MatrixQuantizerGPU.h"
#include "CuDnnConvolutionEngine.h"
#include "DataTensor.h"
#pragma warning (disable: 4100) // unreferenced formal parameter, which is OK since all functions in here are dummies; disabling this allows to copy-paste prototypes here when we add new functions
#pragma warning (disable: 4702) // unreachable code, which we get from the NOT_IMPLEMENTED macro which is OK
@ -1066,18 +1067,18 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType>
void GPUMatrix<ElemType>::TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, ElemType alpha, ElementWiseOperator op,
const array<size_t, 2> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 2> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 2> & reducingStrides) { }
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 2> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 2> & reducingStrides) { }
template<class ElemType>
void GPUMatrix<ElemType>::TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, ElemType alpha, ElementWiseOperator op,
const array<size_t, 3> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 3> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 3> & reducingStrides) { }
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 3> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 3> & reducingStrides) { }
template<class ElemType>
void GPUMatrix<ElemType>::TensorOp(ElemType beta, const GPUMatrix<ElemType>& a, const GPUMatrix<ElemType>& b, const GPUMatrix<ElemType>& c, ElemType alpha, ElementWiseOperator op,
const array<size_t, 4> & offsets,
const vector<size_t> & regularOpDims, const array<vector<ptrdiff_t>, 4> & regularStrides,
const vector<size_t> & reducingOpDims, const array<vector<ptrdiff_t>, 4> & reducingStrides) { }
const SmallVector<size_t> & regularOpDims, const array<SmallVector<ptrdiff_t>, 4> & regularStrides,
const SmallVector<size_t> & reducingOpDims, const array<SmallVector<ptrdiff_t>, 4> & reducingStrides) { }
template<class ElemType>
void GPUMatrix<ElemType>::CreateCurandObject(unsigned long seed, const char *caller)

83
Source/Math/TensorOps.h
Просмотреть файл

@ -25,18 +25,22 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// -----------------------------------------------------------------------
// unified overloads for float/double math functions
//
// Declare float and double versions of the functions f we need as f_(),
// e.g. exp_ -> exp(double), expf(float).
// Declare float and double versions of the functions x we need as x_().
// This macro overloads x_() with float and double arguments, and inlines the correct library function,
// e.g. exp_ -> exp(double), expf(float). This simplifies templated kernel code.
// -----------------------------------------------------------------------
#pragma push_macro("OverloadUnaryMathFns")
#define OverloadUnaryMathFns(func) \
DECL float func ## _(float arg) { return func ## f(arg); } \
DECL double func ## _(double arg) { return func(arg); }
#define OverloadUnaryMathFns(x) DECL float x ## _(float f) { return x ## f(f); } DECL double x ## _(double f) { return x(f); }
OverloadUnaryMathFns(exp);
OverloadUnaryMathFns(log);
OverloadUnaryMathFns(tanh);
OverloadUnaryMathFns(sqrt);
OverloadUnaryMathFns(fabs);
OverloadUnaryMathFns(cos);
OverloadUnaryMathFns(sin);
OverloadUnaryMathFns(fabs); OverloadUnaryMathFns(sqrt);
OverloadUnaryMathFns(exp); OverloadUnaryMathFns(log);
OverloadUnaryMathFns(tanh); OverloadUnaryMathFns(cos); OverloadUnaryMathFns(sin);
#pragma push_macro("OverloadUnaryMathFns")
// -----------------------------------------------------------------------
@ -46,13 +50,30 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType>
DECL ElemType Sigmoid(ElemType z)
{
if (z >= 0)
#if 1 // BUGBUG: Numerically bad. But if I don't use this, results change.
ElemType negElem = -z;
ElemType e = exp_(negElem);
return 1 / (e + 1);
#else
#if 1 // Efficient implementation that avoids to divergent CUDA code paths that both compute exp() [jdroppo]. This version compiles to PTX without branches.
ElemType q = exp_(-fabs_(z));
ElemType numer;
if (z > 0) // q = exp(-z)
numer = 1;
else // q = exp(z)
numer = q;
return numer / (1 + q);
#else // Reference code:
if (z > 0)
return 1 / (1 + exp_(-z));
else
{
ElemType v = exp_(z);
return v / (1 + v);
}
#endif
#endif
}
template<class ElemType>
@ -75,7 +96,25 @@ namespace Microsoft { namespace MSR { namespace CNTK {
return sqrt_(z > 0 ? z : 0);
}
// TODO: call this LogAdd() for consistency
template<class ElemType>
DECL ElemType ClippedLog(ElemType z)
{
return z < EPS_IN_LOG ? LOG_OF_EPS_IN_LOG : log_(z);
}
template<class ElemType>
DECL ElemType ClippedQuotient(ElemType a, ElemType b)
{
if (fabs(b) < EPS_IN_INVERSE) // clip the denominator
{
if (b > 0)
b = EPS_IN_INVERSE;
else
b = -EPS_IN_INVERSE;
}
return a / b;
}
template<typename ElemType>
DECL ElemType LogAdd(ElemType x, ElemType y)
{
@ -95,37 +134,49 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
}
template<class ElemType> DECL ElemType Sqr(ElemType z) { return z * z; }
// -----------------------------------------------------------------------
// ElementWiseOperator implementations
//
// Define a static function for every ElementWiseOperator (CommonMatrix.h).
// -----------------------------------------------------------------------
#pragma push_macro("DefNullaryOp")
#define DefNullaryOp(op, expr) template<class ElemType> DECL ElemType Op ## op() { return expr; }
DefNullaryOp(ConstOne, 1);
#pragma pop_macro("DefNullaryOp")
#pragma push_macro("DefUnaryOp")
#define DefUnaryOp(op, expr) template<class ElemType> DECL ElemType Op ## op(ElemType a) { return expr; }
DefUnaryOp(Copy, a);
DefUnaryOp(Negate, -a); DefUnaryOp(Not, !a);
DefUnaryOp(Abs, fabs_(a));
DefUnaryOp(Sigmoid, Sigmoid(a)); DefUnaryOp(SigmoidDerivative, SigmoidDerivative(a)); DefUnaryOp(Tanh, tanh_(a)); DefUnaryOp(Sqrt, Sqrt(a)); DefUnaryOp(Exp, exp_(a)); DefUnaryOp(Log, log_(a)); DefUnaryOp(LinearRectifierDerivative, LinearRectifierDerivative(a)); DefUnaryOp(Cosine, cos_(a)); DefUnaryOp(NegativeSine, -sin_(a));
DefUnaryOp(Sigmoid, Sigmoid(a)); DefUnaryOp(Tanh, tanh_(a)); DefUnaryOp(Sqrt, Sqrt(a)); DefUnaryOp(Exp, exp_(a)); DefUnaryOp(Log, ClippedLog(a)); DefUnaryOp(LinearRectifier, a > 0 ? a : 0); DefUnaryOp(Cosine, cos_(a));
#pragma pop_macro("DefUnaryOp")
// parameterized unary ops
//DefUnaryOp(SaturateBetaAlpha); DefUnaryOp(SumAlpha); DefUnaryOp(SubDifferenceToAlpha); DefUnaryOp(SubDifferenceFromAlpha);
#pragma push_macro("DefBinaryOp")
#define DefBinaryOp(op, expr) template<class ElemType> DECL ElemType Op ## op(ElemType a, ElemType b) { return expr; }
DefBinaryOp(Sum, a + b); DefBinaryOp(Difference, a - b); DefBinaryOp(ElementwiseProduct, a*b); DefBinaryOp(ElementwiseQuotient, a / b);
DefBinaryOp(Sum, a + b); DefBinaryOp(Difference, a - b); DefBinaryOp(ElementwiseProduct, a * b); DefBinaryOp(ElementwiseQuotient, ClippedQuotient(a, b));
DefBinaryOp(LogSum, LogAdd(a, b)); DefBinaryOp(Max, a > b ? a : b); DefBinaryOp(Min, a < b ? a : b);
DefBinaryOp(EQ, a == b); DefBinaryOp(NE, a != b); DefBinaryOp(GT, a > b); DefBinaryOp(LT, a < b); DefBinaryOp(GE, a >= b); DefBinaryOp(LE, a <= b);
DefBinaryOp(And, (float)((!!a) && (!!b))); DefBinaryOp(Or, (float)((!!a) || (!!b))); DefBinaryOp(Xor, (float)((!!a) ^ (!!b)));
DefBinaryOp(MaskNegative, b >= 0 ? a : 0);
DefBinaryOp(ElementwiseProductWithSigmoidDerivative, a * SigmoidDerivative(b));
DefBinaryOp(ElementwiseProductWithTanhDerivative, a * (1 - Sqr(tanh_(b))));
DefBinaryOp(ElementwiseProductWithExp, a * exp_(b));
DefBinaryOp(ElementwiseProductWithLinearRectifierDerivative, b > 0 ? a : 0);
DefBinaryOp(ElementwiseProductWithCosDerivative, a * -sin_(b));
#pragma pop_macro("DefBinaryOp")
#pragma push_macro("DefTernaryOp")
#define DefTernaryOp(op, expr) template<class ElemType> DECL ElemType Op ## op(ElemType a, ElemType b, ElemType c) { return expr; }
DefTernaryOp(Cond, a ? b : c);
DefTernaryOp(Cond, a ? b : c); DefTernaryOp(Clip, a < b ? b : (a > c ? c : a));
#pragma pop_macro("DefTernaryOp")
}}}

128
Source/Math/TensorView.cpp
Просмотреть файл

@ -5,6 +5,14 @@
// </copyright>
//
// TODO:
// - dimension inference in nodes
// - reduction on GPU is highly inefficient; test cases Image/QuickE2E PlusNode::BackpropTo() and ScaleNode::BackpropTo()
// - accuracy deviation in FullUtterance and SequenceTraining
// - TimesNode --needs to specify reduction dimensions
// - ConvolutionNode --needs to specify reduction dimensions
// - some nodes create new "dimensions" such as RowStack. Should that be an actual new tensor dimension?
// This implements the TensorView class, which is a layer around Matrix that reinterprets its content as a generic tensor.
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
@ -59,10 +67,10 @@ namespace Microsoft { namespace MSR { namespace CNTK {
template<class ElemType, size_t N>
static void PrepareTensorOperands(array<TensorShape, N> shapes, array<size_t, N> & offsets,
vector<size_t> & regularOpDims,
array<vector<ptrdiff_t>, N> & regularStrides,
vector<size_t> & reducingOpDims,
array<vector<ptrdiff_t>, N> & reducingStrides)
SmallVector<size_t> & regularOpDims,
array<SmallVector<ptrdiff_t>, N> & regularStrides,
SmallVector<size_t> & reducingOpDims,
array<SmallVector<ptrdiff_t>, N> & reducingStrides)
{
// massage TensorShapes
// Note that TensorShapes here may be shapes are stored or shapes with stride magic applied.
@ -76,12 +84,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
if (dims < shapes[i].GetRank())
dims = shapes[i].GetRank();
for (size_t i = 0; i < N; i++)
shapes[i] = shapes[i].Pad(dims);
if (shapes[i].GetRank() < dims)
shapes[i].PadInPlace(dims);
// all shapes[] now have the same rank
// determine operation shape (max over all dimensions)
vector<size_t> opDims(dims, 0);
SmallVector<size_t> opDims(shapes[0].GetDims());
for (size_t k = 0; k < dims; k++)
for (size_t i = 0; i < N; i++)
for (size_t i = 1; i < N; i++)
opDims[k] = max(opDims[k], shapes[i][k]);
// dimension compatibility check
@ -108,26 +118,31 @@ namespace Microsoft { namespace MSR { namespace CNTK {
}
// these dimensions can be merged
for (size_t i = 0; i < N; i++)
shapes[i] = shapes[i].Flatten(k); // TODO: overdoing the immutable thingy much?
opDims = TensorShape(opDims).Flatten(k).GetDims(); // (ugh)
shapes[i].FlattenInPlace(k); // TODO: overdoing the immutable thingy much?
opDims = TensorShape(opDims).FlattenInPlace(k).GetDims(); // (ugh)
nope:;
}
//fprintf(stderr, "Post-flatten: Op %d: %s op %s -> %s via %s\n", (int)op, string(shapes[0]).c_str(), string(shapes[1]).c_str(), string(shapes[2]).c_str(), string(TensorShape(opDims)).c_str());
// remove singleton dimensions
vector<bool> toDrop(dims, false);
SmallVector<bool> toDrop(dims, false);
bool anyToDrop = false;
for (size_t k = 0; k < dims; k++)
{
for (size_t i = 0; i < N; i++)
if (shapes[i][k] != 1)
goto neither;
toDrop[k] = true; // found an all-singleton dimensions
anyToDrop = true;
neither:;
}
for (size_t i = 0; i < N; i++)
shapes[i] = shapes[i].DropDims(toDrop);
opDims = TensorShape(opDims).DropDims(toDrop).GetDims(); // (ugh)
dims = opDims.size(); // #dims has changed
if (anyToDrop)
{
for (size_t i = 0; i < N; i++)
shapes[i].DropDimsInPlace(toDrop);
opDims = TensorShape(opDims).DropDimsInPlace(toDrop).GetDims(); // (ugh)
dims = opDims.size(); // #dims has changed
}
for (size_t i = 0; i < N; i++)
assert(dims == shapes[i].size());
// note: if op is a scalar, then we end up with 0 dimensions here, which is allowed
@ -136,9 +151,13 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// determine broadcasting; that is, set strides to 0 for 1-dimensions
// To be more precise, we should only set actually broadcasting dimensions to 0.
// But since dimensions that are 1 across all args are eliminated, any 1 must be some form of broadcasting.
// TODO: Do we need to allow other strides at this point in time? If not, broadcasting becomes a bit vector.
for (size_t i = 0; i < N; i++)
shapes[i] = shapes[i].WithBroadcastStrides();
for (size_t i = 0; i < N; i++) // TODO: do we need to test output tensor here as well?
for (size_t k = 0; k < dims; k++)
if (shapes[i][k] < opDims[k])
{
shapes[i].SetBroadcastStrides();
break;
}
//fprintf(stderr, "%s op %s -> %s via %s\n", string(shapes[0]).c_str(), string(shapes[1]).c_str(), string(shapes[2]).c_str(), string(TensorShape(opDims)).c_str());
@ -165,27 +184,54 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// separate out the inverse-broadcasting dimensions
// Any singleton dimension in the result tensor is inverse-broadcasting, because there must be at least one non-1 dimension
// in one of the inputs, otherwise the entire dimension would have been optimized away above.
vector<bool> isReducingDim(dims); // true for each inverse-broadcasting dimension
SmallVector<bool> isReducingDim(dims); // true for each inverse-broadcasting dimension
bool isAnyReducingDim = false;
for (size_t k = 0; k < dims; k++)
isReducingDim[k] = shapes.back()[k] == 1;
{
bool isRed = shapes.back()[k] == 1;
isReducingDim[k] = isRed;
isAnyReducingDim |= isRed;
}
// form the regular (non-inverse-broadcasting) dims
for (size_t i = 0; i < N; i++)
regularStrides[i] = shapes[i].DropDims(isReducingDim).GetStrides();
regularOpDims = TensorShape(opDims).DropDims(isReducingDim).GetDims(); // (ugh)
if (isAnyReducingDim)
{
for (size_t i = 0; i < N; i++)
regularStrides[i] = shapes[i].DropDims(isReducingDim).GetStrides();
regularOpDims = TensorShape(opDims).DropDims(isReducingDim).GetDims(); // (ugh)
// form the inverse-broadcasting dims
vector<bool> isRegularDim(dims); // true for each inverse-broadcasting dimension
for (size_t k = 0; k < dims; k++)
isRegularDim[k] = !isReducingDim[k]; // (no way to do this more nicely?)
for (size_t i = 0; i < N; i++)
reducingStrides[i] = shapes[i].DropDims(isRegularDim).GetStrides();
reducingOpDims = TensorShape(opDims).DropDims(isRegularDim).GetDims(); // (ugh)
// form the inverse-broadcasting dims
SmallVector<bool> isRegularDim(dims); // true for each inverse-broadcasting dimension
for (size_t k = 0; k < dims; k++)
isRegularDim[k] = !isReducingDim[k]; // (no way to do this more nicely?)
for (size_t i = 0; i < N; i++)
reducingStrides[i] = shapes[i].DropDims(isRegularDim).GetStrides();
reducingOpDims = TensorShape(opDims).DropDims(isRegularDim).GetDims(); // (ugh)
}
else // case if no reduction: things are simpler
{
for (size_t i = 0; i < N; i++)
regularStrides[i] = shapes[i].GetStrides();
regularOpDims = opDims;
for (size_t i = 0; i < N; i++)
reducingStrides[i].clear();
reducingOpDims.clear();
}
for (size_t i = 0; i < N; i++)
offsets[i] = shapes[i].GetOffset();
}
// enforce that in case of broadcasting, the output must not be an input
template<class ElemType>
static bool CheckDifferentObject(const TensorView<ElemType> & a, const TensorView<ElemType> & b)
{
if (&a == &b)
LogicError("Do{U,Bi,Ter}naryOpOf: When inverse broadcasting, output must not be an input.");
return true;
}
template<class ElemType>
void TensorView<ElemType>::DoUnaryOpOf(ElemType beta, const TensorView & a, ElemType alpha, ElementWiseOperator op)
{
@ -194,10 +240,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// prepare all tensor descriptor information as needed for execution
array<size_t, 2> offsets;
array<vector<ptrdiff_t>, 2> regularStrides, reducingStrides;
vector<size_t> regularOpDims, reducingOpDims;
array<SmallVector<ptrdiff_t>, 2> regularStrides, reducingStrides;
SmallVector<size_t> regularOpDims, reducingOpDims;
PrepareTensorOperands<ElemType,2>(array<TensorShape, 2> { a.GetShape(), GetShape() }, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
// output cannot be input when reducing
if (reducingOpDims.size() > 0)
CheckDifferentObject(a, *this);
// now perform the operation
GetSOB().TensorOp(beta, a.GetSOB(), alpha, op, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
}
@ -209,10 +259,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
fprintf(stderr, "Tensor Op: Op %d: %s op %s -> %s\n", (int)op, string(a.GetShape()).c_str(), string(b.GetShape()).c_str(), string(GetShape()).c_str());
array<size_t, 3> offsets;
array<vector<ptrdiff_t>, 3> regularStrides, reducingStrides;
vector<size_t> regularOpDims, reducingOpDims;
array<SmallVector<ptrdiff_t>, 3> regularStrides, reducingStrides;
SmallVector<size_t> regularOpDims, reducingOpDims;
PrepareTensorOperands<ElemType, 3>(array<TensorShape, 3> { a.GetShape(), b.GetShape(), GetShape() }, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
// output cannot be input when reducing
if (reducingOpDims.size() > 0)
CheckDifferentObject(a, *this) && CheckDifferentObject(b, *this);
GetSOB().TensorOp(beta, a.GetSOB(), b.GetSOB(), alpha, op, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
}
@ -223,10 +277,14 @@ namespace Microsoft { namespace MSR { namespace CNTK {
fprintf(stderr, "Tensor Op: Op %d: %s, %s, %s -> %s\n", (int)op, string(a.GetShape()).c_str(), string(b.GetShape()).c_str(), string(c.GetShape()).c_str(), string(GetShape()).c_str());
array<size_t, 4> offsets;
array<vector<ptrdiff_t>, 4> regularStrides, reducingStrides;
vector<size_t> regularOpDims, reducingOpDims;
array<SmallVector<ptrdiff_t>, 4> regularStrides, reducingStrides;
SmallVector<size_t> regularOpDims, reducingOpDims;
PrepareTensorOperands<ElemType, 4>(array<TensorShape, 4> { a.GetShape(), b.GetShape(), c.GetShape(), GetShape() }, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
// output cannot be input when reducing
if (reducingOpDims.size() > 0)
CheckDifferentObject(a, *this) && CheckDifferentObject(b, *this) && CheckDifferentObject(c, *this);
GetSOB().TensorOp(beta, a.GetSOB(), b.GetSOB(), c.GetSOB(), alpha, op, offsets, regularOpDims, regularStrides, reducingOpDims, reducingStrides);
}

31
Source/Math/TensorView.h
Просмотреть файл

@ -34,6 +34,8 @@ namespace Microsoft { namespace MSR { namespace CNTK {
TensorView(const Matrix<ElemType> & sob, const TensorShape & shape) :
TensorView(TensorView(sob)/*cast as a TensorView*/, shape/*with a shape*/)
{ }
// empty constructor
TensorView() { }
// copy constructor
TensorView(const TensorView<ElemType> & other) :
m_sob(other.m_sob.AsReference()), m_shape(other.m_shape)
@ -42,43 +44,54 @@ namespace Microsoft { namespace MSR { namespace CNTK {
// -------------------------------------------------------------------
// elementwise operations
// Result goes into 'this', and can optionally be added to the existing value.
// E.g. c.DoSumOf(beta,a,b,alpha) means c := beta * c + alpha * (a + b).
// and c.DoDiffOf(0, c, a, 1) means c -= a.
// E.g. c.DoSumOf(beta,a,b,alpha) means c := beta * c + alpha * (a + b),
// c.AssignDiffOf(c,a) means c -= a,
// and c.AddElementwiseProductOf(a, b, 1) means c += a .* b.
// All operators support elementwise in-place operations, i.e. a, b, and c
// may all reference the same underlying SOB.
// may all reference the same underlying SOB, with onee exception:
// The output cannot be in-place and inverse-broadcasting at the same time.
// E.g. with c=[10] and a=[10 x 20], c.AssignDiffOf(c,a) will fail.
// In that case, you can use c.AddCopyOf(a,-1).
// Aliasing is not detected, so don't pass distinct TensorView objects that
// reference overlapping but not identical slices.
// If beta == 0, c is not read out, i.e. it can be uninitialized or contain NaNs.
// -------------------------------------------------------------------
#pragma push_macro("DeclareUnaryTensorOp")
#define DeclareUnaryTensorOp(oper) \
void Do ## oper ## Of(ElemType beta, const TensorView & a, ElemType alpha) { DoUnaryOpOf(beta, a, alpha, ElementWiseOperator::op ## oper); }
void Do ## oper ## Of(ElemType beta, const TensorView & a, ElemType alpha) { DoUnaryOpOf(beta, a, alpha, ElementWiseOperator::op ## oper); } \
void Assign ## oper ## Of( const TensorView & a, ElemType alpha = 1.0f) { DoUnaryOpOf(0, a, alpha, ElementWiseOperator::op ## oper); } \
void Add ## oper ## Of( const TensorView & a, ElemType alpha = 1.0f) { DoUnaryOpOf(1.0f, a, alpha, ElementWiseOperator::op ## oper); }
ForAllUnaryOps(DeclareUnaryTensorOp);
ForAllParameterizedUnaryOps(DeclareUnaryTensorOp);
#pragma pop_macro("DeclareUnaryTensorOp")
#pragma push_macro("DeclareBinaryTensorOp")
#define DeclareBinaryTensorOp(oper) \
void Do ## oper ## Of(ElemType beta, const TensorView & a, const TensorView & b, ElemType alpha) { DoBinaryOpOf(beta, a, b, alpha, ElementWiseOperator::op ## oper); }
void Do ## oper ## Of(ElemType beta, const TensorView & a, const TensorView & b, ElemType alpha) { DoBinaryOpOf(beta, a, b, alpha, ElementWiseOperator::op ## oper); } \
void Assign ## oper ## Of( const TensorView & a, const TensorView & b, ElemType alpha = 1.0f) { DoBinaryOpOf(0, a, b, alpha, ElementWiseOperator::op ## oper); } \
void Add ## oper ## Of( const TensorView & a, const TensorView & b, ElemType alpha = 1.0f) { DoBinaryOpOf(1.0f, a, b, alpha, ElementWiseOperator::op ## oper); }
ForAllBinaryOps(DeclareBinaryTensorOp);
#pragma pop_macro("DeclareBinaryTensorOp")
#pragma push_macro("DeclareTernaryTensorOp")
#define DeclareTernaryTensorOp(oper) \
void Do ## oper ## Of(ElemType beta, const TensorView & a, const TensorView & b, const TensorView & c, ElemType alpha) { DoTernaryOpOf(beta, a, b, c, alpha, ElementWiseOperator::op ## oper); }
void Do ## oper ## Of(ElemType beta, const TensorView & a, const TensorView & b, const TensorView & c, ElemType alpha) { DoTernaryOpOf(beta, a, b, c, alpha, ElementWiseOperator::op ## oper); } \
void Assign ## oper ## Of( const TensorView & a, const TensorView & b, const TensorView & c, ElemType alpha = 1.0f) { DoTernaryOpOf(0, a, b, c, alpha, ElementWiseOperator::op ## oper); } \
void Add ## oper ## Of( const TensorView & a, const TensorView & b, const TensorView & c, ElemType alpha = 1.0f) { DoTernaryOpOf(1.0f, a, b, c, alpha, ElementWiseOperator::op ## oper); }
ForAllTernaryOps(DeclareTernaryTensorOp);
#pragma pop_macro("DeclareTernaryTensorOp")
static void Test();
private:
void DoUnaryOpOf(ElemType beta, const TensorView & a, ElemType alpha, ElementWiseOperator op);
void DoBinaryOpOf(ElemType beta, const TensorView & a, const TensorView & b, ElemType alpha, ElementWiseOperator op);
void DoTernaryOpOf(ElemType beta, const TensorView & a, const TensorView & b, const TensorView & c, ElemType alpha, ElementWiseOperator op);
private:
// -------------------------------------------------------------------
// accessors
// -------------------------------------------------------------------

2
Source/Math/stdafx.h
Просмотреть файл

@ -12,7 +12,9 @@
#include "targetver.h"
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
// Windows Header Files:
#ifdef _WIN32

4
Source/Readers/DSSMReader/stdafx.h
Просмотреть файл

@ -7,6 +7,10 @@
#include "targetver.h"
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers
// Windows Header Files:
#include <windows.h>

4
Source/Readers/Kaldi2Reader/stdafx.h
Просмотреть файл

@ -10,7 +10,9 @@
#pragma once
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#ifndef __unix__
#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers

4
Source/Readers/KaldiReader/stdafx.h
Просмотреть файл

@ -10,7 +10,9 @@
#pragma once
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#ifndef __unix__
#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers

45
Source/Readers/LMSequenceReader/SequenceReader.cpp
Просмотреть файл

@ -1725,7 +1725,7 @@ size_t BatchSequenceReader<ElemType>::FindNextSentences(size_t numRead)
}
template<class ElemType>
bool BatchSequenceReader<ElemType>::EnsureDataAvailable(size_t /*mbStartSample*/)
bool BatchSequenceReader<ElemType>::EnsureDataAvailable(size_t /*mbStartSample*/, size_t & firstPosInSentence)
{
bool bDataIsThere = true;
@ -1751,6 +1751,7 @@ bool BatchSequenceReader<ElemType>::EnsureDataAvailable(size_t /*mbStartSample*/
Reset();
mNumRead = m_parser.Parse(CACHE_BLOG_SIZE, &m_labelTemp, &m_featureTemp, &seqPos);
firstPosInSentence = mLastPosInSentence;
if (mNumRead == 0) return false;
std::random_shuffle(m_parser.mSentenceIndex2SentenceInfo.begin(), m_parser.mSentenceIndex2SentenceInfo.end());
@ -1760,7 +1761,8 @@ bool BatchSequenceReader<ElemType>::EnsureDataAvailable(size_t /*mbStartSample*/
}
/// add one minibatch
size_t i = mLastPosInSentence;
firstPosInSentence = mLastPosInSentence;
size_t i = mLastPosInSentence;
size_t j = 0;
// exclude the last token since it is the last label to be predicted
for (i = mLastPosInSentence; j < m_mbSize && i < sLn-1; i++ , j++)
@ -1835,7 +1837,8 @@ bool BatchSequenceReader<ElemType>::GetMinibatch(std::map<std::wstring, Matrix<E
if (m_mbSize == 0)
return false;
bool moreData = EnsureDataAvailable(m_mbStartSample);
size_t firstPosInSentence;
bool moreData = EnsureDataAvailable(m_mbStartSample, firstPosInSentence);
if (!moreData)
{
m_pMBLayout->Init(mToProcess.size(), 0);
@ -1857,13 +1860,32 @@ bool BatchSequenceReader<ElemType>::GetMinibatch(std::map<std::wstring, Matrix<E
//loop through all the samples
Matrix<ElemType>& features = *matrices[m_featuresName];
// create MBLayout
size_t nT = actualmbsize / mToProcess.size();
m_pMBLayout->Init(mToProcess.size(), nT);
for (size_t s = 0; s < mToProcess.size(); s++)
{
size_t seq = mToProcess[s];
size_t len = m_parser.mSentenceIndex2SentenceInfo[seq].sLen - 1; // -1 because last one is label
ptrdiff_t begin = -(ptrdiff_t)firstPosInSentence;
ptrdiff_t end = (ptrdiff_t)len - (ptrdiff_t)firstPosInSentence;
if (begin >= (ptrdiff_t)nT)
LogicError("BatchSequenceReader: Sentence begin outside minibatch?");
if (end < 0)
LogicError("BatchSequenceReader: Sentence end outside minibatch?");
m_pMBLayout->AddSequence(NEW_SEQUENCE_ID, s, begin, (size_t)end);
if (begin > 0)
m_pMBLayout->AddGap(s, 0, (size_t)begin);
if (end < (ptrdiff_t)nT)
m_pMBLayout->AddGap(s, end, nT);
}
// copy m_featureData to matrix
// m_featureData is a sparse, already with interleaved parallel sequences. We copy it into a dense matrix.
// we always copy it to cpu first and then convert to gpu if gpu is desired.
DEVICEID_TYPE featureDeviceId = features.GetDeviceId();
features.TransferFromDeviceToDevice(featureDeviceId, CPUDEVICE, false, true, false);
size_t nT = actualmbsize / mToProcess.size();
m_pMBLayout->Init(mToProcess.size(), nT);
if (features.GetMatrixType() == MatrixType::DENSE)
{
features.Resize(labelInfo.dim, actualmbsize);
@ -1878,15 +1900,13 @@ bool BatchSequenceReader<ElemType>::GetMinibatch(std::map<std::wstring, Matrix<E
for (size_t j = 0; j < actualmbsize; ++j) // note: this is a loop over matrix columns, not time steps or parallel sequences
{
// vector of feature data goes into matrix column
size_t idx = (size_t)m_featureData[j];
/// actual time position
size_t timeIdx = (size_t)j / mToProcess.size();
size_t uttIdx = (size_t)fmod(j, mToProcess.size()); // parallel-sequence index
size_t idx = (size_t)m_featureData[j]; // one-hot index of the word, indexed by column (i.e. already interleaved)
features.SetValue(idx, j, (ElemType)1);
SetSentenceBegin(idx, uttIdx, timeIdx);
// actual time position
//size_t timeIdx = (size_t)j / mToProcess.size();
//size_t uttIdx = (size_t)fmod(j, mToProcess.size()); // parallel-sequence index
}
features.TransferFromDeviceToDevice(CPUDEVICE, featureDeviceId, false,false, false);
@ -1992,6 +2012,7 @@ void BatchSequenceReader<ElemType>::SetSentenceSegBatch(vector<size_t> &sentence
template<class ElemType>
bool BatchSequenceReader<ElemType>::DataEnd(EndDataType endDataType)
{
size_t firstPosInSentence;
bool ret = false;
switch (endDataType)
{
@ -2000,7 +2021,7 @@ bool BatchSequenceReader<ElemType>::DataEnd(EndDataType endDataType)
break;
case endDataEpoch:
case endDataSet:
ret = !EnsureDataAvailable(m_mbStartSample);
ret = !EnsureDataAvailable(m_mbStartSample, firstPosInSentence);
break;
case endDataSentence: // for fast reader each minibatch is considered a "sentence", so always true
if (mSentenceEnd)

2
Source/Readers/LMSequenceReader/SequenceReader.h
Просмотреть файл

@ -385,7 +385,7 @@ public:
void StartMinibatchLoop(size_t mbSize, size_t epoch, size_t requestedEpochSamples=requestDataSize);
bool GetMinibatch(std::map<std::wstring, Matrix<ElemType>*>& matrices);
bool EnsureDataAvailable(size_t mbStartSample);
bool EnsureDataAvailable(size_t mbStartSample, size_t & firstPosInSentence);
size_t GetNumParallelSequences();
void SetSentenceSegBatch(std::vector<size_t> &sentenceEnd);

4
Source/Readers/SparsePCReader/stdafx.h
Просмотреть файл

@ -7,6 +7,10 @@
#include "targetver.h"
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#define WIN32_LEAN_AND_MEAN // Exclude rarely-used stuff from Windows headers
// Windows Header Files:
#include <windows.h>

4
Source/Readers/UCIFastReader/stdafx.h
Просмотреть файл

@ -5,8 +5,10 @@
#pragma once
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#include "Platform.h"
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms
#include "targetver.h"
#ifdef __WINDOWS__
#include "windows.h"

10
Source/SGDLib/MultiNetworksEvaluator.h
Просмотреть файл

@ -626,8 +626,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
size_t bSize = best_path.size();
for (int i = 0; i < outputNodes.size(); i++)
{
size_t dim = outputNodes[i]->GetNumRows();
outputNodes[i]->SetDims(dim, bSize);
outputNodes[i]->SetNumCols(bSize);
dynamic_pointer_cast<ComputationNode<ElemType>>(outputNodes[i])->UpdateFunctionValuesSize();
dynamic_pointer_cast<ComputationNode<ElemType>>(outputNodes[i])->Value().SetValue(0);
for (int k = 0; k < bSize; k++)
@ -760,10 +759,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
/// need to set the minibatch size to 1, and initialize evalnet's sentence start information to let it know that this
/// is the begining of sentence
for (auto ptr = featureNodes.begin(); ptr != featureNodes.end(); ptr++)
{
size_t nr = (*ptr)->GetNumRows();
(*ptr)->SetDims(nr, 1);
}
(*ptr)->SetNumCols(1);
// TODO: ^^ this is the same as ResizeAllFeatureNodes() if featureNodes == evalnet.FeatureNodes(). Is it?
//evalnet->SetActualMiniBatchSizeFromFeatures();
@ -780,7 +776,7 @@ namespace Microsoft { namespace MSR { namespace CNTK {
if (itdx > 0)
{
/// state need to be carried over from past time instance
// BUGBUG: I commented this out because these flags no longer exist. This code is no longer functional.
// BUGBUG: I commented this out because these flags no longer exist. This code is no longer functional. [fseide]
//evalnet->GetMBLayoutPtr()->GetM().SetValue(((int) MinibatchPackingFlags::None));
}

4
Source/SGDLib/stdafx.h
Просмотреть файл

@ -11,7 +11,9 @@
#pragma once
#ifdef _WIN32
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#include "targetver.h"
#endif

4
Source/SequenceTrainingLib/latticeforwardbackward.cpp
Просмотреть файл

@ -2,6 +2,10 @@
//
// F. Seide, V-hansu
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#include "Basics.h"
#include "simple_checked_arrays.h"
#include "latticearchive.h"

2
Tests/EndToEndTests/Image/QuickE2E/Convolution.ndl
Просмотреть файл

@ -6,7 +6,7 @@ ndlMnistMacros = [
ImageH = 28
LabelDim = 10
features = ImageInput(ImageW, ImageH, 1, tag="feature")
features = ImageInput(ImageW, ImageH, 1, imageLayout="HWC", tag="feature")
featScale = Const(0.00390625)
featScaled = Scale(featScale, features)
labels = Input(LabelDim, tag="label")

3
Tests/EndToEndTests/Image/QuickE2E/Macros.ndl
Просмотреть файл

@ -1,3 +1,4 @@
# Sigmoid non-linearity
DNNSigmoidLayer(inDim, outDim, x, parmScale) = [
W = Parameter(outDim, inDim, init="uniform", initValueScale=parmScale)
b = Parameter(outDim, 1, init="uniform", initValueScale=parmScale)
@ -6,6 +7,7 @@ DNNSigmoidLayer(inDim, outDim, x, parmScale) = [
y = Sigmoid(z)
]
# no non-linearity, as input for SoftMax
DNNLayer(inDim, outDim, x, parmScale) = [
W = Parameter(outDim, inDim, init="uniform", initValueScale=parmScale)
b = Parameter(outDim, 1, init="uniform", initValueScale=parmScale)
@ -13,6 +15,7 @@ DNNLayer(inDim, outDim, x, parmScale) = [
z = Plus(t, b)
]
# ReLU non-linearity
ConvReLULayer(inp, outMap, inWCount, kW, kH, hStride, vStride, wScale, bValue) = [
convW = Parameter(outMap, inWCount, init="uniform", initValueScale=wScale)
conv = Convolution(convW, inp, kW, kH, outMap, hStride, vStride, zeroPadding=false)

93
Tests/EndToEndTests/Image/QuickE2E/cntk.config
Просмотреть файл

@ -1,7 +1,10 @@
#precision = "double"
precision = "float"
command = train:test
deviceId = $DeviceId$
useCuDnn = true # can be overridden by the command line
ndlMacros = "$ConfigDir$/Macros.ndl"
parallelTrain = false
@ -13,8 +16,94 @@ train = [
#deviceId = $DeviceId$
traceLevel = 1
NDLNetworkBuilder = [
networkDescription = "$ConfigDir$/Convolution.ndl"
#NDLNetworkBuilder = [
# networkDescription = "$ConfigDir$/Convolution.ndl"
#]
BrainScriptNetworkBuilder = [
useCuDnn = $useCuDnn$
// HACK to enforce same evaluation order or LearnableParameters as for NDL, as to get same radomization
// Nodes are evaluated in sorting order.
A1 = conv1_act; A2 = conv2_act; A3 = h1 ; A5 = ol
// macros
ConvReLULayer(inp, outMap, inWCount, kW, kH, hStride, vStride, wScale, bValue) = [ // ReLU non-linearity
convW = Parameter(outMap, inWCount, init="uniform", initValueScale=wScale, initOnCPUOnly=false)
conv = Convolution(convW, inp, kW, kH, outMap, hStride, vStride, zeroPadding=false, imageLayout=if useCuDnn then "cudnn" else "legacy")
convB = if useCuDnn
then ParameterTensor((1 : 1 : outMap : 1/*col dim*/), init="fixedValue", value=bValue)
else Parameter(outMap, 1, init="fixedValue", value=bValue)
convPlusB = Plus(conv, convB);
out = RectifiedLinear(convPlusB);
]
DNNSigmoidLayer(inDim, outDim, x, parmScale) = [ // Sigmoid non-linearity
W = Parameter(outDim, inDim, init="uniform", initValueScale=parmScale, initOnCPUOnly=false)
b = Parameter(outDim, 1, init="uniform", initValueScale=parmScale, initOnCPUOnly=false)
t = Times(W, x)
z = Plus(t, b)
out = Sigmoid(z)
]
DNNLayer(inDim, outDim, x, parmScale) = [ //no non-linearity, as input for SoftMax
W = Parameter(outDim, inDim, init="uniform", initValueScale=parmScale, initOnCPUOnly=false)
b = Parameter(outDim, 1, init="uniform", initValueScale=parmScale, initOnCPUOnly=false)
t = Times(W, x)
out = Plus(t, b)
]
imageW = 28
imageH = 28
labelDim = 10
features = ImageInput(imageW, imageH, 1, imageLayout=if useCuDnn then "cudnn" else "legacy", tag="feature")
featScale = Constant(0.00390625)
featScaled = Scale(featScale, features)
labels = Input(labelDim, tag="label")
# conv1
kW1 = 5
kH1 = 5
cMap1 = 16
hStride1 = 1
vStride1 = 1
# weight[cMap1, kW1 * kH1 * inputChannels]
conv1_act = ConvReLULayer(featScaled, cMap1, 25, kW1, kH1, hStride1, vStride1, 10, 1).out
# pool1
pool1W = 2
pool1H = 2
pool1hStride = 2
pool1vStride = 2
pool1 = MaxPooling(conv1_act, pool1W, pool1H, pool1hStride, pool1vStride, imageLayout=if useCuDnn then "cudnn" else "legacy")
# conv2
kW2 = 5
kH2 = 5
cMap2 = 32
hStride2 = 1
vStride2 = 1
# weight[cMap2, kW2 * kH2 * cMap1]
# ConvReLULayer is defined in Macros.ndl
conv2_act = ConvReLULayer(pool1, cMap2, 400, kW2, kH2, hStride2, vStride2, 10, 1).out
# pool2
pool2W = 2
pool2H = 2
pool2hStride = 2
pool2vStride = 2
pool2 = AveragePooling(conv2_act, pool2W, pool2H, pool2hStride, pool2vStride, imageLayout=if useCuDnn then "cudnn" else "legacy")
h1Dim = 128
# DNNSigmoidLayer and DNNLayer are defined in Macros.ndl
h1 = DNNSigmoidLayer(512, h1Dim, pool2, 1).out
ol = DNNLayer(h1Dim, labelDim, h1, 1).out
ce = CrossEntropyWithSoftmax(labels, ol, tag="criterion")
err = ErrorPrediction(labels, ol, tag="eval")
outputNodes = ol
]
SGD = [

4
Tests/EndToEndTests/Speech/LSTM/cntk.config
Просмотреть файл

@ -95,8 +95,8 @@ speechTrain = [
numLSTMs = 3 // number of hidden LSTM model layers
// features
features = Input(featDim, 1, tag='feature')
labels = Input(labelDim, 1, tag='label')
features = Input(featDim, tag='feature')
labels = Input(labelDim, tag='label')
feashift = RowSlice(featDim - baseFeatDim, baseFeatDim, features); # shift 5 frames right (x_{t+5} -> x_{t} ) // TODO why 5? Where do I see this?
featNorm = MeanVarNorm(feashift)

5
Tests/EndToEndTests/Speech/README_Windows_Debug_commands.txt
Просмотреть файл

@ -27,6 +27,8 @@ Using parallel sequences (difference to above: nbruttsineachrecurrentiter=4). No
COMMAND: currentDirectory=$(SolutionDir)Tests\EndToEndTests\Speech\Data configFile=$(SolutionDir)Tests\EndToEndTests\Speech\LSTM\cntk.config stderr=$(SolutionDir)Tests\EndToEndTests\Speech\RunDir\LSTM\FullUtterance\models\cntkSpeech.dnn.log RunDir=$(SolutionDir)Tests\EndToEndTests\Speech\RunDir\LSTM\FullUtterance NdlDir=$(SolutionDir)Tests\EndToEndTests\Speech\LSTM DataDir=. DeviceId=auto Truncated=false speechTrain=[reader=[nbruttsineachrecurrentiter=4]] speechTrain=[SGD=[epochSize=2560]] speechTrain=[SGD=[learningRatesPerMB=0.125]] speechTrain=[SGD=[maxEpochs=2]] speechTrain=[SGD=[numMBsToShowResult=1]] makeMode=false
Linux: bin/cntk currentDirectory=Tests/EndToEndTests/Speech/Data configFile=../LSTM/cntk.config stderr=../RunDir/LSTM/Truncated/models/cntkSpeech.dnn.log RunDir=../RunDir/LSTM/Truncated NdlDir=../LSTM DataDir=. DeviceId=auto Truncated=false 'speechTrain=[reader=[nbruttsineachrecurrentiter=4]]' 'speechTrain=[SGD=[epochSize=2560]]' 'speechTrain=[SGD=[learningRatesPerMB=0.125]]' 'speechTrain=[SGD=[maxEpochs=2]]' 'speechTrain=[SGD=[numMBsToShowResult=1]]' makeMode=false
Using full BrainScript configuration
COMMAND: --cd $(SolutionDir)Tests\EndToEndTests\Speech\Data -f $(SolutionDir)Tests\EndToEndTests\Speech\LSTM\lstm.bs -D stderr='$(SolutionDir)Tests\EndToEndTests\Speech\RunDir\LSTM\FullUtterance\models\cntkSpeech.dnn.log' -D RunDir='$(SolutionDir)Tests\EndToEndTests\Speech\RunDir\LSTM\FullUtterance' -D NdlDir='$(SolutionDir)Tests\EndToEndTests\Speech\LSTM' -D DataDir='.' -D DeviceId='Auto' -D Truncated=false -D speechTrain=[reader=[nbruttsineachrecurrentiter=1];SGD=[epochSize=2560;maxEpochs=2;numMBsToShowResult=1]] -D makeMode=false
@ -37,7 +39,6 @@ COMMAND: currentDirectory=$(SolutionDir)Tests\EndToEndTests\Speech\Data con
--- Speech\SequenceTraining:
set CNTK_EXTERNAL_TESTDATA_SOURCE_DIRECTORY=\\storage.ccp.philly.selfhost.corp.microsoft.com\public\CNTKTestData
COMMAND: currentDirectory=\\storage.ccp.philly.selfhost.corp.microsoft.com\public\CNTKTestData configFile=$(SolutionDir)Tests\EndToEndTests\Speech\DNN\SequenceTraining\cntk_sequence.config RunDir=$(SolutionDir)Tests\EndToEndTests\Speech\RunDir\DNN\SequenceTraining DataDir=. ConfigDir=$(SolutionDir)Tests\EndToEndTests\Speech\DNN\SequenceTraining DeviceId=0
@ -47,7 +48,7 @@ COMMAND: currentDirectory=$(SolutionDir)ExampleSetups\Image\MNIST configFil
--- Image/QuickE2E:
COMMAND: configFile=$(SolutionDir)Tests\EndToEndTests\Image\QuickE2E\cntk.config RunDir=$(SolutionDir)Tests\EndToEndTests\Image\_run DataDir=$(SolutionDir)Tests\EndToEndTests\Image\Data ConfigDir=$(SolutionDir)Tests\EndToEndTests\Image\QuickE2E stderr=$(SolutionDir)Tests\EndToEndTests\RunDir\Image\QuickE2E\models\cntkImage.dnn.log DeviceId=-1 makeMode=false
COMMAND: configFile=$(SolutionDir)Tests\EndToEndTests\Image\QuickE2E\cntk.config RunDir=$(SolutionDir)Tests\EndToEndTests\Image\_run DataDir=$(SolutionDir)Tests\EndToEndTests\Image\Data ConfigDir=$(SolutionDir)Tests\EndToEndTests\Image\QuickE2E stderr=$(SolutionDir)Tests\EndToEndTests\RunDir\Image\QuickE2E\models\cntkImage.dnn.log DeviceId=0 useCuDnn=false makeMode=false
Simple test
-----------

33
Tests/UnitTests/MathTests/ConvolutionEngineTests.cpp
Просмотреть файл

@ -24,14 +24,18 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
static bool IsCuDnnSupported()
{
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
try
{
return ConvFact::Create(0, ConvFact::EngineType::CuDnn) != nullptr;
// TODO: Will this ever return nullptr?
return ConvFact::Create(0, ConvFact::EngineType::CuDnn, ImageLayoutKind::CHW) != nullptr;
}
catch (std::runtime_error)
{
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
return false;
}
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
}
BOOST_AUTO_TEST_SUITE(ConvolutionSuite)
@ -55,7 +59,8 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
for (int deviceId : { 0 })
{
auto fact = ConvFact::Create(deviceId);
// BUGBUG: These will fail depending on whether we built with cuDNN or not. Without cuDNN we should use HWC
auto fact = ConvFact::Create(deviceId, ConvFact::EngineType::Auto, ImageLayoutKind::CHW);
auto tt = typeid(fact).name();
UNUSED(tt);
auto eng = fact->CreateConvEngine(deviceId, 0);
@ -128,14 +133,22 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
for (int deviceId : { -1, 0 })
{
auto fact = ConvFact::Create(deviceId);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
auto fact = ConvFact::Create(deviceId, ConvFact::EngineType::Auto, deviceId >= 0 ? ImageLayoutKind::CHW : ImageLayoutKind::HWC);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
auto eng = fact->CreateConvEngine(deviceId, 0);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
auto inT = fact->CreateTensor(inW, inH, cmapIn, n);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
auto filtT = fact->CreateFilter(kW, kH, cmapIn, cmapOut);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
auto outT = fact->CreateTensor(outW, outH, cmapOut, n);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
auto convT = fact->CreateConvDescriptor(*inT, *filtT, sW, sH, pad);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
// Input in NCHW format.
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
SingleMatrix in(inW * inH * cmapIn, n, vec(inW * inH * cmapIn * n, 1.0f).data(), matrixFlagNormal, deviceId);
// Create cmapOut filters, each kW x kH x cmapIn (NCHW format).
SingleMatrix filt(cmapOut, kW * kH * cmapIn, vec(kW * kH * cmapIn * cmapOut, 1.0f).data(), matrixFlagNormal, deviceId);
@ -143,7 +156,9 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
SingleMatrix out(outW * outH * cmapOut, n, deviceId);
SingleMatrix temp(deviceId);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
eng->Forward(*inT, in, *filtT, filt, *convT, *outT, out, temp);
fprintf(stderr, "ConvolutionEngineTests.cpp %d\n", __LINE__);
// Output is in NCHW format.
float expBuf[] = {
@ -175,7 +190,7 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
for (int deviceId : { 0 })
{
auto fact = ConvFact::Create(deviceId);
auto fact = ConvFact::Create(deviceId, ConvFact::EngineType::Auto, ImageLayoutKind::CHW);
auto eng = fact->CreateConvEngine(deviceId, 0);
auto srcGradT = fact->CreateTensor(outW, outH, cmapOut, n);
auto filtT = fact->CreateFilter(kW, kH, cmapIn, cmapOut);
@ -231,7 +246,7 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
for (int deviceId : { 0 })
{
auto fact = ConvFact::Create(deviceId);
auto fact = ConvFact::Create(deviceId, ConvFact::EngineType::Auto, ImageLayoutKind::CHW);
auto eng = fact->CreateConvEngine(deviceId, 0);
auto srcGradT = fact->CreateTensor(outW, outH, cmapOut, n);
auto filtT = fact->CreateFilter(kW, kH, cmapIn, cmapOut);
@ -296,7 +311,7 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
for (int deviceId : { 0 })
{
auto fact = ConvFact::Create(deviceId);
auto fact = ConvFact::Create(deviceId, ConvFact::EngineType::Auto, ImageLayoutKind::CHW);
auto eng = fact->CreatePoolEngine(deviceId);
auto inT = fact->CreateTensor(inW, inH, cmap, n);
auto outT = fact->CreateTensor(outW, outH, cmap, n);
@ -346,7 +361,7 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
for (int deviceId : { 0 })
{
auto fact = ConvFact::Create(deviceId);
auto fact = ConvFact::Create(deviceId, ConvFact::EngineType::Auto, ImageLayoutKind::CHW);
auto eng = fact->CreatePoolEngine(deviceId);
auto inT = fact->CreateTensor(inW, inH, cmap, n);
auto outT = fact->CreateTensor(outW, outH, cmap, n);
@ -406,7 +421,7 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
for (int deviceId : { 0 })
{
auto fact = ConvFact::Create(deviceId);
auto fact = ConvFact::Create(deviceId, ConvFact::EngineType::Auto, ImageLayoutKind::CHW);
auto eng = fact->CreatePoolEngine(deviceId);
auto inT = fact->CreateTensor(inW, inH, cmap, n);
auto outT = fact->CreateTensor(outW, outH, cmap, n);
@ -456,7 +471,7 @@ namespace Microsoft { namespace MSR { namespace CNTK { namespace Test
for (int deviceId : { 0 })
{
auto fact = ConvFact::Create(deviceId);
auto fact = ConvFact::Create(deviceId, ConvFact::EngineType::Auto, ImageLayoutKind::CHW);
auto eng = fact->CreatePoolEngine(deviceId);
auto inT = fact->CreateTensor(inW, inH, cmap, n);
auto outT = fact->CreateTensor(outW, outH, cmap, n);

4
Tests/UnitTests/MathTests/stdafx.h
Просмотреть файл

@ -8,7 +8,9 @@
#pragma once
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms
#ifndef _CRT_SECURE_NO_WARNINGS
#define _CRT_SECURE_NO_WARNINGS // "secure" CRT not available on all platforms --add this at the top of all CPP files that give "function or variable may be unsafe" warnings
#endif
#define _SCL_SECURE_NO_WARNINGS // current API of matrix does not allow safe invokations. TODO: change api to proper one.
#include "targetver.h"