DirectXShaderCompiler/lib/CodeGen/StackMapLivenessAnalysis.cpp

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2016-12-28 22:52:27 +03:00
//===-- StackMapLivenessAnalysis.cpp - StackMap live Out Analysis ----------===//
Revert license text in banner comments to original llvm verbage (#33) Fix #30: Revert license text in banner comments to original llvm verbage This commit removes the Microsoft-specific copyright in llvm files and reverts the copyright wording to the original llvm wording. We used the following method to find the files to change: 1. Find all files in DirectXShaderCompiler that are also in llvm 3.7 2. For those files that have the Microsoft-specific copyright, revert it to the original llvm copyright as present in llvm 3.7 3. Revert the copyright in a few files that are not in llvm, but are mostly copies of files in llvm: lib\Transforms\Scalar\ScalarReplAggregatesHLSL.cpp lib\Transforms\Scalar\Reg2MemHLSL.cpp Leave the Microsoft-specific copyright header in files not present in stock llvm: include\dxc\* lib\HLSL\* lib\DxcSupport\* tools\clang\test\HLSL\* tools\clang\test\CodeGenHLSL\* tools\clang\unittests\HLSL\* tools\clang\unittests\HLSLHost\* tools\clang\tools\dxcompiler\* tools\clang\tools\dxa\* tools\clang\tools\dxc\* tools\clang\tools\dxopt\* tools\clang\tools\dxr\* tools\clang\tools\dxv\* tools\clang\tools\dotnetc\* utils\hct\* CONTRIBUTING.md COPYRIGHT LICENSE-MIT README.md cmake\modules\FindD3D12.cmake cmake\modules\FindDiaSDK.cmake cmake\modules\FindTAEF.cmake docs\DXIL.rst docs\HLSLChanges.rst docs\_themes\dxc-theme\layout.html docs\_themes\dxc-theme\theme.conf docs\_themes\dxc-theme\static\dxc-theme.css include\llvm\llvm_assert\assert.h include\llvm\llvm_assert\cassert include\llvm\Support\MSFileSystem.h include\llvm\Support\OacrIgnoreCond.h lib\MSSupport\CMakeLists.txt lib\MSSupport\MSFileSystemImpl.cpp lib\Support\assert.cpp lib\Support\MSFileSystemBasic.cpp lib\Support\Windows\MSFileSystem.inc.cpp lib\Transforms\Scalar\Reg2MemHLSL.cpp lib\Transforms\Scalar\ScalarReplAggregatesHLSL.cpp tools\clang\docs\UsingDxc.rst tools\clang\include\clang\AST\HlslTypes.h tools\clang\include\clang\Basic\BuiltinsDXIL.def tools\clang\include\clang\Basic\LangOptions.fixed.def tools\clang\include\clang\Parse\ParseHLSL.h tools\clang\include\clang\Sema\SemaHLSL.h tools\clang\lib\AST\ASTContextHLSL.cpp tools\clang\lib\AST\HlslTypes.cpp tools\clang\lib\CodeGen\CGHLSLMS.cpp tools\clang\lib\CodeGen\CGHLSLRuntime.cpp tools\clang\lib\CodeGen\CGHLSLRuntime.h tools\clang\lib\Frontend\Rewrite\FrontendActions_rewrite.cpp tools\clang\lib\Parse\HLSLRootSignature.cpp tools\clang\lib\Parse\HLSLRootSignature.h tools\clang\lib\Parse\ParseHLSL.cpp tools\clang\lib\Sema\gen_intrin_main_tables_15.h tools\clang\lib\Sema\SemaHLSL.cpp tools\clang\tools\d3dcomp\CMakeLists.txt tools\clang\tools\d3dcomp\d3dcomp.cpp tools\clang\tools\d3dcomp\d3dcomp.def tools\clang\tools\libclang\dxcisenseimpl.cpp tools\clang\tools\libclang\dxcisenseimpl.h tools\clang\tools\libclang\dxcrewriteunused.cpp tools\clang\tools\libclang\libclang.rc tools\dxexp\CMakeLists.txt tools\dxexp\dxexp.cpp tools\dxexp\LLVMBuild.txt
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//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file implements the StackMap Liveness analysis pass. The pass calculates
// the liveness for each basic block in a function and attaches the register
// live-out information to a stackmap or patchpoint intrinsic if present.
//
//===----------------------------------------------------------------------===//
2016-12-28 22:52:27 +03:00
#include "llvm/ADT/Statistic.h"
#include "llvm/CodeGen/LivePhysRegs.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionAnalysis.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/Passes.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetSubtargetInfo.h"
using namespace llvm;
#define DEBUG_TYPE "stackmaps"
static cl::opt<bool> EnablePatchPointLiveness(
"enable-patchpoint-liveness", cl::Hidden, cl::init(true),
cl::desc("Enable PatchPoint Liveness Analysis Pass"));
STATISTIC(NumStackMapFuncVisited, "Number of functions visited");
STATISTIC(NumStackMapFuncSkipped, "Number of functions skipped");
STATISTIC(NumBBsVisited, "Number of basic blocks visited");
STATISTIC(NumBBsHaveNoStackmap, "Number of basic blocks with no stackmap");
STATISTIC(NumStackMaps, "Number of StackMaps visited");
namespace {
/// \brief This pass calculates the liveness information for each basic block in
/// a function and attaches the register live-out information to a patchpoint
/// intrinsic if present.
///
/// This pass can be disabled via the -enable-patchpoint-liveness=false flag.
/// The pass skips functions that don't have any patchpoint intrinsics. The
/// information provided by this pass is optional and not required by the
/// aformentioned intrinsic to function.
class StackMapLiveness : public MachineFunctionPass {
const TargetRegisterInfo *TRI;
LivePhysRegs LiveRegs;
public:
static char ID;
/// \brief Default construct and initialize the pass.
StackMapLiveness();
/// \brief Tell the pass manager which passes we depend on and what
/// information we preserve.
void getAnalysisUsage(AnalysisUsage &AU) const override;
/// \brief Calculate the liveness information for the given machine function.
bool runOnMachineFunction(MachineFunction &MF) override;
private:
/// \brief Performs the actual liveness calculation for the function.
bool calculateLiveness(MachineFunction &MF);
/// \brief Add the current register live set to the instruction.
void addLiveOutSetToMI(MachineFunction &MF, MachineInstr &MI);
/// \brief Create a register mask and initialize it with the registers from
/// the register live set.
uint32_t *createRegisterMask(MachineFunction &MF) const;
};
} // namespace
char StackMapLiveness::ID = 0;
char &llvm::StackMapLivenessID = StackMapLiveness::ID;
INITIALIZE_PASS(StackMapLiveness, "stackmap-liveness",
"StackMap Liveness Analysis", false, false)
/// Default construct and initialize the pass.
StackMapLiveness::StackMapLiveness() : MachineFunctionPass(ID) {
initializeStackMapLivenessPass(*PassRegistry::getPassRegistry());
}
/// Tell the pass manager which passes we depend on and what information we
/// preserve.
void StackMapLiveness::getAnalysisUsage(AnalysisUsage &AU) const {
// We preserve all information.
AU.setPreservesAll();
AU.setPreservesCFG();
MachineFunctionPass::getAnalysisUsage(AU);
}
/// Calculate the liveness information for the given machine function.
bool StackMapLiveness::runOnMachineFunction(MachineFunction &MF) {
if (!EnablePatchPointLiveness)
return false;
DEBUG(dbgs() << "********** COMPUTING STACKMAP LIVENESS: " << MF.getName()
<< " **********\n");
TRI = MF.getSubtarget().getRegisterInfo();
++NumStackMapFuncVisited;
// Skip this function if there are no patchpoints to process.
if (!MF.getFrameInfo()->hasPatchPoint()) {
++NumStackMapFuncSkipped;
return false;
}
return calculateLiveness(MF);
}
/// Performs the actual liveness calculation for the function.
bool StackMapLiveness::calculateLiveness(MachineFunction &MF) {
bool HasChanged = false;
// For all basic blocks in the function.
for (auto &MBB : MF) {
DEBUG(dbgs() << "****** BB " << MBB.getName() << " ******\n");
LiveRegs.init(TRI);
LiveRegs.addLiveOuts(&MBB);
bool HasStackMap = false;
// Reverse iterate over all instructions and add the current live register
// set to an instruction if we encounter a patchpoint instruction.
for (auto I = MBB.rbegin(), E = MBB.rend(); I != E; ++I) {
if (I->getOpcode() == TargetOpcode::PATCHPOINT) {
addLiveOutSetToMI(MF, *I);
HasChanged = true;
HasStackMap = true;
++NumStackMaps;
}
DEBUG(dbgs() << " " << LiveRegs << " " << *I);
LiveRegs.stepBackward(*I);
}
++NumBBsVisited;
if (!HasStackMap)
++NumBBsHaveNoStackmap;
}
return HasChanged;
}
/// Add the current register live set to the instruction.
void StackMapLiveness::addLiveOutSetToMI(MachineFunction &MF,
MachineInstr &MI) {
uint32_t *Mask = createRegisterMask(MF);
MachineOperand MO = MachineOperand::CreateRegLiveOut(Mask);
MI.addOperand(MF, MO);
}
/// Create a register mask and initialize it with the registers from the
/// register live set.
uint32_t *StackMapLiveness::createRegisterMask(MachineFunction &MF) const {
// The mask is owned and cleaned up by the Machine Function.
uint32_t *Mask = MF.allocateRegisterMask(TRI->getNumRegs());
for (auto Reg : LiveRegs)
Mask[Reg / 32] |= 1U << (Reg % 32);
// Give the target a chance to adjust the mask.
TRI->adjustStackMapLiveOutMask(Mask);
return Mask;
}