diff --git a/docs/DXIL.rst b/docs/DXIL.rst index 510bb4951..86c1b83dd 100644 --- a/docs/DXIL.rst +++ b/docs/DXIL.rst @@ -3192,7 +3192,7 @@ SM.WAVESIZENEEDSDXIL16PLUS WaveSize is valid only for DXIL versio SM.WAVESIZEVALUE Declared WaveSize %0 outside valid range [%1..%2], or not a power of 2. SM.ZEROHSINPUTCONTROLPOINTWITHINPUT When HS input control point count is 0, no input signature should exist. TYPES.DEFINED Type must be defined based on DXIL primitives -TYPES.I8 I8 can only be used as immediate value for intrinsic. +TYPES.I8 I8 can only be used as immediate value for intrinsic or as i8* via bitcast by lifetime intrinsics. TYPES.INTWIDTH Int type must be of valid width TYPES.NOMULTIDIM Only one dimension allowed for array type. TYPES.NOPTRTOPTR Pointers to pointers, or pointers in structures are not allowed. diff --git a/include/dxc/HLSL/DxilValidation.h b/include/dxc/HLSL/DxilValidation.h index 478d004be..01a92e489 100644 --- a/include/dxc/HLSL/DxilValidation.h +++ b/include/dxc/HLSL/DxilValidation.h @@ -271,7 +271,7 @@ enum class ValidationRule : unsigned { // Type system TypesDefined, // Type must be defined based on DXIL primitives - TypesI8, // I8 can only be used as immediate value for intrinsic. + TypesI8, // I8 can only be used as immediate value for intrinsic or as i8* via bitcast by lifetime intrinsics. TypesIntWidth, // Int type must be of valid width TypesNoMultiDim, // Only one dimension allowed for array type. TypesNoPtrToPtr, // Pointers to pointers, or pointers in structures are not allowed. diff --git a/include/dxc/HlslIntrinsicOp.h b/include/dxc/HlslIntrinsicOp.h index 96ae86e7f..6f76c7c5f 100644 --- a/include/dxc/HlslIntrinsicOp.h +++ b/include/dxc/HlslIntrinsicOp.h @@ -230,13 +230,13 @@ import hctdb_instrhelp IOP_texCUBEproj, IOP_transpose, IOP_trunc, -#ifdef ENABLE_SPIRV_CODEGEN - IOP_VkReadClock, -#endif // ENABLE_SPIRV_CODEGEN IOP_unpack_s8s16, IOP_unpack_s8s32, IOP_unpack_u8u16, IOP_unpack_u8u32, +#ifdef ENABLE_SPIRV_CODEGEN + IOP_VkReadClock, +#endif // ENABLE_SPIRV_CODEGEN MOP_Append, MOP_RestartStrip, MOP_CalculateLevelOfDetail, diff --git a/lib/HLSL/HLOperationLower.cpp b/lib/HLSL/HLOperationLower.cpp index 8883cb394..39007fbc2 100644 --- a/lib/HLSL/HLOperationLower.cpp +++ b/lib/HLSL/HLOperationLower.cpp @@ -5511,13 +5511,13 @@ IntrinsicLower gLowerTable[] = { {IntrinsicOp::IOP_texCUBEproj, EmptyLower, DXIL::OpCode::NumOpCodes}, {IntrinsicOp::IOP_transpose, EmptyLower, DXIL::OpCode::NumOpCodes}, {IntrinsicOp::IOP_trunc, TrivialUnaryOperation, DXIL::OpCode::Round_z}, - #ifdef ENABLE_SPIRV_CODEGEN - {IntrinsicOp::IOP_VkReadClock, UnsupportedVulkanIntrinsic, DXIL::OpCode::NumOpCodes}, -#endif // ENABLE_SPIRV_CODEGEN {IntrinsicOp::IOP_unpack_s8s16, TranslateUnpack, DXIL::OpCode::Unpack4x8}, {IntrinsicOp::IOP_unpack_s8s32, TranslateUnpack, DXIL::OpCode::Unpack4x8}, {IntrinsicOp::IOP_unpack_u8u16, TranslateUnpack, DXIL::OpCode::Unpack4x8}, {IntrinsicOp::IOP_unpack_u8u32, TranslateUnpack, DXIL::OpCode::Unpack4x8}, +#ifdef ENABLE_SPIRV_CODEGEN + { IntrinsicOp::IOP_VkReadClock, UnsupportedVulkanIntrinsic, DXIL::OpCode::NumOpCodes }, +#endif // ENABLE_SPIRV_CODEGEN {IntrinsicOp::MOP_Append, StreamOutputLower, DXIL::OpCode::EmitStream}, {IntrinsicOp::MOP_RestartStrip, StreamOutputLower, DXIL::OpCode::CutStream}, {IntrinsicOp::MOP_CalculateLevelOfDetail, TranslateCalculateLOD, DXIL::OpCode::NumOpCodes}, diff --git a/utils/hct/hctdb.py b/utils/hct/hctdb.py index a9afeabe0..be2a18e14 100644 --- a/utils/hct/hctdb.py +++ b/utils/hct/hctdb.py @@ -2561,7 +2561,7 @@ class db_dxil(object): self.add_valrule_msg("Types.IntWidth", "Int type must be of valid width", "Int type '%0' has an invalid width.") self.add_valrule("Types.NoMultiDim", "Only one dimension allowed for array type.") self.add_valrule("Types.NoPtrToPtr", "Pointers to pointers, or pointers in structures are not allowed.") - self.add_valrule("Types.I8", "I8 can only be used as immediate value for intrinsic.") + self.add_valrule("Types.I8", "I8 can only be used as immediate value for intrinsic or as i8* via bitcast by lifetime intrinsics.") self.add_valrule_msg("Sm.Name", "Target shader model name must be known", "Unknown shader model '%0'.") self.add_valrule_msg("Sm.DxilVersion", "Target shader model requires specific Dxil Version", "Shader model requires Dxil Version %0,%1.")