Граф коммитов

303 Коммитов

Автор SHA1 Сообщение Дата
Xiang Li 639e12c118
When MemcpySplitter::PatchMemCpyWithZeroIdxGEP, not go inside matrix. (#901) 2017-12-08 22:32:52 -08:00
Xiang Li 455885b3fc
Support matrix transpose. (#900) 2017-12-08 16:40:23 -08:00
Xiang Li 9c459fedd8
Add line number when report resource cannot map. (#892) 2017-12-06 22:57:44 -08:00
Tex Riddell f25850d524
Add [noinline] function attribute for lib target. (#893) 2017-12-06 19:41:37 -08:00
Xiang Li 8c8d8f6e5a
Fix crash for vector smoothstep. (#890) 2017-12-06 17:21:02 -08:00
Xiang Li 1c103bb062 Revert "Fix crash for vector smoothstep."
This reverts commit 3bfa9960a8.
2017-12-06 14:15:27 -08:00
Xiang Li 3bfa9960a8 Fix crash for vector smoothstep. 2017-12-06 13:09:09 -08:00
Young Kim 4904266822
Code Cleanup for Execution Tests (#879)
- Cleaning up execution test
- Generating xml test file from the script and hctdb
- Fixing hctdb categories for unsigned int
- Adding more execution tests (Fadd, FSub, FMul, FDiv, Add, Sub, SDiv)
2017-12-05 15:17:50 -08:00
Lei Zhang 5de265fddb
[spirv] Add support for ignoring unused resources (#875)
Added a new command line option -fvk-ignore-unused-resources
to avoid emitting SPIR-V code for resources defined but not statically
referenced by the call tree of the entry point in question.
2017-12-05 12:21:55 -05:00
Lei Zhang 05057495e8
[spirv] Adopt new changes in SPIRV-Tools (#846)
Uses the legalization pass recipe from SPIRV-Tools.

Also change -fcgl to disable both legalization and optimization.

Validation on some tests are turned off because of new image
instruction checking in SPIRV-Tools. Enabling them is a TODO.
2017-11-23 22:30:49 -05:00
Young Kim 92c66ed574
Fix build warnings (#832)
Change DXASSERT to DXASSERT_LOCALVAR to suppress warning
2017-11-20 20:04:42 -08:00
Young Kim 8ba7f5a200
Clean up for versions (#829)
-bump up dll version for fixed version
-show dxcompiler and dxil version number for dxc help message
-emit warnings for dxcompiler validator that container will not be signed
2017-11-20 11:09:28 -08:00
Xiang Li e9f0425202
Use neg+imax for iabs. (#828) 2017-11-18 00:18:31 -08:00
Xiang Li 259d6624e6
Don't generate lshr for cb array indexing. (#812) 2017-11-17 10:54:05 -08:00
Lei Zhang 0b309e9faf
[spirv] Add CL option to disable SPIR-V legalization (#814)
/fcgl is reused in SPIR-V CodeGen for disabling SPIR-V legalization.
2017-11-17 11:44:44 -05:00
Young Kim 289d09e700
Bitcast for 16bit types (#817)
This change adds bitcast intrinsics for 16bit types (asfloat16, asint, asuint)
2017-11-16 11:38:56 -08:00
Young Kim 3cad152a90
Template argument for byteaddressbuffer load store (#804)
This change removes new Load variations (LoadHalf, LoadFloat, etc) for RWByteAddressBuffer/ByteAddressBuffer methods and add templated Load intrinsics. This templated Load only works on scalar or vector types, and its variations (Load2, Load3, Load4, etc) do not work with templates and work as it did before (only storing uints). For Store operation, you can store any scalar or vector types of up to 16 bytes, while prior to 2018 Store only supported storing uint scalar.
2017-11-15 18:47:12 -08:00
Xiang Li 6adad2b8a3
Don't emit type annotation for empty struct. (#802)
After dxil generation, there should be no empty struct used in instructions.
2017-11-14 16:35:37 -08:00
Xiang Li 0dbba98152
Remove check on empty struct when LoadDxilStructAnnotation. (#798) 2017-11-14 10:34:01 -08:00
Young Kim a48d81fcac
New scalar types (#792)
This change is to add fixed width scalar types in HLSL 2018.
These types are: int16_t, uint16_t, int32_t, uint32_t, float16_t, float32_t, and float64_t.
Prior HLSL versions do not support these fixed width types.

This change also renames /no-min-precision command line option to /enable-16bit-types. int16_t and uint16_t are only allowed with this mode.
2017-11-13 15:03:19 -08:00
Young Kim 44db464c32
Native Int16 and Uint16 types (#783)
This change is to introduce native precision types for shader model 6.2. With native half (float16) types, we will introduce native int16/uint16 types with same command line option. This means that one option will disable all min precision types. For now, int16/uint16 types will be exposed on HLSL level as int16_t and uint16_t.

This change also includes some constant buffer fixes for 16 bit types, as well as int64 types.
2017-11-09 10:03:27 -08:00
Young Kim 2c140f795c
RawBufferLoad and new methods for ByteAddressBuffer (#762)
This change is an extension of float16 support. We are adding LoadHalf, LoadFloat, and LoadDouble method to byte address buffer so that users can access data from byte address buffer by these types. Also starting shader model 6.2, we are mapping byte address buffer and structure buffer load/store operations to RawBufferLoad/Store to differentiate raw buffer load from typed buffer load. Unlike BufferLoad for typed buffers, RawBufferLoad for min precision types will not have its min precision values as its return types, but their actual scalar size in buffer (i.e rawBufferLoad.i32 for min16int and rawBufferLoad.f32 for min16float). RawBufferLoad/Store contains additional parameters, where mask was required for correct status behavior for CheckAccessFullyMapped, and alignment is for relative alignment for future potential benefit for backend.
2017-11-07 18:15:19 -08:00
Xiang Li f9c599bba6
Make Od the same group with o0/o1/o2/o3. (#767) 2017-11-07 10:34:02 -08:00
Young Kim 8c55bbbe6d
Denorm to function attribute (#764)
- Denorm mode to function attribute not function annotation
- Adding validation rule for fp32-denorm-mode



* Fix from comments
2017-11-06 18:09:14 -08:00
Xiang Li d8cefeb1ba
Make sure status only used by CheckAccessFullyMapped. (#763)
* Make sure status only used by CheckAccessFullyMapped.
2017-11-03 18:12:15 -07:00
Jeff Noyle 59b317d549
Skip getelementptr instructions (#751) 2017-11-01 12:31:05 -07:00
Jeff Noyle 0acdbd9a8c
PIX pixel-cost visualizer: Fix byte offset, simplify ReEmitDxilResources (#749)
* byte offset, not element offset => multiply by sizeof(dword)
set uav to r/w
Re-emit meta-data becomes delete then emit

* update test

* re-compute view id state
2017-10-31 13:37:07 -07:00
Xiang Li 8c790a8b0e
Do not generate phi of pointers. (#745)
* Disable optimizations which may generate phi of pointers.
2017-10-30 15:53:25 -07:00
Xiang Li cb2a7e46d8
Only set fastmath on binary math op. (#743) 2017-10-30 13:18:32 -07:00
Young Kim ce9d6267a5 DataLayout String and ConstantBuffer Offset Fix (#727)
This change is to update correct target data layout for DXIL. Now that we have a scalar type of size less than dwords, we need to correctly print string data layout to determine non-packed structure layout.

This change also fixes alignments issues with ConstantBuffer as it was having different CG path from cbuffer.
2017-10-26 14:51:50 -07:00
Xiang Li ef7a891ab2 Support case write to struct input. (#731) 2017-10-23 19:09:30 -07:00
Marcelo Lopez Ruiz b7ce331dee Fix unused var warning in Release, fix #709 misplaces parens (#728) 2017-10-21 14:43:23 -07:00
Lei Zhang 8702f97dff [spirv] Add support for four register number shifting options (#720)
Added the following four command line options to shift register
number for Vulkan:

* -fvk-b-shift
* -fvk-t-shift
* -fvk-s-shift
* -fvk-u-shift

These options are used to avoid assigning the same binding
number to more than one resources.
2017-10-20 19:37:11 -07:00
Young Kim 40369a5884 Structure alignment Change (#721)
Structure buffer alignment change for float16. Starting in shader model 6.2, the structure will match that of #pragma pack(8) alignment in C++

Removing padding for structure buffer. We will not have any padding in HLSL structure since load/store operation already handles offset as if padding exist in #pragma pack(8) mode in C++

Disable legacy alignment for non precision mode as it was only needed for min precision
2017-10-20 13:51:42 -07:00
Jeff Noyle 5b3f3d7c16 Another instance of parameters-that-should-have-been-undef (#718) 2017-10-18 09:07:52 -07:00
Jeff Noyle 9cb2d14005 Specify undefined values for unused arguments... (#716) 2017-10-17 14:41:40 -07:00
Xiang Li 7f9ee1a8f6 Add test for minprec on intrinsic. 2017-10-11 23:41:27 -07:00
Xiang Li 8cdd242739 Use M instead of m_pHLModule which is already Released when SetPauseResumePasses. (#696) 2017-10-11 17:19:22 -07:00
Marcelo Lopez Ruiz 64f3b34995 Adds support for pipeline restart (#683)
* Adds support for pause/resume in pipeline.
* Adds 0.0 as the validator version to indicate no validation should occur.
* Moves module parsing from dxcompiler down to HLSL library.
* Adds support for optimizer to process a DXIL part.
* Adds a form with designer support for the interactive optimizer.
2017-10-11 14:04:24 -07:00
Xiang Li e26728ba5f Use float for tex coord instead of float_like. (#688)
* Use float for tex coord instead of float_like.

* Support min prec for GetDim.
2017-10-10 18:53:50 -07:00
Xiang Li ce4aad0418 Use function annotation of patch constant function in GenerateDxilPatchConstantLdSt for hs. 2017-10-10 10:51:37 -07:00
Jeff Noyle b06a8153ff Shader debug instrumentation (#680)
See the comment in DxilDebugInstrumentation.cpp for a summary of how this-all works. Basically: instrument all instructions to output "trace" info to a UAV so that a debugger can reconstruct the execution of the shader and offer a debugger-like experience.
2017-10-09 15:30:29 -07:00
Xiang Li 36b2a12695 Fix row index for array of matrix input/output. (#660)
* Fix row index for array of matrix input/output.
Also remove sret when flatten functions.
2017-09-28 17:23:57 -07:00
Xiang Li 58b7f88864 Use correct channel for gather with offset. (#648) 2017-09-25 17:43:24 -07:00
Jeff Noyle f169e6f238 PIX pixel-hit instrumentation: Re-emit type system, fix several issues with the UAV (#635)
* Add SV_Position index parameter, various minor tweaks to UAV setup

* Convert to raw buffer

* fix up unit tests, add a few names to variables

* CR feedback: check for pre-existing type; typo
2017-09-25 15:22:05 -07:00
Xiang Li 6b3fefb5e4 Support matrix for frexp. (#624) 2017-09-19 08:56:25 -07:00
Young Kim fb33d62978 Restrict no min precision option to shader model 6.2 (#615) 2017-09-12 16:05:08 -07:00
Young Kim 223a885613 Group Signature Elements by Element Width (#610)
This change is to enforce the new constraint on signature packing: pack signature elements by data width. Before we introduce fp16 type, every element was assumed to reserve 32 bits. Since we are introducing a new 16 bit data type, we need a new way to enforce signature rules.

After discussions we decided that it would be nice to pack elements based on data width. However, we are still enforcing the rule that each row contains up to 4 elements, regardless of the size. This way, depending on the hardware support drivers can optimize packing signatures, while on DXIL level we maintain the assumption that there are 4 elements per row. We are also still constraining on the total number of rows to be 32 for now. This can be changed in the future if people find this limit to be an issue.
2017-09-06 11:04:33 -07:00
Xiang Li 20268a4725 Code cleanup. 2017-09-01 10:47:29 -07:00
Xiang Li ddc78174f4 Split big alloca first. 2017-09-01 10:47:29 -07:00