Граф коммитов

111 Коммитов

Автор SHA1 Сообщение Дата
Xiang Li afcd7cb6a7 Fix Merge conflict on Better memcpy propagation. (#1233). 2018-04-17 11:58:11 -07:00
Xiang Li e1fd0fc9de
Better memcpy propagation. (#1233)
1. MergeGepUse for cbuffer and temp gep created when flatten.
2. When flatten alloca, always keep order by size of type.
   So we can make sure big alloca flattened first, then small alloca can easier remove memcpy.
3. For global variable which has zero init value, replace use of zero initializer if possible.
4. In ResourceToHandle::ReplaceResourceWithHandle only assert when has user.
5. MergeGepUse for input output in collectInputOutputAccessInfo.
2018-04-17 10:57:15 -07:00
Young Kim e507d99e4e fix merge conflict on SROA 2018-04-10 17:33:37 -07:00
Young Kim 0777a7a020 Merge branch 'master' into rtmaster 2018-04-10 16:47:47 -07:00
Tex Riddell 0021e993a2 Merged PR 56: Avoid inserting other insts before allocas in several passes.
Avoid inserting other insts before allocas in several passes.

- Improve code that creates allocas/non-allocas to keep allocas first
- Add helper functions to dxilutil
- Use name AllocaBuilder for CreateAlloca for clarity
2018-04-10 23:33:41 +00:00
Tex Riddell 335ee949bb More places to be cautious about alloca vs. non-alloca insert locs.
- some builder name changes for consistency
2018-03-29 18:05:38 -07:00
Xiang Li 357803d342
Don't sink sample coordinate into control flow. (#1188) 2018-03-29 16:33:59 -07:00
Xiang_Li (XBox) 1d91a0a5b1 Merged PR 59: Remove hl functions has body and always inline before DxilGeneration to avoid
Remove hl functions has body and always inline before DxilGeneration to avoid fail to find resource for update counter.
2018-03-27 21:35:10 +00:00
Xiang Li a489c2ec25
Transform mad(a, 0, b) into b. (#1150) 2018-03-19 18:04:56 -07:00
Grant 18138ff8cf Handle more complex addressing modes (#1147)
Fix HoistConstantArray pass to recognize more complex load & store patterns.

Previously it was expecting no nesting and just a simple list of GetElementPtr's that fed loads or stores. Now it can accept a tree (DAG) of GetElementPtrs that feed leaf node loads or stores.
These patterns cannot be directly derived from HLSL, however they can occur due to previous optimizations that transform the array accesses (like a partial CSE or similar).
2018-03-16 14:29:36 -07:00
Tex Riddell 81f8b8c3a2 Avoid inserting other insts before allocas in several passes.
- Improve code that creates allocas/non-allocas to keep allocas first
- Add helper functions to dxilutil
- Use name AllocaBuilder for CreateAlloca for clarity
2018-03-15 17:41:42 -07:00
Xiang Li d66d48721f
Set default input control point count to 1. (#1135) 2018-03-13 11:06:30 -07:00
Tex Riddell cb5f27c080 Merge branch 'master' into user/texr/rt-merge-rebase 2018-03-12 13:11:12 -07:00
Tex Riddell 64dada19d7 Merged PR 41: Prevent GVN from upsizing loads and bitcasting i32* to i64* breaking DXIL
Prevent GVN from upsizing loads and bitcasting i32* to i64* breaking DXIL
2018-03-12 20:09:49 +00:00
Tex Riddell dcaad9e14c
Fix scalarizer for shuffle on vector produced later (#1128) 2018-03-12 12:58:48 -07:00
Tex Riddell f8e1af0417 Merge branch 'master' into user/texr/rt-merge-rebase 2018-03-09 00:55:21 -08:00
Xiang Li 277bb0bce3
Use memcpy when cast cbuffer constant into static global. (#1125) 2018-03-08 22:34:46 -08:00
Xiang Li 3873af6750
Support addrspacecast when flatten global variable. (#1103) 2018-02-27 17:16:58 -08:00
Xiang Li 19616e53b5 Revert "Support addrspacecast when flatten global variable."
This reverts commit d74ff8a97d.
2018-02-27 10:59:48 -08:00
Xiang Li d74ff8a97d Support addrspacecast when flatten global variable. 2018-02-27 10:55:35 -08:00
Tex Riddell 634fd7556b Merge branch 'rtmaster' into user/texr/rt-merge-rebase 2018-02-20 19:12:09 -08:00
Xiang Li cda6c52875
Save signature debug info to alloca. (#1087) 2018-02-20 18:44:04 -08:00
Tex Riddell d8588efbb1 Remove/refactor dead code paths for flattenning library functions 2018-02-13 15:12:03 -08:00
Tex Riddell 7da55d9268 Fix SROA on UDT passed to new intrinsics. 2018-02-12 13:11:31 -08:00
Xiang Li c6915bcccd Support nonUniform. 2018-02-07 14:02:43 -08:00
Tex Riddell 0c55780ce4 Legalize IO for lib func, HLMatrixLowerPass: fix value args, other cleanup. 2018-02-07 01:02:54 -08:00
Xiang Li fdb8161ccb 1. Not replace local/static resource to handle for lib.
2. Not SROA on resource.
3. avoid unpack for resource.
4. Use value type for createHandleForLib.
5. Move all scalar global resource load to the beginning of function.
   This will stop other pass do optimizations on the loads of scalar global resource.
6. Not remove local resource for lib.
2018-02-06 19:30:24 -08:00
Xiang Li 66516234b1 1. Remove unused createHandleForLib functions.
2. Call DxilTranslateRawBuffer after DxilLowerCreateHandleForLib.
2018-02-05 17:54:08 -08:00
Tex Riddell 93c6bb3054 Fix bad condition for skipping library functions for parameter flattenning. 2018-02-05 17:54:08 -08:00
Xiang Li dc3ad5efe5 Lower createHandelForLib.
TODO: fix nonUniform, resource array fails and remove LinkInfo.
2018-02-05 17:54:08 -08:00
Tex Riddell 213322e151 Skip library function flattenning entirely.
- still needs code cleanup (code can be deleted now with new assumption)
2018-02-05 17:54:08 -08:00
Tex Riddell 15cd5f16e6 Matrix lowering for functions with UDT params preserved.
- Keep track of patch constant functions for later identification
- functions that require input/output signature processing identified
  with IsEntryThatUsesSignatures
- update lib_rt.hlsl intrinsics and naming
2018-02-05 17:54:07 -08:00
Xiang Li c45aa784ac Add AcceptHitAndEndSearch, CallShader, CommitHitAndStopRay and change ReportIntersection into ReportHit.
Also change RayTracingAccelerationStructure into RaytracingAccelerationStructure.
2018-02-05 17:54:06 -08:00
Xiang Li eb4b0ae768 Support user define type for dxil operation.
Add RayTracingAccelerationStructure to dxil resource.
Lower ReportIntersection and TraceRay.
2018-02-05 17:54:05 -08:00
Tex Riddell ea73161d6f In SROAHLSL undo change to legalize input/output condition. 2018-02-05 17:52:21 -08:00
Tex Riddell 20bf20391a Skip flattening for library function parameters or modifying return value. 2018-02-05 17:52:21 -08:00
Tex Riddell e67ee2ae17 Treat RT entry like export - flatten params and don't clone 2018-02-05 17:52:21 -08:00
Xiang Li 08fbc64c2a
Insert store for incoming value of phi after insert load for phi use. (#964) 2018-01-04 16:14:01 -08:00
Xiang Li ba844c25fe
Support local resource array which don't have dynamic indexing. (#938) 2017-12-19 15:29:11 -08:00
Xiang Li db99efe397
Support resource select inside loop. (#930)
Also fix scalarizer fail when scattered element is null.
2017-12-15 11:33:03 -08:00
Xiang Li 0790e03364
Remove stacksave and stackstore. (#914) 2017-12-12 18:50:01 -08:00
Xiang Li 639e12c118
When MemcpySplitter::PatchMemCpyWithZeroIdxGEP, not go inside matrix. (#901) 2017-12-08 22:32:52 -08:00
Young Kim 2c140f795c
RawBufferLoad and new methods for ByteAddressBuffer (#762)
This change is an extension of float16 support. We are adding LoadHalf, LoadFloat, and LoadDouble method to byte address buffer so that users can access data from byte address buffer by these types. Also starting shader model 6.2, we are mapping byte address buffer and structure buffer load/store operations to RawBufferLoad/Store to differentiate raw buffer load from typed buffer load. Unlike BufferLoad for typed buffers, RawBufferLoad for min precision types will not have its min precision values as its return types, but their actual scalar size in buffer (i.e rawBufferLoad.i32 for min16int and rawBufferLoad.f32 for min16float). RawBufferLoad/Store contains additional parameters, where mask was required for correct status behavior for CheckAccessFullyMapped, and alignment is for relative alignment for future potential benefit for backend.
2017-11-07 18:15:19 -08:00
Young Kim 8c55bbbe6d
Denorm to function attribute (#764)
- Denorm mode to function attribute not function annotation
- Adding validation rule for fp32-denorm-mode



* Fix from comments
2017-11-06 18:09:14 -08:00
Xiang Li 8c790a8b0e
Do not generate phi of pointers. (#745)
* Disable optimizations which may generate phi of pointers.
2017-10-30 15:53:25 -07:00
Xiang Li cb2a7e46d8
Only set fastmath on binary math op. (#743) 2017-10-30 13:18:32 -07:00
Xiang Li ef7a891ab2 Support case write to struct input. (#731) 2017-10-23 19:09:30 -07:00
Marcelo Lopez Ruiz 64f3b34995 Adds support for pipeline restart (#683)
* Adds support for pause/resume in pipeline.
* Adds 0.0 as the validator version to indicate no validation should occur.
* Moves module parsing from dxcompiler down to HLSL library.
* Adds support for optimizer to process a DXIL part.
* Adds a form with designer support for the interactive optimizer.
2017-10-11 14:04:24 -07:00
Xiang Li 36b2a12695 Fix row index for array of matrix input/output. (#660)
* Fix row index for array of matrix input/output.
Also remove sret when flatten functions.
2017-09-28 17:23:57 -07:00
Xiang Li 20268a4725 Code cleanup. 2017-09-01 10:47:29 -07:00