604 строки
20 KiB
C++
604 строки
20 KiB
C++
///////////////////////////////////////////////////////////////////////////////
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// //
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// DxilShaderAccessTracking.cpp //
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// Copyright (C) Microsoft Corporation. All rights reserved. //
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// This file is distributed under the University of Illinois Open Source //
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// License. See LICENSE.TXT for details. //
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// //
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// Provides a pass to add instrumentation to determine pixel hit count and //
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// cost. Used by PIX. //
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// //
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///////////////////////////////////////////////////////////////////////////////
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#include "dxc/DXIL/DxilOperations.h"
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#include "dxc/DXIL/DxilInstructions.h"
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#include "dxc/DXIL/DxilModule.h"
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#include "dxc/DxilPIXPasses/DxilPIXPasses.h"
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#include "dxc/HLSL/DxilGenerationPass.h"
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#include "dxc/HLSL/DxilSpanAllocator.h"
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#include "llvm/IR/PassManager.h"
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#include "llvm/Support/FormattedStream.h"
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#include "llvm/Transforms/Utils/Local.h"
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#include <deque>
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#ifdef _WIN32
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#include <winerror.h>
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#endif
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using namespace llvm;
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using namespace hlsl;
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void ThrowIf(bool a) {
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if (a) {
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throw ::hlsl::Exception(E_INVALIDARG);
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}
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}
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//---------------------------------------------------------------------------------------------------------------------------------
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// These types are taken from PIX's ShaderAccessHelpers.h
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enum class ShaderAccessFlags : uint32_t {
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None = 0,
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Read = 1 << 0,
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Write = 1 << 1,
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// "Counter" access is only applicable to UAVs; it means the counter buffer
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// attached to the UAV was accessed, but not necessarily the UAV resource.
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Counter = 1 << 2,
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// Descriptor-only read (if any), but not the resource contents (if any).
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// Used for GetDimensions, samplers, and secondary texture for sampler
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// feedback.
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// TODO: Make this a unique value if supported in PIX, then enable
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// GetDimensions
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DescriptorRead = 1 << 0,
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};
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constexpr uint32_t DWORDsPerResource = 3;
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constexpr uint32_t BytesPerDWORD = 4;
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static uint32_t OffsetFromAccess(ShaderAccessFlags access) {
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switch (access) {
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case ShaderAccessFlags::Read:
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return 0;
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case ShaderAccessFlags::Write:
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return 1;
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case ShaderAccessFlags::Counter:
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return 2;
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default:
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throw ::hlsl::Exception(E_INVALIDARG);
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}
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}
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// This enum doesn't have to match PIX's version, because the values are
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// received from PIX encoded in ASCII. However, for ease of comparing this code
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// with PIX, and to be less confusing to future maintainers, this enum does
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// indeed match the same-named enum in PIX.
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enum class RegisterType {
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CBV,
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SRV,
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UAV,
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RTV, // not used.
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DSV, // not used.
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Sampler,
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SOV, // not used.
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Invalid,
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Terminator
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};
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RegisterType RegisterTypeFromResourceClass(DXIL::ResourceClass c) {
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switch (c) {
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case DXIL::ResourceClass::SRV:
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return RegisterType::SRV;
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break;
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case DXIL::ResourceClass::UAV:
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return RegisterType::UAV;
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break;
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case DXIL::ResourceClass::CBuffer:
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return RegisterType::CBV;
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break;
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case DXIL::ResourceClass::Sampler:
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return RegisterType::Sampler;
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break;
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case DXIL::ResourceClass::Invalid:
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return RegisterType::Invalid;
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break;
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default:
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ThrowIf(true);
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return RegisterType::Invalid;
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}
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}
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struct RegisterTypeAndSpace {
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bool operator<(const RegisterTypeAndSpace &o) const {
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return static_cast<int>(Type) < static_cast<int>(o.Type) ||
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(static_cast<int>(Type) == static_cast<int>(o.Type) &&
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Space < o.Space);
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}
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RegisterType Type;
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unsigned Space;
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};
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// Identifies a bind point as defined by the root signature
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struct RSRegisterIdentifier {
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RegisterType Type;
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unsigned Space;
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unsigned Index;
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bool operator<(const RSRegisterIdentifier &o) const {
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return static_cast<unsigned>(Type) < static_cast<unsigned>(o.Type) &&
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Space < o.Space && Index < o.Index;
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}
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};
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struct SlotRange {
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unsigned startSlot;
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unsigned numSlots;
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// Number of slots needed if no descriptors from unbounded ranges are included
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unsigned numInvariableSlots;
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};
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struct DxilResourceAndClass {
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DxilResourceBase *resource;
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Value *index;
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DXIL::ResourceClass resClass;
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};
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//---------------------------------------------------------------------------------------------------------------------------------
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class DxilShaderAccessTracking : public ModulePass {
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public:
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static char ID; // Pass identification, replacement for typeid
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explicit DxilShaderAccessTracking() : ModulePass(ID) {}
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const char *getPassName() const override {
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return "DXIL shader access tracking";
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}
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bool runOnModule(Module &M) override;
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void applyOptions(PassOptions O) override;
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private:
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void EmitAccess(LLVMContext &Ctx, OP *HlslOP, IRBuilder<> &, Value *slot,
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ShaderAccessFlags access);
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bool EmitResourceAccess(DxilResourceAndClass &res, Instruction *instruction,
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OP *HlslOP, LLVMContext &Ctx,
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ShaderAccessFlags readWrite);
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private:
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bool m_CheckForDynamicIndexing = false;
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std::map<RegisterTypeAndSpace, SlotRange> m_slotAssignments;
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std::map<llvm::Function *, CallInst *> m_FunctionToUAVHandle;
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std::set<RSRegisterIdentifier> m_DynamicallyIndexedBindPoints;
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};
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static unsigned DeserializeInt(std::deque<char> &q) {
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unsigned i = 0;
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while (!q.empty() && isdigit(q.front())) {
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i *= 10;
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i += q.front() - '0';
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q.pop_front();
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}
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return i;
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}
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static char DequeFront(std::deque<char> &q) {
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ThrowIf(q.empty());
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auto c = q.front();
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q.pop_front();
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return c;
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}
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static RegisterType ParseRegisterType(std::deque<char> &q) {
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switch (DequeFront(q)) {
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case 'C':
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return RegisterType::CBV;
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case 'S':
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return RegisterType::SRV;
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case 'U':
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return RegisterType::UAV;
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case 'M':
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return RegisterType::Sampler;
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case 'I':
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return RegisterType::Invalid;
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default:
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return RegisterType::Terminator;
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}
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}
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static char EncodeRegisterType(RegisterType r) {
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switch (r) {
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case RegisterType::CBV:
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return 'C';
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case RegisterType::SRV:
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return 'S';
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case RegisterType::UAV:
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return 'U';
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case RegisterType::Sampler:
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return 'M';
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case RegisterType::Invalid:
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return 'I';
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}
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return '.';
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}
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static void ValidateDelimiter(std::deque<char> &q, char d) {
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ThrowIf(q.front() != d);
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q.pop_front();
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}
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void DxilShaderAccessTracking::applyOptions(PassOptions O) {
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int checkForDynamic;
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GetPassOptionInt(O, "checkForDynamicIndexing", &checkForDynamic, 0);
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m_CheckForDynamicIndexing = checkForDynamic != 0;
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StringRef configOption;
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if (GetPassOption(O, "config", &configOption)) {
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std::deque<char> config;
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config.assign(configOption.begin(), configOption.end());
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// Parse slot assignments. Compare with PIX's ShaderAccessHelpers.cpp
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// (TrackingConfiguration::SerializedRepresentation)
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RegisterType rt = ParseRegisterType(config);
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while (rt != RegisterType::Terminator) {
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RegisterTypeAndSpace rst;
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rst.Type = rt;
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rst.Space = DeserializeInt(config);
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ValidateDelimiter(config, ':');
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SlotRange sr;
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sr.startSlot = DeserializeInt(config);
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ValidateDelimiter(config, ':');
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sr.numSlots = DeserializeInt(config);
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ValidateDelimiter(config, 'i');
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sr.numInvariableSlots = DeserializeInt(config);
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ValidateDelimiter(config, ';');
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m_slotAssignments[rst] = sr;
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rt = ParseRegisterType(config);
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}
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}
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}
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void DxilShaderAccessTracking::EmitAccess(LLVMContext &Ctx, OP *HlslOP,
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IRBuilder<> &Builder,
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Value *ByteIndex,
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ShaderAccessFlags access) {
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unsigned OffsetForAccessType =
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static_cast<unsigned>(OffsetFromAccess(access) * BytesPerDWORD);
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auto OffsetByteIndex = Builder.CreateAdd(
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ByteIndex, HlslOP->GetU32Const(OffsetForAccessType), "OffsetByteIndex");
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UndefValue *UndefIntArg = UndefValue::get(Type::getInt32Ty(Ctx));
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Constant *LiteralOne = HlslOP->GetU32Const(1);
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Constant *ElementMask = HlslOP->GetI8Const(1);
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Function *StoreFunc =
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HlslOP->GetOpFunc(OP::OpCode::BufferStore, Type::getInt32Ty(Ctx));
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Constant *StoreOpcode =
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HlslOP->GetU32Const((unsigned)OP::OpCode::BufferStore);
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(void)Builder.CreateCall(
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StoreFunc,
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{
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StoreOpcode, // i32, ; opcode
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m_FunctionToUAVHandle.at(
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Builder.GetInsertBlock()
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->getParent()), // %dx.types.Handle, ; resource handle
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OffsetByteIndex, // i32, ; coordinate c0: byte offset
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UndefIntArg, // i32, ; coordinate c1 (unused)
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LiteralOne, // i32, ; value v0
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UndefIntArg, // i32, ; value v1
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UndefIntArg, // i32, ; value v2
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UndefIntArg, // i32, ; value v3
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ElementMask // i8 ; just the first value is used
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});
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}
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bool DxilShaderAccessTracking::EmitResourceAccess(DxilResourceAndClass &res,
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Instruction *instruction,
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OP *HlslOP, LLVMContext &Ctx,
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ShaderAccessFlags readWrite) {
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RegisterTypeAndSpace typeAndSpace{RegisterTypeFromResourceClass(res.resClass),
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res.resource->GetSpaceID()};
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auto slot = m_slotAssignments.find(typeAndSpace);
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// If the assignment isn't found, we assume it's not accessed
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if (slot != m_slotAssignments.end()) {
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IRBuilder<> Builder(instruction);
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Value *slotIndex;
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if (isa<ConstantInt>(res.index)) {
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unsigned index = cast<ConstantInt>(res.index)->getLimitedValue();
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if (index > slot->second.numSlots) {
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// out-of-range accesses are written to slot zero:
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slotIndex = HlslOP->GetU32Const(0);
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} else {
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slotIndex = HlslOP->GetU32Const((slot->second.startSlot + index) *
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DWORDsPerResource * BytesPerDWORD);
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}
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} else {
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RSRegisterIdentifier id{typeAndSpace.Type, typeAndSpace.Space,
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res.resource->GetID()};
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m_DynamicallyIndexedBindPoints.emplace(std::move(id));
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// CompareWithSlotLimit will contain 1 if the access is out-of-bounds
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// (both over- and and under-flow via the unsigned >= with slot count)
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auto CompareWithSlotLimit = Builder.CreateICmpUGE(
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res.index, HlslOP->GetU32Const(slot->second.numSlots),
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"CompareWithSlotLimit");
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auto CompareWithSlotLimitAsUint = Builder.CreateCast(
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Instruction::CastOps::ZExt, CompareWithSlotLimit,
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Type::getInt32Ty(Ctx), "CompareWithSlotLimitAsUint");
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// IsInBounds will therefore contain 0 if the access is out-of-bounds, and
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// 1 otherwise.
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auto IsInBounds = Builder.CreateSub(
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HlslOP->GetU32Const(1), CompareWithSlotLimitAsUint, "IsInBounds");
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auto SlotDwordOffset = Builder.CreateAdd(
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res.index, HlslOP->GetU32Const(slot->second.startSlot),
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"SlotDwordOffset");
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auto SlotByteOffset = Builder.CreateMul(
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SlotDwordOffset,
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HlslOP->GetU32Const(DWORDsPerResource * BytesPerDWORD),
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"SlotByteOffset");
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// This will drive an out-of-bounds access slot down to 0
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slotIndex = Builder.CreateMul(SlotByteOffset, IsInBounds, "slotIndex");
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}
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EmitAccess(Ctx, HlslOP, Builder, slotIndex, readWrite);
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return true; // did modify
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}
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return false; // did not modify
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}
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DxilResourceAndClass GetResourceFromHandle(Value *resHandle, DxilModule &DM) {
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DxilResourceAndClass ret{nullptr, nullptr, DXIL::ResourceClass::Invalid};
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CallInst *handle = cast<CallInst>(resHandle);
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DxilInst_CreateHandle createHandle(handle);
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// Dynamic rangeId is not supported - skip and let validation report the
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// error.
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if (!isa<ConstantInt>(createHandle.get_rangeId()))
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return ret;
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unsigned rangeId =
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cast<ConstantInt>(createHandle.get_rangeId())->getLimitedValue();
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auto resClass =
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static_cast<DXIL::ResourceClass>(createHandle.get_resourceClass_val());
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switch (resClass) {
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case DXIL::ResourceClass::SRV:
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ret.resource = &DM.GetSRV(rangeId);
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break;
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case DXIL::ResourceClass::UAV:
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ret.resource = &DM.GetUAV(rangeId);
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break;
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case DXIL::ResourceClass::CBuffer:
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ret.resource = &DM.GetCBuffer(rangeId);
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break;
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case DXIL::ResourceClass::Sampler:
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ret.resource = &DM.GetSampler(rangeId);
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break;
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default:
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DXASSERT(0, "invalid res class");
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return ret;
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}
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ret.index = createHandle.get_index();
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ret.resClass = resClass;
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return ret;
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}
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bool DxilShaderAccessTracking::runOnModule(Module &M) {
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// This pass adds instrumentation for shader access to resources
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DxilModule &DM = M.GetOrCreateDxilModule();
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LLVMContext &Ctx = M.getContext();
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OP *HlslOP = DM.GetOP();
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bool Modified = false;
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if (m_CheckForDynamicIndexing) {
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bool FoundDynamicIndexing = false;
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auto CreateHandleFn =
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HlslOP->GetOpFunc(DXIL::OpCode::CreateHandle, Type::getVoidTy(Ctx));
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auto CreateHandleUses = CreateHandleFn->uses();
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for (auto FI = CreateHandleUses.begin(); FI != CreateHandleUses.end();) {
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auto &FunctionUse = *FI++;
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auto FunctionUser = FunctionUse.getUser();
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auto instruction = cast<Instruction>(FunctionUser);
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Value *index = instruction->getOperand(3);
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if (!isa<Constant>(index)) {
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FoundDynamicIndexing = true;
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break;
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}
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}
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if (FoundDynamicIndexing) {
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if (OSOverride != nullptr) {
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formatted_raw_ostream FOS(*OSOverride);
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FOS << "FoundDynamicIndexing";
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}
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}
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} else {
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{
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if (DM.m_ShaderFlags.GetForceEarlyDepthStencil()) {
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if (OSOverride != nullptr) {
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formatted_raw_ostream FOS(*OSOverride);
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FOS << "ShouldAssumeDsvAccess";
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}
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}
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for (llvm::Function &F : M.functions()) {
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if (!F.getBasicBlockList().empty()) {
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IRBuilder<> Builder(F.getEntryBlock().getFirstInsertionPt());
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unsigned int UAVResourceHandle =
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static_cast<unsigned int>(DM.GetUAVs().size());
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// Set up a UAV with structure of a single int
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SmallVector<llvm::Type *, 1> Elements{Type::getInt32Ty(Ctx)};
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llvm::StructType *UAVStructTy =
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llvm::StructType::create(Elements, "class.RWStructuredBuffer");
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std::unique_ptr<DxilResource> pUAV =
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llvm::make_unique<DxilResource>();
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pUAV->SetGlobalName("PIX_CountUAVName");
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pUAV->SetGlobalSymbol(UndefValue::get(UAVStructTy->getPointerTo()));
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pUAV->SetID(UAVResourceHandle);
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pUAV->SetSpaceID((
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unsigned int)-2); // This is the reserved-for-tools register space
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pUAV->SetSampleCount(1);
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pUAV->SetGloballyCoherent(false);
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pUAV->SetHasCounter(false);
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pUAV->SetCompType(CompType::getI32());
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pUAV->SetLowerBound(0);
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pUAV->SetRangeSize(1);
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pUAV->SetKind(DXIL::ResourceKind::RawBuffer);
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auto pAnnotation =
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DM.GetTypeSystem().GetStructAnnotation(UAVStructTy);
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if (pAnnotation == nullptr) {
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pAnnotation = DM.GetTypeSystem().AddStructAnnotation(UAVStructTy);
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pAnnotation->GetFieldAnnotation(0).SetCBufferOffset(0);
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pAnnotation->GetFieldAnnotation(0).SetCompType(
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hlsl::DXIL::ComponentType::I32);
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pAnnotation->GetFieldAnnotation(0).SetFieldName("count");
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}
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ID = DM.AddUAV(std::move(pUAV));
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assert((unsigned)ID == UAVResourceHandle);
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// Create handle for the newly-added UAV
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Function *CreateHandleOpFunc = HlslOP->GetOpFunc(
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DXIL::OpCode::CreateHandle, Type::getVoidTy(Ctx));
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Constant *CreateHandleOpcodeArg =
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HlslOP->GetU32Const((unsigned)DXIL::OpCode::CreateHandle);
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Constant *UAVArg = HlslOP->GetI8Const(
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static_cast<std::underlying_type<DxilResourceBase::Class>::type>(
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DXIL::ResourceClass::UAV));
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Constant *MetaDataArg =
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HlslOP->GetU32Const(ID); // position of the metadata record in the
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// corresponding metadata list
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Constant *IndexArg = HlslOP->GetU32Const(0); //
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Constant *FalseArg =
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HlslOP->GetI1Const(0); // non-uniform resource index: false
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m_FunctionToUAVHandle[&F] = Builder.CreateCall(
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CreateHandleOpFunc,
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{CreateHandleOpcodeArg, UAVArg, MetaDataArg, IndexArg, FalseArg},
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"PIX_CountUAV_Handle");
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}
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}
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DM.ReEmitDxilResources();
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}
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for (llvm::Function &F : M.functions()) {
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// Only used DXIL intrinsics:
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if (!F.isDeclaration() || F.isIntrinsic() || F.use_empty() ||
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!OP::IsDxilOpFunc(&F))
|
|
continue;
|
|
|
|
// Gather handle parameter indices, if any
|
|
FunctionType *fnTy =
|
|
cast<FunctionType>(F.getType()->getPointerElementType());
|
|
SmallVector<unsigned, 4> handleParams;
|
|
for (unsigned iParam = 1; iParam < fnTy->getFunctionNumParams();
|
|
++iParam) {
|
|
if (fnTy->getParamType(iParam) == HlslOP->GetHandleType())
|
|
handleParams.push_back(iParam);
|
|
}
|
|
if (handleParams.empty())
|
|
continue;
|
|
|
|
auto FunctionUses = F.uses();
|
|
for (auto FI = FunctionUses.begin(); FI != FunctionUses.end();) {
|
|
auto &FunctionUse = *FI++;
|
|
auto FunctionUser = FunctionUse.getUser();
|
|
auto Call = cast<CallInst>(FunctionUser);
|
|
auto opCode = OP::GetDxilOpFuncCallInst(Call);
|
|
|
|
// Base Read/Write on function attribute - should match for all normal
|
|
// resource operations
|
|
ShaderAccessFlags readWrite = ShaderAccessFlags::Write;
|
|
if (OP::GetMemAccessAttr(opCode) == llvm::Attribute::AttrKind::ReadOnly)
|
|
readWrite = ShaderAccessFlags::Read;
|
|
|
|
// Special cases
|
|
switch (opCode) {
|
|
case DXIL::OpCode::GetDimensions:
|
|
// readWrite = ShaderAccessFlags::DescriptorRead; // TODO: Support
|
|
// GetDimensions
|
|
continue;
|
|
case DXIL::OpCode::BufferUpdateCounter:
|
|
readWrite = ShaderAccessFlags::Counter;
|
|
break;
|
|
case DXIL::OpCode::TraceRay:
|
|
case DXIL::OpCode::RayQuery_TraceRayInline:
|
|
// Read of AccelerationStructure; doesn't match function attribute
|
|
// readWrite = ShaderAccessFlags::Read; // TODO: Support
|
|
// TraceRay[Inline]
|
|
continue;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
for (unsigned iParam : handleParams) {
|
|
auto res = GetResourceFromHandle(Call->getArgOperand(iParam), DM);
|
|
// Don't instrument the accesses to the UAV that we just added
|
|
if (res.resClass == DXIL::ResourceClass::UAV &&
|
|
res.resource->GetSpaceID() == (unsigned)-2) {
|
|
break;
|
|
}
|
|
if (EmitResourceAccess(res, Call, HlslOP, Ctx, readWrite)) {
|
|
Modified = true;
|
|
}
|
|
// Remaining resources are DescriptorRead.
|
|
readWrite = ShaderAccessFlags::DescriptorRead;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (OSOverride != nullptr) {
|
|
formatted_raw_ostream FOS(*OSOverride);
|
|
FOS << "DynamicallyIndexedBindPoints=";
|
|
for (auto const &bp : m_DynamicallyIndexedBindPoints) {
|
|
FOS << EncodeRegisterType(bp.Type) << bp.Space << ':' << bp.Index
|
|
<< ';';
|
|
}
|
|
FOS << ".";
|
|
}
|
|
}
|
|
|
|
return Modified;
|
|
}
|
|
|
|
char DxilShaderAccessTracking::ID = 0;
|
|
|
|
ModulePass *llvm::createDxilShaderAccessTrackingPass() {
|
|
return new DxilShaderAccessTracking();
|
|
}
|
|
|
|
INITIALIZE_PASS(DxilShaderAccessTracking,
|
|
"hlsl-dxil-pix-shader-access-instrumentation",
|
|
"HLSL DXIL shader access tracking for PIX", false, false)
|