869 строки
35 KiB
C++
869 строки
35 KiB
C++
///////////////////////////////////////////////////////////////////////////////
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// //
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// DxilRootSignature.cpp //
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// Copyright (C) Microsoft Corporation. All rights reserved. //
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// This file is distributed under the University of Illinois Open Source //
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// License. See LICENSE.TXT for details. //
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// //
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// Provides support for manipulating root signature structures. //
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// //
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///////////////////////////////////////////////////////////////////////////////
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#include "dxc/DXIL/DxilConstants.h"
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#include "dxc/DxilRootSignature/DxilRootSignature.h"
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#include "dxc/DxilContainer/DxilPipelineStateValidation.h"
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#include "dxc/Support/Global.h"
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#include "dxc/Support/WinIncludes.h"
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#include "dxc/Support/WinFunctions.h"
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#include "dxc/Support/FileIOHelper.h"
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#include "dxc/dxcapi.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/IR/DiagnosticPrinter.h"
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#include <string>
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#include <algorithm>
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#include <utility>
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#include <vector>
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#include <set>
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#include "DxilRootSignatureHelper.h"
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using namespace llvm;
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using std::string;
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namespace hlsl {
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using namespace root_sig_helper;
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//////////////////////////////////////////////////////////////////////////////
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// Interval helper.
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template <typename T>
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class CIntervalCollection {
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private:
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std::set<T> m_set;
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public:
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const T* FindIntersectingInterval(const T &I) {
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auto it = m_set.find(I);
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if (it != m_set.end())
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return &*it;
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return nullptr;
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}
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void Insert(const T& value) {
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auto result = m_set.insert(value);
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UNREFERENCED_PARAMETER(result);
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#if DBG
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DXASSERT(result.second, "otherwise interval collides with existing in collection");
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#endif
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}
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};
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//////////////////////////////////////////////////////////////////////////////
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// Verifier classes.
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class DescriptorTableVerifier {
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public:
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void Verify(const DxilDescriptorRange1 *pRanges, unsigned NumRanges,
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unsigned iRTS, DiagnosticPrinter &DiagPrinter);
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};
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class StaticSamplerVerifier {
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public:
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void Verify(const DxilStaticSamplerDesc *pDesc, DiagnosticPrinter &DiagPrinter);
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};
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class RootSignatureVerifier {
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public:
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RootSignatureVerifier();
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~RootSignatureVerifier();
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void AllowReservedRegisterSpace(bool bAllow);
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// Call this before calling VerifyShader, as it accumulates root signature state.
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void VerifyRootSignature(const DxilVersionedRootSignatureDesc *pRootSignature,
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DiagnosticPrinter &DiagPrinter);
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void VerifyShader(DxilShaderVisibility VisType,
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const void *pPSVData,
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uint32_t PSVSize,
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DiagnosticPrinter &DiagPrinter);
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typedef enum NODE_TYPE {
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DESCRIPTOR_TABLE_ENTRY,
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ROOT_DESCRIPTOR,
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ROOT_CONSTANT,
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STATIC_SAMPLER
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} NODE_TYPE;
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private:
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static const unsigned kMinVisType = (unsigned)DxilShaderVisibility::All;
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static const unsigned kMaxVisType = (unsigned)DxilShaderVisibility::MaxValue;
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static const unsigned kMinDescType = (unsigned)DxilDescriptorRangeType::SRV;
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static const unsigned kMaxDescType = (unsigned)DxilDescriptorRangeType::MaxValue;
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struct RegisterRange {
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NODE_TYPE nt;
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unsigned space;
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unsigned lb; // inclusive lower bound
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unsigned ub; // inclusive upper bound
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unsigned iRP;
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unsigned iDTS;
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// Sort by space, then lower bound.
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bool operator<(const RegisterRange& other) const {
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return space < other.space ||
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(space == other.space && ub < other.lb);
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}
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// Like a regular -1,0,1 comparison, but 0 indicates overlap.
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int overlap(const RegisterRange& other) const {
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if (space < other.space) return -1;
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if (space > other.space) return 1;
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if (ub < other.lb) return -1;
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if (lb > other.ub) return 1;
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return 0;
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}
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// Check containment.
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bool contains(const RegisterRange& other) const {
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return (space == other.space) && (lb <= other.lb && other.ub <= ub);
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}
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};
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typedef CIntervalCollection<RegisterRange> RegisterRanges;
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void AddRegisterRange(unsigned iRTS, NODE_TYPE nt, unsigned iDTS,
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DxilDescriptorRangeType DescType,
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DxilShaderVisibility VisType,
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unsigned NumRegisters, unsigned BaseRegister,
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unsigned RegisterSpace, DiagnosticPrinter &DiagPrinter);
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const RegisterRange *FindCoveringInterval(DxilDescriptorRangeType RangeType,
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DxilShaderVisibility VisType,
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unsigned Num,
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unsigned LB,
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unsigned Space);
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RegisterRanges &
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GetRanges(DxilShaderVisibility VisType, DxilDescriptorRangeType DescType) {
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return RangeKinds[(unsigned)VisType][(unsigned)DescType];
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}
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RegisterRanges RangeKinds[kMaxVisType + 1][kMaxDescType + 1];
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bool m_bAllowReservedRegisterSpace;
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DxilRootSignatureFlags m_RootSignatureFlags;
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};
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void DescriptorTableVerifier::Verify(const DxilDescriptorRange1 *pRanges,
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uint32_t NumRanges, uint32_t iRP,
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DiagnosticPrinter &DiagPrinter) {
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bool bHasSamplers = false;
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bool bHasResources = false;
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uint64_t iAppendStartSlot = 0;
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for (unsigned iDTS = 0; iDTS < NumRanges; iDTS++) {
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const DxilDescriptorRange1 *pRange = &pRanges[iDTS];
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switch (pRange->RangeType) {
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case DxilDescriptorRangeType::SRV:
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case DxilDescriptorRangeType::UAV:
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case DxilDescriptorRangeType::CBV:
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bHasResources = true;
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break;
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case DxilDescriptorRangeType::Sampler:
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bHasSamplers = true;
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break;
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default:
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static_assert(DxilDescriptorRangeType::Sampler == DxilDescriptorRangeType::MaxValue,
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"otherwise, need to update cases here");
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EAT(DiagPrinter << "Unsupported RangeType value " << (uint32_t)pRange->RangeType
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<< " (descriptor table slot [" << iDTS << "], root parameter [" << iRP << "]).\n");
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}
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// Samplers cannot be mixed with other resources.
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if (bHasResources && bHasSamplers) {
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EAT(DiagPrinter << "Samplers cannot be mixed with other "
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<< "resource types in a descriptor table (root "
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<< "parameter [" << iRP << "]).\n");
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}
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// NumDescriptors is not 0.
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if (pRange->NumDescriptors == 0) {
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EAT(DiagPrinter << "NumDescriptors cannot be 0 (descriptor "
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<< "table slot [" << iDTS << "], root parameter [" << iRP << "]).\n");
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}
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// Range start.
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uint64_t iStartSlot = iAppendStartSlot;
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if (pRange->OffsetInDescriptorsFromTableStart != DxilDescriptorRangeOffsetAppend) {
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iStartSlot = pRange->OffsetInDescriptorsFromTableStart;
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}
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if (iStartSlot > UINT_MAX) {
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EAT(DiagPrinter << "Cannot append range with implicit lower "
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<< "bound after an unbounded range (descriptor "
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<< "table slot [" << iDTS << "], root parameter [" << iRP << "]).\n");
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}
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// Descriptor range and shader register range overlow.
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if (pRange->NumDescriptors != UINT_MAX) {
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// Bounded range.
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uint64_t ub1 = (uint64_t)pRange->BaseShaderRegister +
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(uint64_t)pRange->NumDescriptors - 1ull;
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if (ub1 > UINT_MAX) {
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EAT(DiagPrinter << "Overflow for shader register range: "
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<< "BaseShaderRegister=" << pRange->BaseShaderRegister
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<< ", NumDescriptor=" << pRange->NumDescriptors
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<< "; (descriptor table slot [" << iDTS
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<< "], root parameter [" << iRP << "]).\n");
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}
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uint64_t ub2 = (uint64_t)iStartSlot + (uint64_t)pRange->NumDescriptors - 1ull;
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if (ub2 > UINT_MAX) {
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EAT(DiagPrinter << "Overflow for descriptor range (descriptor "
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<< "table slot [" << iDTS << "], root parameter [" << iRP << "])\n");
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}
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iAppendStartSlot = iStartSlot + (uint64_t)pRange->NumDescriptors;
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} else {
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// Unbounded range.
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iAppendStartSlot = 1ull + (uint64_t)UINT_MAX;
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}
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}
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}
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RootSignatureVerifier::RootSignatureVerifier() {
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m_RootSignatureFlags = DxilRootSignatureFlags::None;
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m_bAllowReservedRegisterSpace = false;
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}
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RootSignatureVerifier::~RootSignatureVerifier() {}
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void RootSignatureVerifier::AllowReservedRegisterSpace(bool bAllow) {
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m_bAllowReservedRegisterSpace = bAllow;
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}
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const char* RangeTypeString(DxilDescriptorRangeType rt)
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{
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static const char *RangeType[] = {"SRV", "UAV", "CBV", "SAMPLER"};
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static_assert(_countof(RangeType) == ((unsigned)DxilDescriptorRangeType::MaxValue + 1),
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"otherwise, need to update name array");
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return (rt <= DxilDescriptorRangeType::MaxValue) ? RangeType[(unsigned)rt]
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: "unknown";
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}
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const char *VisTypeString(DxilShaderVisibility vis) {
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static const char *Vis[] = {"ALL", "VERTEX", "HULL",
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"DOMAIN", "GEOMETRY", "PIXEL",
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"AMPLIFICATION", "MESH"};
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static_assert(_countof(Vis) == ((unsigned)DxilShaderVisibility::MaxValue + 1),
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"otherwise, need to update name array");
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unsigned idx = (unsigned)vis;
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return vis <= DxilShaderVisibility::MaxValue ? Vis[idx] : "unknown";
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}
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static bool IsDxilShaderVisibility(DxilShaderVisibility v) {
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return v <= DxilShaderVisibility::MaxValue;
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}
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void RootSignatureVerifier::AddRegisterRange(unsigned iRP,
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NODE_TYPE nt,
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unsigned iDTS,
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DxilDescriptorRangeType DescType,
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DxilShaderVisibility VisType,
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unsigned NumRegisters,
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unsigned BaseRegister,
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unsigned RegisterSpace,
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DiagnosticPrinter &DiagPrinter) {
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RegisterRange interval;
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interval.space = RegisterSpace;
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interval.lb = BaseRegister;
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interval.ub = (NumRegisters != UINT_MAX) ? BaseRegister + NumRegisters - 1 : UINT_MAX;
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interval.nt = nt;
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interval.iDTS = iDTS;
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interval.iRP = iRP;
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if (!m_bAllowReservedRegisterSpace &&
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(RegisterSpace >= DxilSystemReservedRegisterSpaceValuesStart) &&
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(RegisterSpace <= DxilSystemReservedRegisterSpaceValuesEnd)) {
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if (nt == DESCRIPTOR_TABLE_ENTRY) {
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EAT(DiagPrinter << "Root parameter [" << iRP << "] descriptor table entry [" << iDTS
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<< "] specifies RegisterSpace=" << std::hex << RegisterSpace
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<< ", which is invalid since RegisterSpace values in the range "
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<< "[" << std::hex << DxilSystemReservedRegisterSpaceValuesStart
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<< "," << std::hex << DxilSystemReservedRegisterSpaceValuesEnd
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<< "] are reserved for system use.\n");
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}
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else {
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EAT(DiagPrinter << "Root parameter [" << iRP
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<< "] specifies RegisterSpace=" << std::hex << RegisterSpace
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<< ", which is invalid since RegisterSpace values in the range "
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<< "[" << std::hex << DxilSystemReservedRegisterSpaceValuesStart
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<< "," << std::hex << DxilSystemReservedRegisterSpaceValuesEnd
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<< "] are reserved for system use.\n");
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}
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}
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const RegisterRange *pNode = nullptr;
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DxilShaderVisibility NodeVis = VisType;
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if (VisType == DxilShaderVisibility::All) {
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// Check for overlap with each visibility type.
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for (unsigned iVT = kMinVisType; iVT <= kMaxVisType; iVT++) {
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pNode = GetRanges((DxilShaderVisibility)iVT, DescType).FindIntersectingInterval(interval);
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if (pNode != nullptr)
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break;
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}
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} else {
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// Check for overlap with the same visibility.
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pNode = GetRanges(VisType, DescType).FindIntersectingInterval(interval);
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// Check for overlap with ALL visibility.
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if (pNode == nullptr) {
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pNode = GetRanges(DxilShaderVisibility::All, DescType).FindIntersectingInterval(interval);
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NodeVis = DxilShaderVisibility::All;
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}
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}
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if (pNode != nullptr) {
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const int strSize = 132;
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char testString[strSize];
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char nodeString[strSize];
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switch (nt) {
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case DESCRIPTOR_TABLE_ENTRY:
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StringCchPrintfA(testString, strSize, "(root parameter [%u], visibility %s, descriptor table slot [%u])",
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iRP, VisTypeString(VisType), iDTS);
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break;
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case ROOT_DESCRIPTOR:
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case ROOT_CONSTANT:
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StringCchPrintfA(testString, strSize, "(root parameter [%u], visibility %s)",
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iRP, VisTypeString(VisType));
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break;
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case STATIC_SAMPLER:
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StringCchPrintfA(testString, strSize, "(static sampler [%u], visibility %s)",
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iRP, VisTypeString(VisType));
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break;
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default:
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DXASSERT_NOMSG(false);
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break;
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}
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switch (pNode->nt)
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{
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case DESCRIPTOR_TABLE_ENTRY:
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StringCchPrintfA(nodeString, strSize, "(root parameter[%u], visibility %s, descriptor table slot [%u])",
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pNode->iRP, VisTypeString(NodeVis), pNode->iDTS);
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break;
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case ROOT_DESCRIPTOR:
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case ROOT_CONSTANT:
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StringCchPrintfA(nodeString, strSize, "(root parameter [%u], visibility %s)",
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pNode->iRP, VisTypeString(NodeVis));
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break;
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case STATIC_SAMPLER:
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StringCchPrintfA(nodeString, strSize, "(static sampler [%u], visibility %s)",
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pNode->iRP, VisTypeString(NodeVis));
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break;
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default:
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DXASSERT_NOMSG(false);
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break;
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}
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EAT(DiagPrinter << "Shader register range of type " << RangeTypeString(DescType)
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<< " " << testString << " overlaps with another "
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<< "shader register range " << nodeString << ".\n");
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}
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// Insert node.
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GetRanges(VisType, DescType).Insert(interval);
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}
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const RootSignatureVerifier::RegisterRange *
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RootSignatureVerifier::FindCoveringInterval(DxilDescriptorRangeType RangeType,
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DxilShaderVisibility VisType,
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unsigned Num,
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unsigned LB,
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unsigned Space) {
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RegisterRange RR;
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RR.space = Space;
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RR.lb = LB;
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RR.ub = LB + Num - 1;
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const RootSignatureVerifier::RegisterRange *pRange = GetRanges(DxilShaderVisibility::All, RangeType).FindIntersectingInterval(RR);
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if (!pRange && VisType != DxilShaderVisibility::All) {
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pRange = GetRanges(VisType, RangeType).FindIntersectingInterval(RR);
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}
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if (pRange && !pRange->contains(RR)) {
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pRange = nullptr;
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}
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return pRange;
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}
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static DxilDescriptorRangeType GetRangeType(DxilRootParameterType RPT) {
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switch (RPT) {
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case DxilRootParameterType::CBV: return DxilDescriptorRangeType::CBV;
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case DxilRootParameterType::SRV: return DxilDescriptorRangeType::SRV;
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case DxilRootParameterType::UAV: return DxilDescriptorRangeType::UAV;
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default:
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static_assert(DxilRootParameterType::UAV == DxilRootParameterType::MaxValue,
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"otherwise, need to add cases here.");
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break;
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}
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DXASSERT_NOMSG(false);
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return DxilDescriptorRangeType::SRV;
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}
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void RootSignatureVerifier::VerifyRootSignature(
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const DxilVersionedRootSignatureDesc *pVersionedRootSignature,
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DiagnosticPrinter &DiagPrinter) {
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const DxilVersionedRootSignatureDesc *pUpconvertedRS = nullptr;
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// Up-convert root signature to the latest RS version.
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ConvertRootSignature(pVersionedRootSignature, DxilRootSignatureVersion::Version_1_1, &pUpconvertedRS);
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DXASSERT_NOMSG(pUpconvertedRS->Version == DxilRootSignatureVersion::Version_1_1);
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// Ensure this gets deleted as necessary.
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struct SigGuard {
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const DxilVersionedRootSignatureDesc *Orig, *Guard;
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SigGuard(const DxilVersionedRootSignatureDesc *pOrig, const DxilVersionedRootSignatureDesc *pGuard)
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: Orig(pOrig), Guard(pGuard) { }
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~SigGuard() {
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if (Orig != Guard) {
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DeleteRootSignature(Guard);
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}
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}
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};
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SigGuard S(pVersionedRootSignature, pUpconvertedRS);
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const DxilRootSignatureDesc1 *pRootSignature = &pUpconvertedRS->Desc_1_1;
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// Flags (assume they are bits that can be combined with OR).
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if ((pRootSignature->Flags & ~DxilRootSignatureFlags::ValidFlags) != DxilRootSignatureFlags::None) {
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EAT(DiagPrinter << "Unsupported bit-flag set (root signature flags "
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<< std::hex << (uint32_t)pRootSignature->Flags << ").\n");
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}
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m_RootSignatureFlags = pRootSignature->Flags;
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for (unsigned iRP = 0; iRP < pRootSignature->NumParameters; iRP++) {
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const DxilRootParameter1 *pSlot = &pRootSignature->pParameters[iRP];
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// Shader visibility.
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DxilShaderVisibility Visibility = pSlot->ShaderVisibility;
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if (!IsDxilShaderVisibility(Visibility)) {
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EAT(DiagPrinter << "Unsupported ShaderVisibility value " << (uint32_t)Visibility
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<< " (root parameter [" << iRP << "]).\n");
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}
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DxilRootParameterType ParameterType = pSlot->ParameterType;
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switch (ParameterType) {
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case DxilRootParameterType::DescriptorTable: {
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DescriptorTableVerifier DTV;
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DTV.Verify(pSlot->DescriptorTable.pDescriptorRanges,
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pSlot->DescriptorTable.NumDescriptorRanges, iRP, DiagPrinter);
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for (unsigned iDTS = 0; iDTS < pSlot->DescriptorTable.NumDescriptorRanges; iDTS++) {
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const DxilDescriptorRange1 *pRange = &pSlot->DescriptorTable.pDescriptorRanges[iDTS];
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unsigned RangeFlags = (unsigned)pRange->Flags;
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// Verify range flags.
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if (RangeFlags & ~(unsigned)DxilDescriptorRangeFlags::ValidFlags) {
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EAT(DiagPrinter << "Unsupported bit-flag set (descriptor range flags "
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<< (uint32_t)pRange->Flags << ").\n");
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}
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switch (pRange->RangeType) {
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case DxilDescriptorRangeType::Sampler: {
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if (RangeFlags & (unsigned)(DxilDescriptorRangeFlags::DataVolatile |
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DxilDescriptorRangeFlags::DataStatic |
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DxilDescriptorRangeFlags::DataStaticWhileSetAtExecute)) {
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EAT(DiagPrinter << "Sampler descriptor ranges can't specify DATA_* flags "
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<< "since there is no data pointed to by samplers "
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<< "(descriptor range flags " << (uint32_t)pRange->Flags << ").\n");
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}
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break;
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}
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default: {
|
|
unsigned NumDataFlags = 0;
|
|
if (RangeFlags & (unsigned)DxilDescriptorRangeFlags::DataVolatile) { NumDataFlags++; }
|
|
if (RangeFlags & (unsigned)DxilDescriptorRangeFlags::DataStatic) { NumDataFlags++; }
|
|
if (RangeFlags & (unsigned)DxilDescriptorRangeFlags::DataStaticWhileSetAtExecute) { NumDataFlags++; }
|
|
if (NumDataFlags > 1) {
|
|
EAT(DiagPrinter << "Descriptor range flags cannot specify more than one DATA_* flag "
|
|
<< "at a time (descriptor range flags " << (uint32_t)pRange->Flags << ").\n");
|
|
}
|
|
if ((RangeFlags & (unsigned)DxilDescriptorRangeFlags::DataStatic) &&
|
|
(RangeFlags & (unsigned)DxilDescriptorRangeFlags::DescriptorsVolatile)) {
|
|
EAT(DiagPrinter << "Descriptor range flags cannot specify DESCRIPTORS_VOLATILE with the DATA_STATIC flag at the same time (descriptor range flags " << (uint32_t)pRange->Flags << "). "
|
|
<< "DATA_STATIC_WHILE_SET_AT_EXECUTE is fine to combine with DESCRIPTORS_VOLATILE, since DESCRIPTORS_VOLATILE still requires descriptors don't change during execution. \n");
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
AddRegisterRange(iRP,
|
|
DESCRIPTOR_TABLE_ENTRY,
|
|
iDTS,
|
|
pRange->RangeType,
|
|
Visibility,
|
|
pRange->NumDescriptors,
|
|
pRange->BaseShaderRegister,
|
|
pRange->RegisterSpace,
|
|
DiagPrinter);
|
|
}
|
|
break;
|
|
}
|
|
|
|
case DxilRootParameterType::Constants32Bit:
|
|
AddRegisterRange(iRP,
|
|
ROOT_CONSTANT,
|
|
(unsigned)-1,
|
|
DxilDescriptorRangeType::CBV,
|
|
Visibility,
|
|
1,
|
|
pSlot->Constants.ShaderRegister,
|
|
pSlot->Constants.RegisterSpace,
|
|
DiagPrinter);
|
|
break;
|
|
|
|
case DxilRootParameterType::CBV:
|
|
case DxilRootParameterType::SRV:
|
|
case DxilRootParameterType::UAV: {
|
|
// Verify root descriptor flags.
|
|
unsigned Flags = (unsigned)pSlot->Descriptor.Flags;
|
|
if (Flags & ~(unsigned)DxilRootDescriptorFlags::ValidFlags) {
|
|
EAT(DiagPrinter << "Unsupported bit-flag set (root descriptor flags " << std::hex << Flags << ").\n");
|
|
}
|
|
|
|
unsigned NumDataFlags = 0;
|
|
if (Flags & (unsigned)DxilRootDescriptorFlags::DataVolatile) { NumDataFlags++; }
|
|
if (Flags & (unsigned)DxilRootDescriptorFlags::DataStatic) { NumDataFlags++; }
|
|
if (Flags & (unsigned)DxilRootDescriptorFlags::DataStaticWhileSetAtExecute) { NumDataFlags++; }
|
|
if (NumDataFlags > 1) {
|
|
EAT(DiagPrinter << "Root descriptor flags cannot specify more "
|
|
<< "than one DATA_* flag at a time (root "
|
|
<< "descriptor flags " << NumDataFlags << ").\n");
|
|
}
|
|
|
|
AddRegisterRange(iRP, ROOT_DESCRIPTOR, (unsigned)-1,
|
|
GetRangeType(ParameterType), Visibility, 1,
|
|
pSlot->Descriptor.ShaderRegister,
|
|
pSlot->Descriptor.RegisterSpace, DiagPrinter);
|
|
break;
|
|
}
|
|
|
|
default:
|
|
static_assert(DxilRootParameterType::UAV == DxilRootParameterType::MaxValue,
|
|
"otherwise, need to add cases here.");
|
|
EAT(DiagPrinter << "Unsupported ParameterType value " << (uint32_t)ParameterType
|
|
<< " (root parameter " << iRP << ")\n");
|
|
}
|
|
}
|
|
|
|
for (unsigned iSS = 0; iSS < pRootSignature->NumStaticSamplers; iSS++) {
|
|
const DxilStaticSamplerDesc *pSS = &pRootSignature->pStaticSamplers[iSS];
|
|
// Shader visibility.
|
|
DxilShaderVisibility Visibility = pSS->ShaderVisibility;
|
|
if (!IsDxilShaderVisibility(Visibility)) {
|
|
EAT(DiagPrinter << "Unsupported ShaderVisibility value " << (uint32_t)Visibility
|
|
<< " (static sampler [" << iSS << "]).\n");
|
|
}
|
|
|
|
StaticSamplerVerifier SSV;
|
|
SSV.Verify(pSS, DiagPrinter);
|
|
AddRegisterRange(iSS, STATIC_SAMPLER, (unsigned)-1,
|
|
DxilDescriptorRangeType::Sampler, Visibility, 1,
|
|
pSS->ShaderRegister, pSS->RegisterSpace, DiagPrinter);
|
|
}
|
|
}
|
|
|
|
void RootSignatureVerifier::VerifyShader(DxilShaderVisibility VisType,
|
|
const void *pPSVData,
|
|
uint32_t PSVSize,
|
|
DiagnosticPrinter &DiagPrinter) {
|
|
DxilPipelineStateValidation PSV;
|
|
IFTBOOL(PSV.InitFromPSV0(pPSVData, PSVSize), E_INVALIDARG);
|
|
|
|
bool bShaderDeniedByRootSig = false;
|
|
switch (VisType) {
|
|
case DxilShaderVisibility::Vertex:
|
|
if ((m_RootSignatureFlags & DxilRootSignatureFlags::DenyVertexShaderRootAccess) != DxilRootSignatureFlags::None) {
|
|
bShaderDeniedByRootSig = true;
|
|
}
|
|
break;
|
|
case DxilShaderVisibility::Hull:
|
|
if ((m_RootSignatureFlags & DxilRootSignatureFlags::DenyHullShaderRootAccess) != DxilRootSignatureFlags::None) {
|
|
bShaderDeniedByRootSig = true;
|
|
}
|
|
break;
|
|
case DxilShaderVisibility::Domain:
|
|
if ((m_RootSignatureFlags & DxilRootSignatureFlags::DenyDomainShaderRootAccess) != DxilRootSignatureFlags::None) {
|
|
bShaderDeniedByRootSig = true;
|
|
}
|
|
break;
|
|
case DxilShaderVisibility::Geometry:
|
|
if ((m_RootSignatureFlags & DxilRootSignatureFlags::DenyGeometryShaderRootAccess) != DxilRootSignatureFlags::None) {
|
|
bShaderDeniedByRootSig = true;
|
|
}
|
|
break;
|
|
case DxilShaderVisibility::Pixel:
|
|
if ((m_RootSignatureFlags & DxilRootSignatureFlags::DenyPixelShaderRootAccess) != DxilRootSignatureFlags::None) {
|
|
bShaderDeniedByRootSig = true;
|
|
}
|
|
break;
|
|
case DxilShaderVisibility::Amplification:
|
|
if ((m_RootSignatureFlags & DxilRootSignatureFlags::DenyAmplificationShaderRootAccess) != DxilRootSignatureFlags::None) {
|
|
bShaderDeniedByRootSig = true;
|
|
}
|
|
break;
|
|
case DxilShaderVisibility::Mesh:
|
|
if ((m_RootSignatureFlags & DxilRootSignatureFlags::DenyMeshShaderRootAccess) != DxilRootSignatureFlags::None) {
|
|
bShaderDeniedByRootSig = true;
|
|
}
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
bool bShaderHasRootBindings = false;
|
|
|
|
for (unsigned iResource = 0; iResource < PSV.GetBindCount(); iResource++) {
|
|
const PSVResourceBindInfo0 *pBindInfo0 = PSV.GetPSVResourceBindInfo0(iResource);
|
|
DXASSERT_NOMSG(pBindInfo0);
|
|
|
|
unsigned Space = pBindInfo0->Space;
|
|
unsigned LB = pBindInfo0->LowerBound;
|
|
unsigned UB = pBindInfo0->UpperBound;
|
|
unsigned Num = (UB != UINT_MAX) ? (UB - LB + 1) : 1;
|
|
PSVResourceType ResType = (PSVResourceType)pBindInfo0->ResType;
|
|
|
|
switch(ResType) {
|
|
case PSVResourceType::Sampler: {
|
|
bShaderHasRootBindings = true;
|
|
auto pCoveringRange = FindCoveringInterval(DxilDescriptorRangeType::Sampler, VisType, Num, LB, Space);
|
|
if(!pCoveringRange) {
|
|
EAT(DiagPrinter << "Shader sampler descriptor range (RegisterSpace=" << Space
|
|
<< ", NumDescriptors=" << Num << ", BaseShaderRegister=" << LB
|
|
<< ") is not fully bound in root signature.\n");
|
|
}
|
|
break;
|
|
}
|
|
|
|
case PSVResourceType::SRVTyped:
|
|
case PSVResourceType::SRVRaw:
|
|
case PSVResourceType::SRVStructured: {
|
|
bShaderHasRootBindings = true;
|
|
auto pCoveringRange = FindCoveringInterval(DxilDescriptorRangeType::SRV, VisType, Num, LB, Space);
|
|
if (pCoveringRange) {
|
|
if(pCoveringRange->nt == ROOT_DESCRIPTOR && ResType == PSVResourceType::SRVTyped) {
|
|
EAT(DiagPrinter << "A Shader is declaring a resource object as a texture using "
|
|
<< "a register mapped to a root descriptor SRV (RegisterSpace=" << Space
|
|
<< ", ShaderRegister=" << LB << "). "
|
|
<< "SRV or UAV root descriptors can only be Raw or Structured buffers.\n");
|
|
}
|
|
}
|
|
else {
|
|
EAT(DiagPrinter << "Shader SRV descriptor range (RegisterSpace=" << Space
|
|
<< ", NumDescriptors=" << Num << ", BaseShaderRegister=" << LB
|
|
<< ") is not fully bound in root signature.\n");
|
|
}
|
|
break;
|
|
}
|
|
|
|
case PSVResourceType::UAVTyped:
|
|
case PSVResourceType::UAVRaw:
|
|
case PSVResourceType::UAVStructured:
|
|
case PSVResourceType::UAVStructuredWithCounter: {
|
|
bShaderHasRootBindings = true;
|
|
auto pCoveringRange = FindCoveringInterval(DxilDescriptorRangeType::UAV, VisType, Num, LB, Space);
|
|
if (pCoveringRange) {
|
|
if (pCoveringRange->nt == ROOT_DESCRIPTOR) {
|
|
if (ResType == PSVResourceType::UAVTyped) {
|
|
EAT(DiagPrinter << "A shader is declaring a typed UAV using a register mapped "
|
|
<< "to a root descriptor UAV (RegisterSpace=" << Space
|
|
<< ", ShaderRegister=" << LB << "). "
|
|
<< "SRV or UAV root descriptors can only be Raw or Structured buffers.\n");
|
|
}
|
|
if (ResType == PSVResourceType::UAVStructuredWithCounter) {
|
|
EAT(DiagPrinter << "A Shader is declaring a structured UAV with counter using "
|
|
<< "a register mapped to a root descriptor UAV (RegisterSpace=" << Space
|
|
<< ", ShaderRegister=" << LB << "). "
|
|
<< "SRV or UAV root descriptors can only be Raw or Structured buffers.\n");
|
|
}
|
|
}
|
|
}
|
|
else {
|
|
EAT(DiagPrinter << "Shader UAV descriptor range (RegisterSpace=" << Space
|
|
<< ", NumDescriptors=" << Num << ", BaseShaderRegister=" << LB
|
|
<< ") is not fully bound in root signature.\n");
|
|
}
|
|
break;
|
|
}
|
|
|
|
case PSVResourceType::CBV: {
|
|
bShaderHasRootBindings = true;
|
|
auto pCoveringRange = FindCoveringInterval(DxilDescriptorRangeType::CBV, VisType, Num, LB, Space);
|
|
if (!pCoveringRange) {
|
|
EAT(DiagPrinter << "Shader CBV descriptor range (RegisterSpace=" << Space
|
|
<< ", NumDescriptors=" << Num << ", BaseShaderRegister=" << LB
|
|
<< ") is not fully bound in root signature.\n");
|
|
}
|
|
break;
|
|
}
|
|
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (bShaderHasRootBindings && bShaderDeniedByRootSig) {
|
|
EAT(DiagPrinter << "Shader has root bindings but root signature uses a DENY flag "
|
|
<< "to disallow root binding access to the shader stage.\n");
|
|
}
|
|
}
|
|
|
|
BOOL isNaN(const float &a) {
|
|
static const unsigned exponentMask = 0x7f800000;
|
|
static const unsigned mantissaMask = 0x007fffff;
|
|
unsigned u = *(const unsigned *)&a;
|
|
return (((u & exponentMask) == exponentMask) && (u & mantissaMask)); // NaN
|
|
}
|
|
|
|
static bool IsDxilTextureAddressMode(DxilTextureAddressMode v) {
|
|
return DxilTextureAddressMode::Wrap <= v &&
|
|
v <= DxilTextureAddressMode::MirrorOnce;
|
|
}
|
|
static bool IsDxilComparisonFunc(DxilComparisonFunc v) {
|
|
return DxilComparisonFunc::Never <= v && v <= DxilComparisonFunc::Always;
|
|
}
|
|
|
|
// This validation closely mirrors CCreateSamplerStateValidator's checks
|
|
void StaticSamplerVerifier::Verify(const DxilStaticSamplerDesc* pDesc,
|
|
DiagnosticPrinter &DiagPrinter) {
|
|
if (!pDesc) {
|
|
EAT(DiagPrinter << "Static sampler: A nullptr pSamplerDesc was specified.\n");
|
|
}
|
|
|
|
bool bIsComparison = false;
|
|
switch (pDesc->Filter) {
|
|
case DxilFilter::MINIMUM_MIN_MAG_MIP_POINT:
|
|
case DxilFilter::MINIMUM_MIN_MAG_POINT_MIP_LINEAR:
|
|
case DxilFilter::MINIMUM_MIN_POINT_MAG_LINEAR_MIP_POINT:
|
|
case DxilFilter::MINIMUM_MIN_POINT_MAG_MIP_LINEAR:
|
|
case DxilFilter::MINIMUM_MIN_LINEAR_MAG_MIP_POINT:
|
|
case DxilFilter::MINIMUM_MIN_LINEAR_MAG_POINT_MIP_LINEAR:
|
|
case DxilFilter::MINIMUM_MIN_MAG_LINEAR_MIP_POINT:
|
|
case DxilFilter::MINIMUM_MIN_MAG_MIP_LINEAR:
|
|
case DxilFilter::MINIMUM_ANISOTROPIC:
|
|
case DxilFilter::MAXIMUM_MIN_MAG_MIP_POINT:
|
|
case DxilFilter::MAXIMUM_MIN_MAG_POINT_MIP_LINEAR:
|
|
case DxilFilter::MAXIMUM_MIN_POINT_MAG_LINEAR_MIP_POINT:
|
|
case DxilFilter::MAXIMUM_MIN_POINT_MAG_MIP_LINEAR:
|
|
case DxilFilter::MAXIMUM_MIN_LINEAR_MAG_MIP_POINT:
|
|
case DxilFilter::MAXIMUM_MIN_LINEAR_MAG_POINT_MIP_LINEAR:
|
|
case DxilFilter::MAXIMUM_MIN_MAG_LINEAR_MIP_POINT:
|
|
case DxilFilter::MAXIMUM_MIN_MAG_MIP_LINEAR:
|
|
case DxilFilter::MAXIMUM_ANISOTROPIC:
|
|
break;
|
|
case DxilFilter::MIN_MAG_MIP_POINT:
|
|
case DxilFilter::MIN_MAG_POINT_MIP_LINEAR:
|
|
case DxilFilter::MIN_POINT_MAG_LINEAR_MIP_POINT:
|
|
case DxilFilter::MIN_POINT_MAG_MIP_LINEAR:
|
|
case DxilFilter::MIN_LINEAR_MAG_MIP_POINT:
|
|
case DxilFilter::MIN_LINEAR_MAG_POINT_MIP_LINEAR:
|
|
case DxilFilter::MIN_MAG_LINEAR_MIP_POINT:
|
|
case DxilFilter::MIN_MAG_MIP_LINEAR:
|
|
case DxilFilter::ANISOTROPIC:
|
|
break;
|
|
case DxilFilter::COMPARISON_MIN_MAG_MIP_POINT:
|
|
case DxilFilter::COMPARISON_MIN_MAG_POINT_MIP_LINEAR:
|
|
case DxilFilter::COMPARISON_MIN_POINT_MAG_LINEAR_MIP_POINT:
|
|
case DxilFilter::COMPARISON_MIN_POINT_MAG_MIP_LINEAR:
|
|
case DxilFilter::COMPARISON_MIN_LINEAR_MAG_MIP_POINT:
|
|
case DxilFilter::COMPARISON_MIN_LINEAR_MAG_POINT_MIP_LINEAR:
|
|
case DxilFilter::COMPARISON_MIN_MAG_LINEAR_MIP_POINT:
|
|
case DxilFilter::COMPARISON_MIN_MAG_MIP_LINEAR:
|
|
case DxilFilter::COMPARISON_ANISOTROPIC:
|
|
bIsComparison = true;
|
|
break;
|
|
default:
|
|
EAT(DiagPrinter << "Static sampler: Filter unrecognized.\n");
|
|
}
|
|
|
|
if (!IsDxilTextureAddressMode(pDesc->AddressU)) {
|
|
EAT(DiagPrinter << "Static sampler: AddressU unrecognized.\n");
|
|
}
|
|
if (!IsDxilTextureAddressMode(pDesc->AddressV)) {
|
|
EAT(DiagPrinter << "Static sampler: AddressV unrecognized.\n");
|
|
}
|
|
if (!IsDxilTextureAddressMode(pDesc->AddressW)) {
|
|
EAT(DiagPrinter << "Static sampler: AddressW unrecognized.\n");
|
|
}
|
|
|
|
if (isNaN(pDesc->MipLODBias) || (pDesc->MipLODBias < DxilMipLodBiaxMin) ||
|
|
(pDesc->MipLODBias > DxilMipLodBiaxMax)) {
|
|
EAT(DiagPrinter << "Static sampler: MipLODBias must be in the "
|
|
<< "range [" << DxilMipLodBiaxMin << " to " << DxilMipLodBiaxMax
|
|
<<"]. " << pDesc->MipLODBias << "specified.\n");
|
|
}
|
|
|
|
if (pDesc->MaxAnisotropy > DxilMapAnisotropy) {
|
|
EAT(DiagPrinter << "Static sampler: MaxAnisotropy must be in "
|
|
<< "the range [0 to " << DxilMapAnisotropy << "]. "
|
|
<< pDesc->MaxAnisotropy << " specified.\n");
|
|
}
|
|
|
|
if (bIsComparison && !IsDxilComparisonFunc(pDesc->ComparisonFunc)) {
|
|
EAT(DiagPrinter << "Static sampler: ComparisonFunc unrecognized.");
|
|
}
|
|
|
|
if (isNaN(pDesc->MinLOD)) {
|
|
EAT(DiagPrinter << "Static sampler: MinLOD be in the range [-INF to +INF]. "
|
|
<< pDesc->MinLOD << " specified.\n");
|
|
}
|
|
|
|
if (isNaN(pDesc->MaxLOD)) {
|
|
EAT(DiagPrinter << "Static sampler: MaxLOD be in the range [-INF to +INF]. "
|
|
<< pDesc->MaxLOD << " specified.\n");
|
|
}
|
|
}
|
|
|
|
static DxilShaderVisibility GetVisibilityType(DXIL::ShaderKind ShaderKind) {
|
|
switch(ShaderKind) {
|
|
case DXIL::ShaderKind::Pixel: return DxilShaderVisibility::Pixel;
|
|
case DXIL::ShaderKind::Vertex: return DxilShaderVisibility::Vertex;
|
|
case DXIL::ShaderKind::Geometry: return DxilShaderVisibility::Geometry;
|
|
case DXIL::ShaderKind::Hull: return DxilShaderVisibility::Hull;
|
|
case DXIL::ShaderKind::Domain: return DxilShaderVisibility::Domain;
|
|
case DXIL::ShaderKind::Amplification: return DxilShaderVisibility::Amplification;
|
|
case DXIL::ShaderKind::Mesh: return DxilShaderVisibility::Mesh;
|
|
default: return DxilShaderVisibility::All;
|
|
}
|
|
}
|
|
|
|
_Use_decl_annotations_
|
|
bool VerifyRootSignatureWithShaderPSV(const DxilVersionedRootSignatureDesc *pDesc,
|
|
DXIL::ShaderKind ShaderKind,
|
|
const void *pPSVData,
|
|
uint32_t PSVSize,
|
|
llvm::raw_ostream &DiagStream) {
|
|
try {
|
|
RootSignatureVerifier RSV;
|
|
DiagnosticPrinterRawOStream DiagPrinter(DiagStream);
|
|
RSV.VerifyRootSignature(pDesc, DiagPrinter);
|
|
RSV.VerifyShader(GetVisibilityType(ShaderKind), pPSVData, PSVSize, DiagPrinter);
|
|
} catch (...) {
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
bool VerifyRootSignature(_In_ const DxilVersionedRootSignatureDesc *pDesc,
|
|
_In_ llvm::raw_ostream &DiagStream,
|
|
_In_ bool bAllowReservedRegisterSpace) {
|
|
try {
|
|
RootSignatureVerifier RSV;
|
|
RSV.AllowReservedRegisterSpace(bAllowReservedRegisterSpace);
|
|
DiagnosticPrinterRawOStream DiagPrinter(DiagStream);
|
|
RSV.VerifyRootSignature(pDesc, DiagPrinter);
|
|
} catch (...) {
|
|
return false;
|
|
}
|
|
|
|
return true;
|
|
}
|
|
|
|
} // namespace hlsl
|