[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
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/*
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* Atmel PIO2 Port Multiplexer support
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*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/clk.h>
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#include <linux/debugfs.h>
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#include <linux/fs.h>
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#include <linux/platform_device.h>
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2007-02-05 18:57:13 +03:00
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#include <linux/irq.h>
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
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2007-02-05 18:57:13 +03:00
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#include <asm/gpio.h>
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
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#include <asm/io.h>
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2008-08-05 15:57:38 +04:00
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#include <mach/portmux.h>
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
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#include "pio.h"
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#define MAX_NR_PIO_DEVICES 8
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struct pio_device {
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2008-02-05 09:28:28 +03:00
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struct gpio_chip chip;
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
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void __iomem *regs;
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const struct platform_device *pdev;
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struct clk *clk;
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2006-12-04 15:46:52 +03:00
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u32 pinmux_mask;
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2007-02-05 18:57:13 +03:00
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char name[8];
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
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};
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static struct pio_device pio_dev[MAX_NR_PIO_DEVICES];
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2006-12-04 15:46:52 +03:00
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static struct pio_device *gpio_to_pio(unsigned int gpio)
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
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{
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struct pio_device *pio;
|
2006-12-04 15:46:52 +03:00
|
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unsigned int index;
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
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2006-12-04 15:46:52 +03:00
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index = gpio >> 5;
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if (index >= MAX_NR_PIO_DEVICES)
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return NULL;
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pio = &pio_dev[index];
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if (!pio->regs)
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return NULL;
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
|
2006-12-04 15:46:52 +03:00
|
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|
return pio;
|
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|
}
|
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/* Pin multiplexing API */
|
2008-09-24 12:30:47 +04:00
|
|
|
static DEFINE_SPINLOCK(pio_lock);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
|
2008-09-24 12:30:47 +04:00
|
|
|
void __init at32_select_periph(unsigned int port, u32 pin_mask,
|
|
|
|
unsigned int periph, unsigned long flags)
|
2006-12-04 15:46:52 +03:00
|
|
|
{
|
|
|
|
struct pio_device *pio;
|
|
|
|
|
2008-09-24 12:30:47 +04:00
|
|
|
/* assign and verify pio */
|
|
|
|
pio = gpio_to_pio(port);
|
2006-12-04 15:46:52 +03:00
|
|
|
if (unlikely(!pio)) {
|
2008-09-24 12:30:47 +04:00
|
|
|
printk(KERN_WARNING "pio: invalid port %u\n", port);
|
2006-12-04 15:46:52 +03:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2008-09-24 12:30:47 +04:00
|
|
|
/* Test if any of the requested pins is already muxed */
|
|
|
|
spin_lock(&pio_lock);
|
|
|
|
if (unlikely(pio->pinmux_mask & pin_mask)) {
|
|
|
|
printk(KERN_WARNING "%s: pin(s) busy (requested 0x%x, busy 0x%x)\n",
|
|
|
|
pio->name, pin_mask, pio->pinmux_mask & pin_mask);
|
|
|
|
spin_unlock(&pio_lock);
|
2006-12-04 15:46:52 +03:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2008-09-24 12:30:47 +04:00
|
|
|
pio->pinmux_mask |= pin_mask;
|
|
|
|
|
|
|
|
/* enable pull ups */
|
|
|
|
pio_writel(pio, PUER, pin_mask);
|
|
|
|
|
|
|
|
/* select either peripheral A or B */
|
2006-12-04 15:46:52 +03:00
|
|
|
if (periph)
|
2008-09-24 12:30:47 +04:00
|
|
|
pio_writel(pio, BSR, pin_mask);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
else
|
2008-09-24 12:30:47 +04:00
|
|
|
pio_writel(pio, ASR, pin_mask);
|
|
|
|
|
|
|
|
/* enable peripheral control */
|
|
|
|
pio_writel(pio, PDR, pin_mask);
|
2006-12-04 15:46:52 +03:00
|
|
|
|
2008-09-24 12:30:47 +04:00
|
|
|
/* Disable pull ups if not requested. */
|
2006-12-04 15:46:52 +03:00
|
|
|
if (!(flags & AT32_GPIOF_PULLUP))
|
2008-09-24 12:30:47 +04:00
|
|
|
pio_writel(pio, PUDR, pin_mask);
|
|
|
|
|
|
|
|
spin_unlock(&pio_lock);
|
2006-12-04 15:46:52 +03:00
|
|
|
|
|
|
|
return;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
dump_stack();
|
|
|
|
}
|
|
|
|
|
|
|
|
void __init at32_select_gpio(unsigned int pin, unsigned long flags)
|
|
|
|
{
|
|
|
|
struct pio_device *pio;
|
|
|
|
unsigned int pin_index = pin & 0x1f;
|
|
|
|
u32 mask = 1 << pin_index;
|
|
|
|
|
|
|
|
pio = gpio_to_pio(pin);
|
|
|
|
if (unlikely(!pio)) {
|
|
|
|
printk("pio: invalid pin %u\n", pin);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (unlikely(test_and_set_bit(pin_index, &pio->pinmux_mask))) {
|
|
|
|
printk("%s: pin %u is busy\n", pio->name, pin_index);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2007-02-05 18:57:13 +03:00
|
|
|
if (flags & AT32_GPIOF_OUTPUT) {
|
|
|
|
if (flags & AT32_GPIOF_HIGH)
|
|
|
|
pio_writel(pio, SODR, mask);
|
|
|
|
else
|
|
|
|
pio_writel(pio, CODR, mask);
|
2007-08-09 16:55:34 +04:00
|
|
|
if (flags & AT32_GPIOF_MULTIDRV)
|
|
|
|
pio_writel(pio, MDER, mask);
|
|
|
|
else
|
|
|
|
pio_writel(pio, MDDR, mask);
|
2007-02-05 18:57:13 +03:00
|
|
|
pio_writel(pio, PUDR, mask);
|
2006-12-04 15:46:52 +03:00
|
|
|
pio_writel(pio, OER, mask);
|
2007-02-05 18:57:13 +03:00
|
|
|
} else {
|
|
|
|
if (flags & AT32_GPIOF_PULLUP)
|
|
|
|
pio_writel(pio, PUER, mask);
|
|
|
|
else
|
|
|
|
pio_writel(pio, PUDR, mask);
|
|
|
|
if (flags & AT32_GPIOF_DEGLITCH)
|
|
|
|
pio_writel(pio, IFER, mask);
|
|
|
|
else
|
|
|
|
pio_writel(pio, IFDR, mask);
|
2006-12-04 15:46:52 +03:00
|
|
|
pio_writel(pio, ODR, mask);
|
2007-02-05 18:57:13 +03:00
|
|
|
}
|
2006-12-04 15:46:52 +03:00
|
|
|
|
|
|
|
pio_writel(pio, PER, mask);
|
2007-02-05 18:57:13 +03:00
|
|
|
|
2006-12-04 15:46:52 +03:00
|
|
|
return;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
dump_stack();
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
}
|
|
|
|
|
2008-09-19 19:13:28 +04:00
|
|
|
/*
|
|
|
|
* Undo a previous pin reservation. Will not affect the hardware
|
|
|
|
* configuration.
|
|
|
|
*/
|
|
|
|
void at32_deselect_pin(unsigned int pin)
|
|
|
|
{
|
|
|
|
struct pio_device *pio;
|
|
|
|
unsigned int pin_index = pin & 0x1f;
|
|
|
|
|
|
|
|
pio = gpio_to_pio(pin);
|
|
|
|
if (unlikely(!pio)) {
|
|
|
|
printk("pio: invalid pin %u\n", pin);
|
|
|
|
dump_stack();
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
clear_bit(pin_index, &pio->pinmux_mask);
|
|
|
|
}
|
|
|
|
|
2007-01-30 13:01:23 +03:00
|
|
|
/* Reserve a pin, preventing anyone else from changing its configuration. */
|
2008-11-05 01:37:10 +03:00
|
|
|
void __init at32_reserve_pin(unsigned int port, u32 pin_mask)
|
2007-01-30 13:01:23 +03:00
|
|
|
{
|
|
|
|
struct pio_device *pio;
|
|
|
|
|
2008-11-05 01:37:10 +03:00
|
|
|
/* assign and verify pio */
|
|
|
|
pio = gpio_to_pio(port);
|
2007-01-30 13:01:23 +03:00
|
|
|
if (unlikely(!pio)) {
|
2008-11-05 01:37:10 +03:00
|
|
|
printk(KERN_WARNING "pio: invalid port %u\n", port);
|
2007-01-30 13:01:23 +03:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2008-11-05 01:37:10 +03:00
|
|
|
/* Test if any of the requested pins is already muxed */
|
|
|
|
spin_lock(&pio_lock);
|
|
|
|
if (unlikely(pio->pinmux_mask & pin_mask)) {
|
|
|
|
printk(KERN_WARNING "%s: pin(s) busy (req. 0x%x, busy 0x%x)\n",
|
|
|
|
pio->name, pin_mask, pio->pinmux_mask & pin_mask);
|
|
|
|
spin_unlock(&pio_lock);
|
2007-01-30 13:01:23 +03:00
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
2008-11-05 01:37:10 +03:00
|
|
|
/* Reserve pins */
|
|
|
|
pio->pinmux_mask |= pin_mask;
|
|
|
|
spin_unlock(&pio_lock);
|
2007-01-30 13:01:23 +03:00
|
|
|
return;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
dump_stack();
|
|
|
|
}
|
2007-02-05 18:57:13 +03:00
|
|
|
|
|
|
|
/*--------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
/* GPIO API */
|
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
static int direction_input(struct gpio_chip *chip, unsigned offset)
|
2007-02-05 18:57:13 +03:00
|
|
|
{
|
2008-02-05 09:28:28 +03:00
|
|
|
struct pio_device *pio = container_of(chip, struct pio_device, chip);
|
|
|
|
u32 mask = 1 << offset;
|
2007-02-05 18:57:13 +03:00
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
if (!(pio_readl(pio, PSR) & mask))
|
|
|
|
return -EINVAL;
|
2007-02-05 18:57:13 +03:00
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
pio_writel(pio, ODR, mask);
|
2007-02-05 18:57:13 +03:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
static int gpio_get(struct gpio_chip *chip, unsigned offset)
|
2007-02-05 18:57:13 +03:00
|
|
|
{
|
2008-02-05 09:28:28 +03:00
|
|
|
struct pio_device *pio = container_of(chip, struct pio_device, chip);
|
2007-02-05 18:57:13 +03:00
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
return (pio_readl(pio, PDSR) >> offset) & 1;
|
2007-02-05 18:57:13 +03:00
|
|
|
}
|
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
static void gpio_set(struct gpio_chip *chip, unsigned offset, int value);
|
2007-02-05 18:57:13 +03:00
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
static int direction_output(struct gpio_chip *chip, unsigned offset, int value)
|
2007-02-05 18:57:13 +03:00
|
|
|
{
|
2008-02-05 09:28:28 +03:00
|
|
|
struct pio_device *pio = container_of(chip, struct pio_device, chip);
|
|
|
|
u32 mask = 1 << offset;
|
2007-02-05 18:57:13 +03:00
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
if (!(pio_readl(pio, PSR) & mask))
|
|
|
|
return -EINVAL;
|
2007-02-05 18:57:13 +03:00
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
gpio_set(chip, offset, value);
|
|
|
|
pio_writel(pio, OER, mask);
|
2007-02-05 18:57:13 +03:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
static void gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
2007-02-05 18:57:13 +03:00
|
|
|
{
|
2008-02-05 09:28:28 +03:00
|
|
|
struct pio_device *pio = container_of(chip, struct pio_device, chip);
|
|
|
|
u32 mask = 1 << offset;
|
2007-02-05 18:57:13 +03:00
|
|
|
|
|
|
|
if (value)
|
|
|
|
pio_writel(pio, SODR, mask);
|
|
|
|
else
|
|
|
|
pio_writel(pio, CODR, mask);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*--------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
/* GPIO IRQ support */
|
|
|
|
|
|
|
|
static void gpio_irq_mask(unsigned irq)
|
|
|
|
{
|
|
|
|
unsigned gpio = irq_to_gpio(irq);
|
|
|
|
struct pio_device *pio = &pio_dev[gpio >> 5];
|
|
|
|
|
|
|
|
pio_writel(pio, IDR, 1 << (gpio & 0x1f));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void gpio_irq_unmask(unsigned irq)
|
|
|
|
{
|
|
|
|
unsigned gpio = irq_to_gpio(irq);
|
|
|
|
struct pio_device *pio = &pio_dev[gpio >> 5];
|
|
|
|
|
|
|
|
pio_writel(pio, IER, 1 << (gpio & 0x1f));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int gpio_irq_type(unsigned irq, unsigned type)
|
|
|
|
{
|
|
|
|
if (type != IRQ_TYPE_EDGE_BOTH && type != IRQ_TYPE_NONE)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct irq_chip gpio_irqchip = {
|
|
|
|
.name = "gpio",
|
|
|
|
.mask = gpio_irq_mask,
|
|
|
|
.unmask = gpio_irq_unmask,
|
|
|
|
.set_type = gpio_irq_type,
|
|
|
|
};
|
|
|
|
|
|
|
|
static void gpio_irq_handler(unsigned irq, struct irq_desc *desc)
|
|
|
|
{
|
|
|
|
struct pio_device *pio = get_irq_chip_data(irq);
|
|
|
|
unsigned gpio_irq;
|
|
|
|
|
|
|
|
gpio_irq = (unsigned) get_irq_data(irq);
|
|
|
|
for (;;) {
|
|
|
|
u32 isr;
|
|
|
|
struct irq_desc *d;
|
|
|
|
|
|
|
|
/* ack pending GPIO interrupts */
|
|
|
|
isr = pio_readl(pio, ISR) & pio_readl(pio, IMR);
|
|
|
|
if (!isr)
|
|
|
|
break;
|
|
|
|
do {
|
|
|
|
int i;
|
|
|
|
|
|
|
|
i = ffs(isr) - 1;
|
|
|
|
isr &= ~(1 << i);
|
|
|
|
|
|
|
|
i += gpio_irq;
|
|
|
|
d = &irq_desc[i];
|
|
|
|
|
|
|
|
d->handle_irq(i, d);
|
|
|
|
} while (isr);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __init
|
|
|
|
gpio_irq_setup(struct pio_device *pio, int irq, int gpio_irq)
|
|
|
|
{
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
set_irq_chip_data(irq, pio);
|
|
|
|
set_irq_data(irq, (void *) gpio_irq);
|
|
|
|
|
|
|
|
for (i = 0; i < 32; i++, gpio_irq++) {
|
|
|
|
set_irq_chip_data(gpio_irq, pio);
|
|
|
|
set_irq_chip_and_handler(gpio_irq, &gpio_irqchip,
|
|
|
|
handle_simple_irq);
|
|
|
|
}
|
|
|
|
|
|
|
|
set_irq_chained_handler(irq, gpio_irq_handler);
|
|
|
|
}
|
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
/*--------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_FS
|
|
|
|
|
|
|
|
#include <linux/seq_file.h>
|
|
|
|
|
|
|
|
/*
|
|
|
|
* This shows more info than the generic gpio dump code:
|
|
|
|
* pullups, deglitching, open drain drive.
|
|
|
|
*/
|
|
|
|
static void pio_bank_show(struct seq_file *s, struct gpio_chip *chip)
|
|
|
|
{
|
|
|
|
struct pio_device *pio = container_of(chip, struct pio_device, chip);
|
|
|
|
u32 psr, osr, imr, pdsr, pusr, ifsr, mdsr;
|
|
|
|
unsigned i;
|
|
|
|
u32 mask;
|
|
|
|
char bank;
|
|
|
|
|
|
|
|
psr = pio_readl(pio, PSR);
|
|
|
|
osr = pio_readl(pio, OSR);
|
|
|
|
imr = pio_readl(pio, IMR);
|
|
|
|
pdsr = pio_readl(pio, PDSR);
|
|
|
|
pusr = pio_readl(pio, PUSR);
|
|
|
|
ifsr = pio_readl(pio, IFSR);
|
|
|
|
mdsr = pio_readl(pio, MDSR);
|
|
|
|
|
|
|
|
bank = 'A' + pio->pdev->id;
|
|
|
|
|
|
|
|
for (i = 0, mask = 1; i < 32; i++, mask <<= 1) {
|
|
|
|
const char *label;
|
|
|
|
|
|
|
|
label = gpiochip_is_requested(chip, i);
|
2008-06-10 15:55:52 +04:00
|
|
|
if (!label && (imr & mask))
|
|
|
|
label = "[irq]";
|
2008-02-05 09:28:28 +03:00
|
|
|
if (!label)
|
|
|
|
continue;
|
|
|
|
|
|
|
|
seq_printf(s, " gpio-%-3d P%c%-2d (%-12s) %s %s %s",
|
|
|
|
chip->base + i, bank, i,
|
|
|
|
label,
|
|
|
|
(osr & mask) ? "out" : "in ",
|
|
|
|
(mask & pdsr) ? "hi" : "lo",
|
|
|
|
(mask & pusr) ? " " : "up");
|
|
|
|
if (ifsr & mask)
|
|
|
|
seq_printf(s, " deglitch");
|
|
|
|
if ((osr & mdsr) & mask)
|
|
|
|
seq_printf(s, " open-drain");
|
|
|
|
if (imr & mask)
|
|
|
|
seq_printf(s, " irq-%d edge-both",
|
|
|
|
gpio_to_irq(chip->base + i));
|
|
|
|
seq_printf(s, "\n");
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
#define pio_bank_show NULL
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
2007-02-05 18:57:13 +03:00
|
|
|
/*--------------------------------------------------------------------------*/
|
|
|
|
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
static int __init pio_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct pio_device *pio = NULL;
|
2007-02-05 18:57:13 +03:00
|
|
|
int irq = platform_get_irq(pdev, 0);
|
|
|
|
int gpio_irq_base = GPIO_IRQ_BASE + pdev->id * 32;
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
|
|
|
|
BUG_ON(pdev->id >= MAX_NR_PIO_DEVICES);
|
|
|
|
pio = &pio_dev[pdev->id];
|
|
|
|
BUG_ON(!pio->regs);
|
|
|
|
|
2008-02-05 09:28:28 +03:00
|
|
|
pio->chip.label = pio->name;
|
|
|
|
pio->chip.base = pdev->id * 32;
|
|
|
|
pio->chip.ngpio = 32;
|
gpio: sysfs interface
This adds a simple sysfs interface for GPIOs.
/sys/class/gpio
/export ... asks the kernel to export a GPIO to userspace
/unexport ... to return a GPIO to the kernel
/gpioN ... for each exported GPIO #N
/value ... always readable, writes fail for input GPIOs
/direction ... r/w as: in, out (default low); write high, low
/gpiochipN ... for each gpiochip; #N is its first GPIO
/base ... (r/o) same as N
/label ... (r/o) descriptive, not necessarily unique
/ngpio ... (r/o) number of GPIOs; numbered N .. N+(ngpio - 1)
GPIOs claimed by kernel code may be exported by its owner using a new
gpio_export() call, which should be most useful for driver debugging.
Such exports may optionally be done without a "direction" attribute.
Userspace may ask to take over a GPIO by writing to a sysfs control file,
helping to cope with incomplete board support or other "one-off"
requirements that don't merit full kernel support:
echo 23 > /sys/class/gpio/export
... will gpio_request(23, "sysfs") and gpio_export(23);
use /sys/class/gpio/gpio-23/direction to (re)configure it,
when that GPIO can be used as both input and output.
echo 23 > /sys/class/gpio/unexport
... will gpio_free(23), when it was exported as above
The extra D-space footprint is a few hundred bytes, except for the sysfs
resources associated with each exported GPIO. The additional I-space
footprint is about two thirds of the current size of gpiolib (!). Since
no /dev node creation is involved, no "udev" support is needed.
Related changes:
* This adds a device pointer to "struct gpio_chip". When GPIO
providers initialize that, sysfs gpio class devices become children of
that device instead of being "virtual" devices.
* The (few) gpio_chip providers which have such a device node have
been updated.
* Some gpio_chip drivers also needed to update their module "owner"
field ... for which missing kerneldoc was added.
* Some gpio_chips don't support input GPIOs. Those GPIOs are now
flagged appropriately when the chip is registered.
Based on previous patches, and discussion both on and off LKML.
A Documentation/ABI/testing/sysfs-gpio update is ready to submit once this
merges to mainline.
[akpm@linux-foundation.org: a few maintenance build fixes]
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Cc: Guennadi Liakhovetski <g.liakhovetski@pengutronix.de>
Cc: Greg KH <greg@kroah.com>
Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2008-07-25 12:46:07 +04:00
|
|
|
pio->chip.dev = &pdev->dev;
|
|
|
|
pio->chip.owner = THIS_MODULE;
|
2008-02-05 09:28:28 +03:00
|
|
|
|
|
|
|
pio->chip.direction_input = direction_input;
|
|
|
|
pio->chip.get = gpio_get;
|
|
|
|
pio->chip.direction_output = direction_output;
|
|
|
|
pio->chip.set = gpio_set;
|
|
|
|
pio->chip.dbg_show = pio_bank_show;
|
|
|
|
|
|
|
|
gpiochip_add(&pio->chip);
|
|
|
|
|
2007-02-05 18:57:13 +03:00
|
|
|
gpio_irq_setup(pio, irq, gpio_irq_base);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
|
|
|
|
platform_set_drvdata(pdev, pio);
|
|
|
|
|
2007-02-05 18:57:13 +03:00
|
|
|
printk(KERN_DEBUG "%s: base 0x%p, irq %d chains %d..%d\n",
|
|
|
|
pio->name, pio->regs, irq, gpio_irq_base, gpio_irq_base + 31);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct platform_driver pio_driver = {
|
|
|
|
.driver = {
|
|
|
|
.name = "pio",
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init pio_init(void)
|
|
|
|
{
|
2008-09-22 01:52:07 +04:00
|
|
|
return platform_driver_probe(&pio_driver, pio_probe);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
}
|
2007-02-05 18:57:13 +03:00
|
|
|
postcore_initcall(pio_init);
|
[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
|
|
|
|
|
|
|
void __init at32_init_pio(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct resource *regs;
|
|
|
|
struct pio_device *pio;
|
|
|
|
|
|
|
|
if (pdev->id > MAX_NR_PIO_DEVICES) {
|
|
|
|
dev_err(&pdev->dev, "only %d PIO devices supported\n",
|
|
|
|
MAX_NR_PIO_DEVICES);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
pio = &pio_dev[pdev->id];
|
|
|
|
snprintf(pio->name, sizeof(pio->name), "pio%d", pdev->id);
|
|
|
|
|
|
|
|
regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!regs) {
|
|
|
|
dev_err(&pdev->dev, "no mmio resource defined\n");
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
pio->clk = clk_get(&pdev->dev, "mck");
|
|
|
|
if (IS_ERR(pio->clk))
|
|
|
|
/*
|
|
|
|
* This is a fatal error, but if we continue we might
|
|
|
|
* be so lucky that we manage to initialize the
|
|
|
|
* console and display this message...
|
|
|
|
*/
|
|
|
|
dev_err(&pdev->dev, "no mck clock defined\n");
|
|
|
|
else
|
|
|
|
clk_enable(pio->clk);
|
|
|
|
|
|
|
|
pio->pdev = pdev;
|
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pio->regs = ioremap(regs->start, regs->end - regs->start + 1);
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2007-02-05 18:57:13 +03:00
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/* start with irqs disabled and acked */
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pio_writel(pio, IDR, ~0UL);
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(void) pio_readl(pio, ISR);
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[PATCH] avr32 architecture
This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.
AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density. The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.
The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf
The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture. It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit. It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.
Full data sheet is available from
http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf
while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from
http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf
Information about the AT32STK1000 development board can be found at
http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918
including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.
Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.
This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.
[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Signed-off-by: Dave McCracken <dmccr@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-09-26 10:32:13 +04:00
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}
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