2018-05-18 00:44:15 +03:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* This file implements the error recovery as a core part of PCIe error
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* reporting. When a PCIe error is delivered, an error message will be
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* collected and printed to console, then, an error recovery procedure
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* will be executed by following the PCI error recovery rules.
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*
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* Copyright (C) 2006 Intel Corp.
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* Tom Long Nguyen (tom.l.nguyen@intel.com)
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* Zhang Yanmin (yanmin.zhang@intel.com)
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*/
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2019-12-14 01:46:05 +03:00
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#define dev_fmt(fmt) "AER: " fmt
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2018-05-18 00:44:15 +03:00
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#include <linux/pci.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/aer.h>
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#include "portdrv.h"
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#include "../pci.h"
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static pci_ers_result_t merge_result(enum pci_ers_result orig,
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enum pci_ers_result new)
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{
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if (new == PCI_ERS_RESULT_NO_AER_DRIVER)
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return PCI_ERS_RESULT_NO_AER_DRIVER;
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if (new == PCI_ERS_RESULT_NONE)
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return orig;
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switch (orig) {
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case PCI_ERS_RESULT_CAN_RECOVER:
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case PCI_ERS_RESULT_RECOVERED:
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orig = new;
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break;
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case PCI_ERS_RESULT_DISCONNECT:
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if (new == PCI_ERS_RESULT_NEED_RESET)
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orig = PCI_ERS_RESULT_NEED_RESET;
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break;
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default:
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break;
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}
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return orig;
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}
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2018-09-20 19:27:14 +03:00
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static int report_error_detected(struct pci_dev *dev,
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2020-07-02 19:26:49 +03:00
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pci_channel_state_t state,
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2018-09-20 19:27:14 +03:00
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enum pci_ers_result *result)
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2018-05-18 00:44:15 +03:00
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{
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pci_ers_result_t vote;
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const struct pci_error_handlers *err_handler;
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device_lock(&dev->dev);
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2018-09-20 19:27:16 +03:00
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if (!pci_dev_set_io_state(dev, state) ||
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!dev->driver ||
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2018-05-18 00:44:15 +03:00
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!dev->driver->err_handler ||
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!dev->driver->err_handler->error_detected) {
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/*
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PCI/ERR: Run error recovery callbacks for all affected devices
If an Endpoint reported an error with ERR_FATAL, we previously ran driver
error recovery callbacks only for the Endpoint's driver. But if we reset a
Link to recover from the error, all downstream components are affected,
including the Endpoint, any multi-function peers, and children of those
peers.
Initiate the Link reset from the deepest Downstream Port that is
reliable, and call the error recovery callbacks for all its children.
If a Downstream Port (including a Root Port) reports an error, we assume
the Port itself is reliable and we need to reset its downstream Link. In
all other cases (Switch Upstream Ports, Endpoints, Bridges, etc), we assume
the Link leading to the component needs to be reset, so we initiate the
reset at the parent Downstream Port.
This allows two other clean-ups. First, we currently only use a Link
reset, which can only be initiated using a Downstream Port, so we can
remove checks for Endpoints. Second, the Downstream Port where we initiate
the Link reset is reliable (unlike components downstream from it), so the
special cases for error detect and resume are no longer necessary.
Signed-off-by: Keith Busch <keith.busch@intel.com>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Sinan Kaya <okaya@kernel.org>
2018-09-20 19:27:13 +03:00
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* If any device in the subtree does not have an error_detected
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* callback, PCI_ERS_RESULT_NO_AER_DRIVER prevents subsequent
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* error callbacks of "any" device in the subtree, and will
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* exit in the disconnected error state.
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2018-05-18 00:44:15 +03:00
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*/
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2019-12-13 14:44:34 +03:00
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if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
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2018-05-18 00:44:15 +03:00
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vote = PCI_ERS_RESULT_NO_AER_DRIVER;
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2019-12-14 01:46:05 +03:00
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pci_info(dev, "can't recover (no error_detected callback)\n");
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2019-12-13 14:44:34 +03:00
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} else {
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2018-05-18 00:44:15 +03:00
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vote = PCI_ERS_RESULT_NONE;
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2019-12-13 14:44:34 +03:00
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}
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2018-05-18 00:44:15 +03:00
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} else {
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err_handler = dev->driver->err_handler;
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2018-09-20 19:27:14 +03:00
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vote = err_handler->error_detected(dev, state);
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2018-05-18 00:44:15 +03:00
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}
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2018-09-20 19:27:15 +03:00
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pci_uevent_ers(dev, vote);
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2018-09-20 19:27:14 +03:00
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*result = merge_result(*result, vote);
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2018-05-18 00:44:15 +03:00
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device_unlock(&dev->dev);
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return 0;
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}
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2018-09-20 19:27:14 +03:00
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static int report_frozen_detected(struct pci_dev *dev, void *data)
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{
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return report_error_detected(dev, pci_channel_io_frozen, data);
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}
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static int report_normal_detected(struct pci_dev *dev, void *data)
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{
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return report_error_detected(dev, pci_channel_io_normal, data);
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}
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2018-05-18 00:44:15 +03:00
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static int report_mmio_enabled(struct pci_dev *dev, void *data)
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{
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2018-09-20 19:27:14 +03:00
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pci_ers_result_t vote, *result = data;
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2018-05-18 00:44:15 +03:00
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const struct pci_error_handlers *err_handler;
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device_lock(&dev->dev);
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if (!dev->driver ||
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!dev->driver->err_handler ||
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!dev->driver->err_handler->mmio_enabled)
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goto out;
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err_handler = dev->driver->err_handler;
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vote = err_handler->mmio_enabled(dev);
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2018-09-20 19:27:14 +03:00
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*result = merge_result(*result, vote);
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2018-05-18 00:44:15 +03:00
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out:
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device_unlock(&dev->dev);
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return 0;
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}
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static int report_slot_reset(struct pci_dev *dev, void *data)
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{
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2018-09-20 19:27:14 +03:00
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pci_ers_result_t vote, *result = data;
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2018-05-18 00:44:15 +03:00
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const struct pci_error_handlers *err_handler;
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device_lock(&dev->dev);
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if (!dev->driver ||
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!dev->driver->err_handler ||
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!dev->driver->err_handler->slot_reset)
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goto out;
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err_handler = dev->driver->err_handler;
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vote = err_handler->slot_reset(dev);
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2018-09-20 19:27:14 +03:00
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*result = merge_result(*result, vote);
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2018-05-18 00:44:15 +03:00
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out:
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device_unlock(&dev->dev);
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return 0;
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}
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static int report_resume(struct pci_dev *dev, void *data)
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{
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const struct pci_error_handlers *err_handler;
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device_lock(&dev->dev);
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2018-09-20 19:27:16 +03:00
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if (!pci_dev_set_io_state(dev, pci_channel_io_normal) ||
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!dev->driver ||
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2018-05-18 00:44:15 +03:00
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!dev->driver->err_handler ||
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!dev->driver->err_handler->resume)
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goto out;
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err_handler = dev->driver->err_handler;
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err_handler->resume(dev);
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out:
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2018-09-20 19:27:15 +03:00
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pci_uevent_ers(dev, PCI_ERS_RESULT_RECOVERED);
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2018-05-18 00:44:15 +03:00
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device_unlock(&dev->dev);
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return 0;
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}
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PCI/ERR: Return status of pcie_do_recovery()
As per the DPC Enhancements ECN [1], sec 4.5.1, table 4-4, if the OS
supports Error Disconnect Recover (EDR), it must invalidate the software
state associated with child devices of the port without attempting to
access the child device hardware. In addition, if the OS supports DPC, it
must attempt to recover the child devices if the port implements the DPC
Capability. If the OS continues operation, the OS must inform the firmware
of the status of the recovery operation via the _OST method.
Return the result of pcie_do_recovery() so we can report it to firmware via
_OST.
[1] Downstream Port Containment Related Enhancements ECN, Jan 28, 2019,
affecting PCI Firmware Specification, Rev. 3.2
https://members.pcisig.com/wg/PCI-SIG/document/12888
Link: https://lore.kernel.org/r/eb60ec89448769349c6722954ffbf2de163155b5.1585000084.git.sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-03-24 03:26:03 +03:00
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pci_ers_result_t pcie_do_recovery(struct pci_dev *dev,
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2020-11-21 03:10:25 +03:00
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pci_channel_state_t state,
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pci_ers_result_t (*reset_subordinates)(struct pci_dev *pdev))
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2018-05-18 00:44:15 +03:00
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{
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2020-11-21 03:10:27 +03:00
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int type = pci_pcie_type(dev);
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2020-11-21 03:10:28 +03:00
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struct pci_dev *bridge;
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2018-09-20 19:27:14 +03:00
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struct pci_bus *bus;
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2020-11-21 03:10:28 +03:00
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pci_ers_result_t status = PCI_ERS_RESULT_CAN_RECOVER;
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2018-05-18 00:44:15 +03:00
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PCI/ERR: Run error recovery callbacks for all affected devices
If an Endpoint reported an error with ERR_FATAL, we previously ran driver
error recovery callbacks only for the Endpoint's driver. But if we reset a
Link to recover from the error, all downstream components are affected,
including the Endpoint, any multi-function peers, and children of those
peers.
Initiate the Link reset from the deepest Downstream Port that is
reliable, and call the error recovery callbacks for all its children.
If a Downstream Port (including a Root Port) reports an error, we assume
the Port itself is reliable and we need to reset its downstream Link. In
all other cases (Switch Upstream Ports, Endpoints, Bridges, etc), we assume
the Link leading to the component needs to be reset, so we initiate the
reset at the parent Downstream Port.
This allows two other clean-ups. First, we currently only use a Link
reset, which can only be initiated using a Downstream Port, so we can
remove checks for Endpoints. Second, the Downstream Port where we initiate
the Link reset is reliable (unlike components downstream from it), so the
special cases for error detect and resume are no longer necessary.
Signed-off-by: Keith Busch <keith.busch@intel.com>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Sinan Kaya <okaya@kernel.org>
2018-09-20 19:27:13 +03:00
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/*
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2020-11-21 03:10:28 +03:00
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* Error recovery runs on all subordinates of the bridge. If the
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* bridge detected the error, it is cleared at the end.
|
PCI/ERR: Run error recovery callbacks for all affected devices
If an Endpoint reported an error with ERR_FATAL, we previously ran driver
error recovery callbacks only for the Endpoint's driver. But if we reset a
Link to recover from the error, all downstream components are affected,
including the Endpoint, any multi-function peers, and children of those
peers.
Initiate the Link reset from the deepest Downstream Port that is
reliable, and call the error recovery callbacks for all its children.
If a Downstream Port (including a Root Port) reports an error, we assume
the Port itself is reliable and we need to reset its downstream Link. In
all other cases (Switch Upstream Ports, Endpoints, Bridges, etc), we assume
the Link leading to the component needs to be reset, so we initiate the
reset at the parent Downstream Port.
This allows two other clean-ups. First, we currently only use a Link
reset, which can only be initiated using a Downstream Port, so we can
remove checks for Endpoints. Second, the Downstream Port where we initiate
the Link reset is reliable (unlike components downstream from it), so the
special cases for error detect and resume are no longer necessary.
Signed-off-by: Keith Busch <keith.busch@intel.com>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Sinan Kaya <okaya@kernel.org>
2018-09-20 19:27:13 +03:00
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*/
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2020-11-21 03:10:27 +03:00
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if (!(type == PCI_EXP_TYPE_ROOT_PORT ||
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type == PCI_EXP_TYPE_DOWNSTREAM))
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2020-11-21 03:10:28 +03:00
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bridge = pci_upstream_bridge(dev);
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else
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bridge = dev;
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PCI/ERR: Run error recovery callbacks for all affected devices
If an Endpoint reported an error with ERR_FATAL, we previously ran driver
error recovery callbacks only for the Endpoint's driver. But if we reset a
Link to recover from the error, all downstream components are affected,
including the Endpoint, any multi-function peers, and children of those
peers.
Initiate the Link reset from the deepest Downstream Port that is
reliable, and call the error recovery callbacks for all its children.
If a Downstream Port (including a Root Port) reports an error, we assume
the Port itself is reliable and we need to reset its downstream Link. In
all other cases (Switch Upstream Ports, Endpoints, Bridges, etc), we assume
the Link leading to the component needs to be reset, so we initiate the
reset at the parent Downstream Port.
This allows two other clean-ups. First, we currently only use a Link
reset, which can only be initiated using a Downstream Port, so we can
remove checks for Endpoints. Second, the Downstream Port where we initiate
the Link reset is reliable (unlike components downstream from it), so the
special cases for error detect and resume are no longer necessary.
Signed-off-by: Keith Busch <keith.busch@intel.com>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Sinan Kaya <okaya@kernel.org>
2018-09-20 19:27:13 +03:00
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2020-11-21 03:10:28 +03:00
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bus = bridge->subordinate;
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pci_dbg(bridge, "broadcast error_detected message\n");
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2020-03-28 01:33:24 +03:00
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if (state == pci_channel_io_frozen) {
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2018-09-20 19:27:14 +03:00
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pci_walk_bus(bus, report_frozen_detected, &status);
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2020-11-21 03:10:28 +03:00
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status = reset_subordinates(bridge);
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2020-03-24 03:26:02 +03:00
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if (status != PCI_ERS_RESULT_RECOVERED) {
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2020-11-21 03:10:28 +03:00
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pci_warn(bridge, "subordinate device reset failed\n");
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2020-03-28 01:33:24 +03:00
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goto failed;
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2020-03-24 03:26:02 +03:00
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}
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2020-03-28 01:33:24 +03:00
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} else {
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2018-09-20 19:27:14 +03:00
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pci_walk_bus(bus, report_normal_detected, &status);
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2020-03-28 01:33:24 +03:00
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}
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2018-09-20 19:27:12 +03:00
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2018-09-20 19:27:14 +03:00
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if (status == PCI_ERS_RESULT_CAN_RECOVER) {
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status = PCI_ERS_RESULT_RECOVERED;
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2020-11-21 03:10:28 +03:00
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pci_dbg(bridge, "broadcast mmio_enabled message\n");
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2018-09-20 19:27:14 +03:00
|
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pci_walk_bus(bus, report_mmio_enabled, &status);
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}
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2018-05-18 00:44:15 +03:00
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if (status == PCI_ERS_RESULT_NEED_RESET) {
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/*
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* TODO: Should call platform-specific
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* functions to reset slot before calling
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* drivers' slot_reset callbacks?
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*/
|
2018-09-20 19:27:14 +03:00
|
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status = PCI_ERS_RESULT_RECOVERED;
|
2020-11-21 03:10:28 +03:00
|
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pci_dbg(bridge, "broadcast slot_reset message\n");
|
2018-09-20 19:27:14 +03:00
|
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pci_walk_bus(bus, report_slot_reset, &status);
|
2018-05-18 00:44:15 +03:00
|
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}
|
|
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if (status != PCI_ERS_RESULT_RECOVERED)
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goto failed;
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|
2020-11-21 03:10:28 +03:00
|
|
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pci_dbg(bridge, "broadcast resume message\n");
|
2018-09-20 19:27:14 +03:00
|
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pci_walk_bus(bus, report_resume, &status);
|
2018-05-18 00:44:15 +03:00
|
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|
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2020-11-21 03:10:28 +03:00
|
|
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if (pcie_aer_is_native(bridge))
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|
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pcie_clear_device_status(bridge);
|
|
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pci_aer_clear_nonfatal_status(bridge);
|
|
|
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pci_info(bridge, "device recovery successful\n");
|
PCI/ERR: Return status of pcie_do_recovery()
As per the DPC Enhancements ECN [1], sec 4.5.1, table 4-4, if the OS
supports Error Disconnect Recover (EDR), it must invalidate the software
state associated with child devices of the port without attempting to
access the child device hardware. In addition, if the OS supports DPC, it
must attempt to recover the child devices if the port implements the DPC
Capability. If the OS continues operation, the OS must inform the firmware
of the status of the recovery operation via the _OST method.
Return the result of pcie_do_recovery() so we can report it to firmware via
_OST.
[1] Downstream Port Containment Related Enhancements ECN, Jan 28, 2019,
affecting PCI Firmware Specification, Rev. 3.2
https://members.pcisig.com/wg/PCI-SIG/document/12888
Link: https://lore.kernel.org/r/eb60ec89448769349c6722954ffbf2de163155b5.1585000084.git.sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-03-24 03:26:03 +03:00
|
|
|
return status;
|
2018-05-18 00:44:15 +03:00
|
|
|
|
|
|
|
failed:
|
2020-11-21 03:10:28 +03:00
|
|
|
pci_uevent_ers(bridge, PCI_ERS_RESULT_DISCONNECT);
|
2018-05-18 00:44:15 +03:00
|
|
|
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|
/* TODO: Should kernel panic here? */
|
2020-11-21 03:10:28 +03:00
|
|
|
pci_info(bridge, "device recovery failed\n");
|
PCI/ERR: Return status of pcie_do_recovery()
As per the DPC Enhancements ECN [1], sec 4.5.1, table 4-4, if the OS
supports Error Disconnect Recover (EDR), it must invalidate the software
state associated with child devices of the port without attempting to
access the child device hardware. In addition, if the OS supports DPC, it
must attempt to recover the child devices if the port implements the DPC
Capability. If the OS continues operation, the OS must inform the firmware
of the status of the recovery operation via the _OST method.
Return the result of pcie_do_recovery() so we can report it to firmware via
_OST.
[1] Downstream Port Containment Related Enhancements ECN, Jan 28, 2019,
affecting PCI Firmware Specification, Rev. 3.2
https://members.pcisig.com/wg/PCI-SIG/document/12888
Link: https://lore.kernel.org/r/eb60ec89448769349c6722954ffbf2de163155b5.1585000084.git.sathyanarayanan.kuppuswamy@linux.intel.com
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2020-03-24 03:26:03 +03:00
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return status;
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2018-05-18 00:44:15 +03:00
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}
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