2005-04-17 02:20:36 +04:00
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/*
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* boot.c - Architecture-Specific Low-Level ACPI Boot Support
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*
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* Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
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* Copyright (C) 2001 Jun Nakajima <jun.nakajima@intel.com>
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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*/
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#include <linux/init.h>
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#include <linux/acpi.h>
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2007-02-16 12:27:57 +03:00
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#include <linux/acpi_pmtmr.h>
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2005-04-17 02:20:36 +04:00
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#include <linux/efi.h>
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2006-09-26 12:52:35 +04:00
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#include <linux/cpumask.h>
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2016-07-14 03:18:56 +03:00
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#include <linux/export.h>
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2005-06-26 01:54:42 +04:00
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#include <linux/dmi.h>
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2005-09-30 20:34:42 +04:00
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#include <linux/irq.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 11:04:11 +03:00
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#include <linux/slab.h>
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2018-10-31 01:09:49 +03:00
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#include <linux/memblock.h>
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2006-09-26 12:52:39 +04:00
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#include <linux/ioport.h>
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2009-05-06 21:06:15 +04:00
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#include <linux/pci.h>
|
2017-01-31 16:21:40 +03:00
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#include <linux/efi-bgrt.h>
|
2018-01-18 18:09:51 +03:00
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#include <linux/serial_core.h>
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2005-04-17 02:20:36 +04:00
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|
2017-01-27 13:59:46 +03:00
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#include <asm/e820/api.h>
|
2015-04-14 05:30:08 +03:00
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#include <asm/irqdomain.h>
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2009-08-29 18:24:51 +04:00
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#include <asm/pci_x86.h>
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2005-04-17 02:20:36 +04:00
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#include <asm/pgtable.h>
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#include <asm/io_apic.h>
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#include <asm/apic.h>
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#include <asm/io.h>
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#include <asm/mpspec.h>
|
2008-04-04 23:41:50 +04:00
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#include <asm/smp.h>
|
2014-06-09 12:19:48 +04:00
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#include <asm/i8259.h>
|
2018-10-10 09:14:56 +03:00
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#include <asm/setup.h>
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2005-04-17 02:20:36 +04:00
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|
2013-05-14 21:09:16 +04:00
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#include "sleep.h" /* To include x86_acpi_suspend_lowlevel */
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2006-09-26 12:52:35 +04:00
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static int __initdata acpi_force = 0;
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2009-05-20 07:47:38 +04:00
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int acpi_disabled;
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2006-09-26 12:52:33 +04:00
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EXPORT_SYMBOL(acpi_disabled);
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2005-04-17 02:20:36 +04:00
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#ifdef CONFIG_X86_64
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2009-01-28 19:55:37 +03:00
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# include <asm/proto.h>
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2005-08-05 08:44:28 +04:00
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#endif /* X86 */
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2005-04-17 02:20:36 +04:00
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#define PREFIX "ACPI: "
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2006-11-03 09:07:18 +03:00
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int acpi_noirq; /* skip ACPI IRQ initialization */
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2008-02-05 11:01:48 +03:00
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int acpi_pci_disabled; /* skip ACPI PCI scan and IRQ initialization */
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EXPORT_SYMBOL(acpi_pci_disabled);
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2005-04-17 02:20:36 +04:00
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int acpi_lapic;
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int acpi_ioapic;
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int acpi_strict;
|
2013-07-01 19:38:54 +04:00
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int acpi_disable_cmcff;
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2005-04-17 02:20:36 +04:00
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|
2017-12-16 00:25:10 +03:00
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/* ACPI SCI override configuration */
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2007-02-02 19:48:22 +03:00
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u8 acpi_sci_flags __initdata;
|
2017-12-16 00:25:10 +03:00
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u32 acpi_sci_override_gsi __initdata = INVALID_ACPI_IRQ;
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2005-04-17 02:20:36 +04:00
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int acpi_skip_timer_override __initdata;
|
2006-11-14 18:57:46 +03:00
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int acpi_use_timer_override __initdata;
|
2011-02-24 17:53:46 +03:00
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int acpi_fix_pin2_polarity __initdata;
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2005-04-17 02:20:36 +04:00
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#ifdef CONFIG_X86_LOCAL_APIC
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static u64 acpi_lapic_addr __initdata = APIC_DEFAULT_PHYS_BASE;
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#endif
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2016-10-21 11:44:49 +03:00
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#ifdef CONFIG_X86_IO_APIC
|
2014-11-02 09:04:29 +03:00
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/*
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* Locks related to IOAPIC hotplug
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* Hotplug side:
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* ->device_hotplug_lock
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* ->acpi_ioapic_lock
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* ->ioapic_lock
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* Interrupt mapping side:
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* ->acpi_ioapic_lock
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* ->ioapic_mutex
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* ->ioapic_lock
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*/
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static DEFINE_MUTEX(acpi_ioapic_lock);
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2016-10-21 11:44:49 +03:00
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#endif
|
2014-11-02 09:04:29 +03:00
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2005-04-17 02:20:36 +04:00
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/* --------------------------------------------------------------------------
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Boot-time Configuration
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-------------------------------------------------------------------------- */
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/*
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* The default interrupt routing model is PIC (8259). This gets
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2007-10-20 03:13:56 +04:00
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* overridden if IOAPICs are enumerated (below).
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2005-04-17 02:20:36 +04:00
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*/
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2005-08-05 08:44:28 +04:00
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enum acpi_irq_model_id acpi_irq_model = ACPI_IRQ_MODEL_PIC;
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2005-04-17 02:20:36 +04:00
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|
2010-03-30 12:07:15 +04:00
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/*
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* ISA irqs by default are the first 16 gsis but can be
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* any gsi as specified by an interrupt source override.
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*/
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static u32 isa_irq_to_gsi[NR_IRQS_LEGACY] __read_mostly = {
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
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};
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2005-04-17 02:20:36 +04:00
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/*
|
2017-07-18 00:10:00 +03:00
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* This is just a simple wrapper around early_memremap(),
|
2013-07-23 17:03:24 +04:00
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* with sanity checks for phys == 0 and size == 0.
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2005-04-17 02:20:36 +04:00
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*/
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2017-07-18 18:04:17 +03:00
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void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size)
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2005-04-17 02:20:36 +04:00
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{
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|
2008-07-10 07:16:36 +04:00
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if (!phys || !size)
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return NULL;
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|
2017-07-18 00:10:00 +03:00
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return early_memremap(phys, size);
|
2009-02-08 02:39:41 +03:00
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}
|
2013-07-23 17:03:24 +04:00
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2017-07-18 18:04:17 +03:00
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void __init __acpi_unmap_table(void __iomem *map, unsigned long size)
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2009-02-08 02:39:41 +03:00
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{
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if (!map || !size)
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return;
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2005-04-17 02:20:36 +04:00
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|
2017-07-18 00:10:00 +03:00
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early_memunmap(map, size);
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2005-04-17 02:20:36 +04:00
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}
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#ifdef CONFIG_X86_LOCAL_APIC
|
2007-02-02 19:48:22 +03:00
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static int __init acpi_parse_madt(struct acpi_table_header *table)
|
2005-04-17 02:20:36 +04:00
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{
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2005-08-05 08:44:28 +04:00
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struct acpi_table_madt *madt = NULL;
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2005-04-17 02:20:36 +04:00
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|
2016-04-04 23:25:00 +03:00
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if (!boot_cpu_has(X86_FEATURE_APIC))
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2005-04-17 02:20:36 +04:00
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return -EINVAL;
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2007-02-02 19:48:22 +03:00
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madt = (struct acpi_table_madt *)table;
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2005-04-17 02:20:36 +04:00
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if (!madt) {
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printk(KERN_WARNING PREFIX "Unable to map MADT\n");
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return -ENODEV;
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}
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|
2007-02-02 19:48:22 +03:00
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if (madt->address) {
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acpi_lapic_addr = (u64) madt->address;
|
2005-04-17 02:20:36 +04:00
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printk(KERN_DEBUG PREFIX "Local APIC address 0x%08x\n",
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2007-02-02 19:48:22 +03:00
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madt->address);
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2005-04-17 02:20:36 +04:00
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}
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2009-01-28 05:43:47 +03:00
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default_acpi_madt_oem_check(madt->header.oem_id,
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madt->header.oem_table_id);
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2005-08-05 08:44:28 +04:00
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2005-04-17 02:20:36 +04:00
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return 0;
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}
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|
2013-09-02 07:57:36 +04:00
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/**
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* acpi_register_lapic - register a local apic and generates a logic cpu number
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* @id: local apic id to register
|
2016-06-30 18:56:36 +03:00
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* @acpiid: ACPI id to register
|
2013-09-02 07:57:36 +04:00
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* @enabled: this cpu is enabled or not
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*
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* Returns the logic cpu number which maps to the local apic
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*/
|
2016-06-30 18:56:36 +03:00
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static int acpi_register_lapic(int id, u32 acpiid, u8 enabled)
|
2008-04-04 23:41:50 +04:00
|
|
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{
|
2008-05-23 05:22:30 +04:00
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|
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unsigned int ver = 0;
|
2016-06-30 18:56:36 +03:00
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int cpu;
|
2008-05-23 05:22:30 +04:00
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|
2013-07-23 12:00:19 +04:00
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|
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if (id >= MAX_LOCAL_APIC) {
|
2010-12-17 06:09:58 +03:00
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printk(KERN_INFO PREFIX "skipped apicid that is too big\n");
|
2013-09-02 07:57:36 +04:00
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return -EINVAL;
|
2010-12-17 06:09:58 +03:00
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|
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}
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|
2017-03-03 11:02:25 +03:00
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|
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if (!enabled) {
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++disabled_cpus;
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|
return -EINVAL;
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|
|
}
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|
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|
2008-05-23 05:22:30 +04:00
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|
|
if (boot_cpu_physical_apicid != -1U)
|
2016-09-13 21:12:32 +03:00
|
|
|
ver = boot_cpu_apic_version;
|
2008-05-23 05:22:30 +04:00
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|
2017-03-03 11:02:25 +03:00
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|
|
cpu = generic_processor_info(id, ver);
|
2016-06-30 18:56:36 +03:00
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if (cpu >= 0)
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early_per_cpu(x86_cpu_to_acpiid, cpu) = acpiid;
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return cpu;
|
2008-04-04 23:41:50 +04:00
|
|
|
}
|
|
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|
|
2009-03-31 01:55:30 +04:00
|
|
|
static int __init
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acpi_parse_x2apic(struct acpi_subtable_header *header, const unsigned long end)
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|
|
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{
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|
|
|
struct acpi_madt_local_x2apic *processor = NULL;
|
2017-07-18 18:04:16 +03:00
|
|
|
#ifdef CONFIG_X86_X2APIC
|
2018-04-10 04:16:06 +03:00
|
|
|
u32 apic_id;
|
2011-12-22 05:45:16 +04:00
|
|
|
u8 enabled;
|
2017-07-18 18:04:16 +03:00
|
|
|
#endif
|
2009-03-31 01:55:30 +04:00
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processor = (struct acpi_madt_local_x2apic *)header;
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if (BAD_MADT_ENTRY(processor, end))
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|
|
return -EINVAL;
|
|
|
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|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
2017-07-18 18:04:16 +03:00
|
|
|
#ifdef CONFIG_X86_X2APIC
|
2011-12-22 05:45:16 +04:00
|
|
|
apic_id = processor->local_apic_id;
|
|
|
|
enabled = processor->lapic_flags & ACPI_MADT_ENABLED;
|
2017-07-18 18:04:16 +03:00
|
|
|
|
2018-04-12 04:40:52 +03:00
|
|
|
/* Ignore invalid ID */
|
|
|
|
if (apic_id == 0xffffffff)
|
|
|
|
return 0;
|
|
|
|
|
2009-03-31 01:55:30 +04:00
|
|
|
/*
|
|
|
|
* We need to register disabled CPU as well to permit
|
|
|
|
* counting disabled CPUs. This allows us to size
|
|
|
|
* cpus_possible_map more accurately, to permit
|
|
|
|
* to not preallocating memory for all NR_CPUS
|
|
|
|
* when we use CPU hotplug.
|
|
|
|
*/
|
2018-04-10 04:16:06 +03:00
|
|
|
if (!apic->apic_id_valid(apic_id)) {
|
|
|
|
if (enabled)
|
|
|
|
pr_warn(PREFIX "x2apic entry ignored\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
acpi_register_lapic(apic_id, processor->uid, enabled);
|
2009-03-31 01:55:30 +04:00
|
|
|
#else
|
|
|
|
printk(KERN_WARNING PREFIX "x2apic entry ignored\n");
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
static int __init
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_parse_lapic(struct acpi_subtable_header * header, const unsigned long end)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2007-02-02 19:48:22 +03:00
|
|
|
struct acpi_madt_local_apic *processor = NULL;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
processor = (struct acpi_madt_local_apic *)header;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
if (BAD_MADT_ENTRY(processor, end))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
2016-10-07 15:02:12 +03:00
|
|
|
/* Ignore invalid ID */
|
|
|
|
if (processor->id == 0xff)
|
|
|
|
return 0;
|
|
|
|
|
2006-02-03 23:51:50 +03:00
|
|
|
/*
|
|
|
|
* We need to register disabled CPU as well to permit
|
|
|
|
* counting disabled CPUs. This allows us to size
|
|
|
|
* cpus_possible_map more accurately, to permit
|
|
|
|
* to not preallocating memory for all NR_CPUS
|
|
|
|
* when we use CPU hotplug.
|
|
|
|
*/
|
2008-04-04 23:41:50 +04:00
|
|
|
acpi_register_lapic(processor->id, /* APIC ID */
|
2016-06-30 18:56:36 +03:00
|
|
|
processor->processor_id, /* ACPI ID */
|
2008-04-04 23:41:50 +04:00
|
|
|
processor->lapic_flags & ACPI_MADT_ENABLED);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-03-28 22:12:09 +03:00
|
|
|
static int __init
|
|
|
|
acpi_parse_sapic(struct acpi_subtable_header *header, const unsigned long end)
|
|
|
|
{
|
|
|
|
struct acpi_madt_local_sapic *processor = NULL;
|
|
|
|
|
|
|
|
processor = (struct acpi_madt_local_sapic *)header;
|
|
|
|
|
|
|
|
if (BAD_MADT_ENTRY(processor, end))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
2008-04-04 23:41:50 +04:00
|
|
|
acpi_register_lapic((processor->id << 8) | processor->eid,/* APIC ID */
|
2016-06-30 18:56:36 +03:00
|
|
|
processor->processor_id, /* ACPI ID */
|
2008-04-04 23:41:50 +04:00
|
|
|
processor->lapic_flags & ACPI_MADT_ENABLED);
|
2008-03-28 22:12:09 +03:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
static int __init
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_parse_lapic_addr_ovr(struct acpi_subtable_header * header,
|
2005-08-05 08:44:28 +04:00
|
|
|
const unsigned long end)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2007-02-02 19:48:22 +03:00
|
|
|
struct acpi_madt_local_apic_override *lapic_addr_ovr = NULL;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
lapic_addr_ovr = (struct acpi_madt_local_apic_override *)header;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
if (BAD_MADT_ENTRY(lapic_addr_ovr, end))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2016-08-12 09:57:13 +03:00
|
|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
acpi_lapic_addr = lapic_addr_ovr->address;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-03-31 01:55:30 +04:00
|
|
|
static int __init
|
|
|
|
acpi_parse_x2apic_nmi(struct acpi_subtable_header *header,
|
|
|
|
const unsigned long end)
|
|
|
|
{
|
|
|
|
struct acpi_madt_local_x2apic_nmi *x2apic_nmi = NULL;
|
|
|
|
|
|
|
|
x2apic_nmi = (struct acpi_madt_local_x2apic_nmi *)header;
|
|
|
|
|
|
|
|
if (BAD_MADT_ENTRY(x2apic_nmi, end))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
|
|
|
if (x2apic_nmi->lint != 1)
|
|
|
|
printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
static int __init
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_parse_lapic_nmi(struct acpi_subtable_header * header, const unsigned long end)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2007-02-02 19:48:22 +03:00
|
|
|
struct acpi_madt_local_apic_nmi *lapic_nmi = NULL;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
lapic_nmi = (struct acpi_madt_local_apic_nmi *)header;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
if (BAD_MADT_ENTRY(lapic_nmi, end))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
|
|
|
if (lapic_nmi->lint != 1)
|
|
|
|
printk(KERN_WARNING PREFIX "NMI not connected to LINT 1!\n");
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-08-05 08:44:28 +04:00
|
|
|
#endif /*CONFIG_X86_LOCAL_APIC */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2005-08-24 20:09:07 +04:00
|
|
|
#ifdef CONFIG_X86_IO_APIC
|
2014-06-09 12:19:33 +04:00
|
|
|
#define MP_ISA_BUS 0
|
|
|
|
|
2017-11-16 19:13:45 +03:00
|
|
|
static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
|
|
|
|
u8 trigger, u32 gsi);
|
|
|
|
|
2014-06-09 12:19:33 +04:00
|
|
|
static void __init mp_override_legacy_irq(u8 bus_irq, u8 polarity, u8 trigger,
|
|
|
|
u32 gsi)
|
|
|
|
{
|
2017-07-18 14:03:51 +03:00
|
|
|
/*
|
|
|
|
* Check bus_irq boundary.
|
|
|
|
*/
|
|
|
|
if (bus_irq >= NR_IRQS_LEGACY) {
|
|
|
|
pr_warn("Invalid bus_irq %u for legacy override\n", bus_irq);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2014-06-09 12:19:33 +04:00
|
|
|
/*
|
|
|
|
* TBD: This check is for faulty timer entries, where the override
|
|
|
|
* erroneously sets the trigger to level, resulting in a HUGE
|
|
|
|
* increase of timer interrupts!
|
|
|
|
*/
|
|
|
|
if ((bus_irq == 0) && (trigger == 3))
|
|
|
|
trigger = 1;
|
|
|
|
|
2017-11-16 19:13:45 +03:00
|
|
|
if (mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi) < 0)
|
|
|
|
return;
|
2014-06-09 12:19:38 +04:00
|
|
|
/*
|
|
|
|
* Reset default identity mapping if gsi is also an legacy IRQ,
|
|
|
|
* otherwise there will be more than one entry with the same GSI
|
|
|
|
* and acpi_isa_irq_to_gsi() may give wrong result.
|
|
|
|
*/
|
2014-06-09 12:19:48 +04:00
|
|
|
if (gsi < nr_legacy_irqs() && isa_irq_to_gsi[gsi] == gsi)
|
ACPI / x86: boot: Get rid of ACPI_INVALID_GSI
Commit 49e4b84333f3 (ACPI: Use correct IRQ when uninstalling ACPI
interrupt handler) brings a new definition for invalid ACPI IRQ,
i.e. INVALID_ACPI_IRQ, which is defined to 0xffffffff (or -1 for
unsigned value).
Get rid of a former one, which was brought in by commit 2c0a6894df19
(x86, ACPI, irq: Enhance error handling in function acpi_register_gsi()),
in favour of latter.
To clarify the rationale of changing from INT_MIN to ((unsigned)-1)
definition consider the following:
- IRQ 0 is valid one in hardware, so, better not to use it everywhere
(Linux uses 0 as NO IRQ, though it's another story)
- INT_MIN splits the range into two, while 0xffffffff reserves only the
last item
- when type casting is done in most cases 0xff, 0xffff is naturally used
as a marker of invalid HW IRQ: for example PCI INT line 0xff means
no IRQ assigned by BIOS
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-12-16 00:25:09 +03:00
|
|
|
isa_irq_to_gsi[gsi] = INVALID_ACPI_IRQ;
|
2014-06-09 12:19:33 +04:00
|
|
|
isa_irq_to_gsi[bus_irq] = gsi;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int mp_config_acpi_gsi(struct device *dev, u32 gsi, int trigger,
|
|
|
|
int polarity)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_X86_MPPARSE
|
|
|
|
struct mpc_intsrc mp_irq;
|
|
|
|
struct pci_dev *pdev;
|
|
|
|
unsigned char number;
|
|
|
|
unsigned int devfn;
|
|
|
|
int ioapic;
|
|
|
|
u8 pin;
|
|
|
|
|
|
|
|
if (!acpi_ioapic)
|
|
|
|
return 0;
|
|
|
|
if (!dev || !dev_is_pci(dev))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
pdev = to_pci_dev(dev);
|
|
|
|
number = pdev->bus->number;
|
|
|
|
devfn = pdev->devfn;
|
|
|
|
pin = pdev->pin;
|
|
|
|
/* print the entry should happen on mptable identically */
|
|
|
|
mp_irq.type = MP_INTSRC;
|
|
|
|
mp_irq.irqtype = mp_INT;
|
|
|
|
mp_irq.irqflag = (trigger == ACPI_EDGE_SENSITIVE ? 4 : 0x0c) |
|
|
|
|
(polarity == ACPI_ACTIVE_HIGH ? 1 : 3);
|
|
|
|
mp_irq.srcbus = number;
|
|
|
|
mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
|
|
|
|
ioapic = mp_find_ioapic(gsi);
|
|
|
|
mp_irq.dstapic = mpc_ioapic_id(ioapic);
|
|
|
|
mp_irq.dstirq = mp_find_ioapic_pin(ioapic, gsi);
|
|
|
|
|
|
|
|
mp_save_irq(&mp_irq);
|
|
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2017-11-16 19:13:44 +03:00
|
|
|
static int __init mp_register_ioapic_irq(u8 bus_irq, u8 polarity,
|
|
|
|
u8 trigger, u32 gsi)
|
|
|
|
{
|
|
|
|
struct mpc_intsrc mp_irq;
|
|
|
|
int ioapic, pin;
|
|
|
|
|
|
|
|
/* Convert 'gsi' to 'ioapic.pin'(INTIN#) */
|
|
|
|
ioapic = mp_find_ioapic(gsi);
|
|
|
|
if (ioapic < 0) {
|
|
|
|
pr_warn("Failed to find ioapic for gsi : %u\n", gsi);
|
|
|
|
return ioapic;
|
|
|
|
}
|
|
|
|
|
|
|
|
pin = mp_find_ioapic_pin(ioapic, gsi);
|
|
|
|
|
|
|
|
mp_irq.type = MP_INTSRC;
|
|
|
|
mp_irq.irqtype = mp_INT;
|
|
|
|
mp_irq.irqflag = (trigger << 2) | polarity;
|
|
|
|
mp_irq.srcbus = MP_ISA_BUS;
|
|
|
|
mp_irq.srcbusirq = bus_irq;
|
|
|
|
mp_irq.dstapic = mpc_ioapic_id(ioapic);
|
|
|
|
mp_irq.dstirq = pin;
|
|
|
|
|
|
|
|
mp_save_irq(&mp_irq);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
static int __init
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_parse_ioapic(struct acpi_subtable_header * header, const unsigned long end)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2007-02-02 19:48:22 +03:00
|
|
|
struct acpi_madt_io_apic *ioapic = NULL;
|
2014-06-09 12:19:54 +04:00
|
|
|
struct ioapic_domain_cfg cfg = {
|
|
|
|
.type = IOAPIC_DOMAIN_DYNAMIC,
|
2015-04-14 05:30:08 +03:00
|
|
|
.ops = &mp_ioapic_irqdomain_ops,
|
2014-06-09 12:19:54 +04:00
|
|
|
};
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
ioapic = (struct acpi_madt_io_apic *)header;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
if (BAD_MADT_ENTRY(ioapic, end))
|
|
|
|
return -EINVAL;
|
2005-08-05 08:44:28 +04:00
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
2014-06-09 12:19:54 +04:00
|
|
|
/* Statically assign IRQ numbers for IOAPICs hosting legacy IRQs */
|
|
|
|
if (ioapic->global_irq_base < nr_legacy_irqs())
|
|
|
|
cfg.type = IOAPIC_DOMAIN_LEGACY;
|
|
|
|
|
|
|
|
mp_register_ioapic(ioapic->id, ioapic->address, ioapic->global_irq_base,
|
|
|
|
&cfg);
|
2005-08-05 08:44:28 +04:00
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Parse Interrupt Source Override for the ACPI SCI
|
|
|
|
*/
|
2010-03-30 12:07:05 +04:00
|
|
|
static void __init acpi_sci_ioapic_setup(u8 bus_irq, u16 polarity, u16 trigger, u32 gsi)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
|
|
|
if (trigger == 0) /* compatible SCI trigger is level */
|
|
|
|
trigger = 3;
|
|
|
|
|
|
|
|
if (polarity == 0) /* compatible SCI polarity is low */
|
|
|
|
polarity = 3;
|
|
|
|
|
|
|
|
/* Command-line over-ride via acpi_sci= */
|
2007-02-02 19:48:22 +03:00
|
|
|
if (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK)
|
|
|
|
trigger = (acpi_sci_flags & ACPI_MADT_TRIGGER_MASK) >> 2;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
if (acpi_sci_flags & ACPI_MADT_POLARITY_MASK)
|
|
|
|
polarity = acpi_sci_flags & ACPI_MADT_POLARITY_MASK;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2017-11-16 19:13:44 +03:00
|
|
|
if (bus_irq < NR_IRQS_LEGACY)
|
|
|
|
mp_override_legacy_irq(bus_irq, polarity, trigger, gsi);
|
|
|
|
else
|
|
|
|
mp_register_ioapic_irq(bus_irq, polarity, trigger, gsi);
|
|
|
|
|
ACPI/PCI: pci_link: penalize SCI correctly
Ondrej reported that IRQs stopped working in v4.7 on several
platforms. A typical scenario, from Ondrej's VT82C694X/694X, is:
ACPI: Using PIC for interrupt routing
ACPI: PCI Interrupt Link [LNKA] (IRQs 1 3 4 5 6 7 10 *11 12 14 15)
ACPI: No IRQ available for PCI Interrupt Link [LNKA]
8139too 0000:00:0f.0: PCI INT A: no GSI
We're using PIC routing, so acpi_irq_balance == 0, and LNKA is already
active at IRQ 11. In that case, acpi_pci_link_allocate() only tries
to use the active IRQ (IRQ 11) which also happens to be the SCI.
We should penalize the SCI by PIRQ_PENALTY_PCI_USING, but
irq_get_trigger_type(11) returns something other than
IRQ_TYPE_LEVEL_LOW, so we penalize it by PIRQ_PENALTY_ISA_ALWAYS
instead, which makes acpi_pci_link_allocate() assume the IRQ isn't
available and give up.
Add acpi_penalize_sci_irq() so platforms can tell us the SCI IRQ,
trigger, and polarity directly and we don't have to depend on
irq_get_trigger_type().
Fixes: 103544d86976 (ACPI,PCI,IRQ: reduce resource requirements)
Link: http://lkml.kernel.org/r/201609251512.05657.linux@rainbow-software.org
Reported-by: Ondrej Zary <linux@rainbow-software.org>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Sinan Kaya <okaya@codeaurora.org>
Tested-by: Jonathan Liu <net147@gmail.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2016-10-24 07:31:31 +03:00
|
|
|
acpi_penalize_sci_irq(bus_irq, trigger, polarity);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* stash over-ride to indicate we've been here
|
2007-02-02 19:48:22 +03:00
|
|
|
* and for later update of acpi_gbl_FADT
|
2005-04-17 02:20:36 +04:00
|
|
|
*/
|
2006-12-02 10:27:46 +03:00
|
|
|
acpi_sci_override_gsi = gsi;
|
2005-04-17 02:20:36 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_parse_int_src_ovr(struct acpi_subtable_header * header,
|
2005-08-05 08:44:28 +04:00
|
|
|
const unsigned long end)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2007-02-02 19:48:22 +03:00
|
|
|
struct acpi_madt_interrupt_override *intsrc = NULL;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
intsrc = (struct acpi_madt_interrupt_override *)header;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
if (BAD_MADT_ENTRY(intsrc, end))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
if (intsrc->source_irq == acpi_gbl_FADT.sci_interrupt) {
|
2010-03-30 12:07:05 +04:00
|
|
|
acpi_sci_ioapic_setup(intsrc->source_irq,
|
2007-02-02 19:48:22 +03:00
|
|
|
intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
|
2010-03-30 12:07:05 +04:00
|
|
|
(intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
|
|
|
|
intsrc->global_irq);
|
2005-04-17 02:20:36 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-06-04 11:00:04 +04:00
|
|
|
if (intsrc->source_irq == 0) {
|
2011-02-24 17:53:46 +03:00
|
|
|
if (acpi_skip_timer_override) {
|
2012-06-04 11:00:04 +04:00
|
|
|
printk(PREFIX "BIOS IRQ0 override ignored.\n");
|
2011-02-24 17:53:46 +03:00
|
|
|
return 0;
|
|
|
|
}
|
2012-06-04 11:00:04 +04:00
|
|
|
|
|
|
|
if ((intsrc->global_irq == 2) && acpi_fix_pin2_polarity
|
|
|
|
&& (intsrc->inti_flags & ACPI_MADT_POLARITY_MASK)) {
|
2011-02-24 17:53:46 +03:00
|
|
|
intsrc->inti_flags &= ~ACPI_MADT_POLARITY_MASK;
|
|
|
|
printk(PREFIX "BIOS IRQ0 pin2 override: forcing polarity to high active.\n");
|
|
|
|
}
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
mp_override_legacy_irq(intsrc->source_irq,
|
|
|
|
intsrc->inti_flags & ACPI_MADT_POLARITY_MASK,
|
|
|
|
(intsrc->inti_flags & ACPI_MADT_TRIGGER_MASK) >> 2,
|
|
|
|
intsrc->global_irq);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_parse_nmi_src(struct acpi_subtable_header * header, const unsigned long end)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2007-02-02 19:48:22 +03:00
|
|
|
struct acpi_madt_nmi_source *nmi_src = NULL;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
nmi_src = (struct acpi_madt_nmi_source *)header;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
if (BAD_MADT_ENTRY(nmi_src, end))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
acpi_table_print_madt_entry(header);
|
|
|
|
|
|
|
|
/* TBD: Support nimsrc entries? */
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2005-08-05 08:44:28 +04:00
|
|
|
#endif /* CONFIG_X86_IO_APIC */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* acpi_pic_sci_set_trigger()
|
2007-02-02 19:48:22 +03:00
|
|
|
*
|
2005-04-17 02:20:36 +04:00
|
|
|
* use ELCR to set PIC-mode trigger type for SCI
|
|
|
|
*
|
|
|
|
* If a PIC-mode SCI is not recognized or gives spurious IRQ7's
|
|
|
|
* it may require Edge Trigger -- use "acpi_sci=edge"
|
|
|
|
*
|
|
|
|
* Port 0x4d0-4d1 are ECLR1 and ECLR2, the Edge/Level Control Registers
|
|
|
|
* for the 8259 PIC. bit[n] = 1 means irq[n] is Level, otherwise Edge.
|
2007-10-20 03:13:56 +04:00
|
|
|
* ECLR1 is IRQs 0-7 (IRQ 0, 1, 2 must be 0)
|
|
|
|
* ECLR2 is IRQs 8-15 (IRQ 8, 13 must be 0)
|
2005-04-17 02:20:36 +04:00
|
|
|
*/
|
|
|
|
|
2005-08-05 08:44:28 +04:00
|
|
|
void __init acpi_pic_sci_set_trigger(unsigned int irq, u16 trigger)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
|
|
|
unsigned int mask = 1 << irq;
|
|
|
|
unsigned int old, new;
|
|
|
|
|
|
|
|
/* Real old ELCR mask */
|
|
|
|
old = inb(0x4d0) | (inb(0x4d1) << 8);
|
|
|
|
|
|
|
|
/*
|
2007-10-20 03:13:56 +04:00
|
|
|
* If we use ACPI to set PCI IRQs, then we should clear ELCR
|
2005-04-17 02:20:36 +04:00
|
|
|
* since we will set it correctly as we enable the PCI irq
|
|
|
|
* routing.
|
|
|
|
*/
|
|
|
|
new = acpi_noirq ? old : 0;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Update SCI information in the ELCR, it isn't in the PCI
|
|
|
|
* routing tables..
|
|
|
|
*/
|
|
|
|
switch (trigger) {
|
2005-08-05 08:44:28 +04:00
|
|
|
case 1: /* Edge - clear */
|
2005-04-17 02:20:36 +04:00
|
|
|
new &= ~mask;
|
|
|
|
break;
|
2005-08-05 08:44:28 +04:00
|
|
|
case 3: /* Level - set */
|
2005-04-17 02:20:36 +04:00
|
|
|
new |= mask;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (old == new)
|
|
|
|
return;
|
|
|
|
|
|
|
|
printk(PREFIX "setting ELCR to %04x (from %04x)\n", new, old);
|
|
|
|
outb(new, 0x4d0);
|
|
|
|
outb(new >> 8, 0x4d1);
|
|
|
|
}
|
|
|
|
|
2014-06-10 10:13:25 +04:00
|
|
|
int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2015-01-20 05:21:05 +03:00
|
|
|
int rc, irq, trigger, polarity;
|
|
|
|
|
2015-02-16 05:11:13 +03:00
|
|
|
if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
|
|
|
|
*irqp = gsi;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-01-20 05:21:05 +03:00
|
|
|
rc = acpi_get_override_irq(gsi, &trigger, &polarity);
|
2018-01-02 17:08:36 +03:00
|
|
|
if (rc)
|
|
|
|
return rc;
|
2015-01-20 05:21:05 +03:00
|
|
|
|
2018-01-02 17:08:36 +03:00
|
|
|
trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
|
|
|
|
polarity = polarity ? ACPI_ACTIVE_LOW : ACPI_ACTIVE_HIGH;
|
|
|
|
irq = acpi_register_gsi(NULL, gsi, trigger, polarity);
|
|
|
|
if (irq < 0)
|
|
|
|
return irq;
|
|
|
|
|
|
|
|
*irqp = irq;
|
|
|
|
return 0;
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
ACPI, APEI, Generic Hardware Error Source POLL/IRQ/NMI notification type support
Generic Hardware Error Source provides a way to report platform
hardware errors (such as that from chipset). It works in so called
"Firmware First" mode, that is, hardware errors are reported to
firmware firstly, then reported to Linux by firmware. This way, some
non-standard hardware error registers or non-standard hardware link
can be checked by firmware to produce more valuable hardware error
information for Linux.
This patch adds POLL/IRQ/NMI notification types support.
Because the memory area used to transfer hardware error information
from BIOS to Linux can be determined only in NMI, IRQ or timer
handler, but general ioremap can not be used in atomic context, so a
special version of atomic ioremap is implemented for that.
Known issue:
- Error information can not be printed for recoverable errors notified
via NMI, because printk is not NMI-safe. Will fix this via delay
printing to IRQ context via irq_work or make printk NMI-safe.
v2:
- adjust printk format per comments.
Signed-off-by: Huang Ying <ying.huang@intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Len Brown <len.brown@intel.com>
2011-01-12 09:44:55 +03:00
|
|
|
EXPORT_SYMBOL_GPL(acpi_gsi_to_irq);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2010-03-30 12:07:02 +04:00
|
|
|
int acpi_isa_irq_to_gsi(unsigned isa_irq, u32 *gsi)
|
|
|
|
{
|
2014-06-09 12:19:48 +04:00
|
|
|
if (isa_irq < nr_legacy_irqs() &&
|
ACPI / x86: boot: Get rid of ACPI_INVALID_GSI
Commit 49e4b84333f3 (ACPI: Use correct IRQ when uninstalling ACPI
interrupt handler) brings a new definition for invalid ACPI IRQ,
i.e. INVALID_ACPI_IRQ, which is defined to 0xffffffff (or -1 for
unsigned value).
Get rid of a former one, which was brought in by commit 2c0a6894df19
(x86, ACPI, irq: Enhance error handling in function acpi_register_gsi()),
in favour of latter.
To clarify the rationale of changing from INT_MIN to ((unsigned)-1)
definition consider the following:
- IRQ 0 is valid one in hardware, so, better not to use it everywhere
(Linux uses 0 as NO IRQ, though it's another story)
- INT_MIN splits the range into two, while 0xffffffff reserves only the
last item
- when type casting is done in most cases 0xff, 0xffff is naturally used
as a marker of invalid HW IRQ: for example PCI INT line 0xff means
no IRQ assigned by BIOS
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2017-12-16 00:25:09 +03:00
|
|
|
isa_irq_to_gsi[isa_irq] != INVALID_ACPI_IRQ) {
|
2014-06-09 12:19:35 +04:00
|
|
|
*gsi = isa_irq_to_gsi[isa_irq];
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
return -1;
|
2010-03-30 12:07:02 +04:00
|
|
|
}
|
|
|
|
|
2010-06-24 19:59:16 +04:00
|
|
|
static int acpi_register_gsi_pic(struct device *dev, u32 gsi,
|
|
|
|
int trigger, int polarity)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
|
|
|
#ifdef CONFIG_PCI
|
|
|
|
/*
|
|
|
|
* Make sure all (legacy) PCI IRQs are set as level-triggered.
|
|
|
|
*/
|
2010-06-24 19:59:16 +04:00
|
|
|
if (trigger == ACPI_LEVEL_SENSITIVE)
|
2015-05-10 03:27:37 +03:00
|
|
|
elcr_set_level_irq(gsi);
|
2005-04-17 02:20:36 +04:00
|
|
|
#endif
|
|
|
|
|
2010-06-24 19:59:16 +04:00
|
|
|
return gsi;
|
|
|
|
}
|
|
|
|
|
2015-01-22 17:13:36 +03:00
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
2010-06-24 19:59:16 +04:00
|
|
|
static int acpi_register_gsi_ioapic(struct device *dev, u32 gsi,
|
|
|
|
int trigger, int polarity)
|
|
|
|
{
|
2014-06-10 10:14:47 +04:00
|
|
|
int irq = gsi;
|
2005-04-17 02:20:36 +04:00
|
|
|
#ifdef CONFIG_X86_IO_APIC
|
2015-04-14 05:30:05 +03:00
|
|
|
int node;
|
|
|
|
struct irq_alloc_info info;
|
|
|
|
|
|
|
|
node = dev ? dev_to_node(dev) : NUMA_NO_NODE;
|
|
|
|
trigger = trigger == ACPI_EDGE_SENSITIVE ? 0 : 1;
|
|
|
|
polarity = polarity == ACPI_ACTIVE_HIGH ? 0 : 1;
|
|
|
|
ioapic_set_alloc_attr(&info, node, trigger, polarity);
|
|
|
|
|
2014-11-02 09:04:29 +03:00
|
|
|
mutex_lock(&acpi_ioapic_lock);
|
2015-04-14 05:30:05 +03:00
|
|
|
irq = mp_map_gsi_to_irq(gsi, IOAPIC_MAP_ALLOC, &info);
|
|
|
|
/* Don't set up the ACPI SCI because it's already set up */
|
2017-12-16 00:25:08 +03:00
|
|
|
if (irq >= 0 && enable_update_mptable && gsi != acpi_gbl_FADT.sci_interrupt)
|
2015-04-14 05:30:05 +03:00
|
|
|
mp_config_acpi_gsi(dev, gsi, trigger, polarity);
|
2014-11-02 09:04:29 +03:00
|
|
|
mutex_unlock(&acpi_ioapic_lock);
|
2005-04-17 02:20:36 +04:00
|
|
|
#endif
|
2010-06-24 19:59:16 +04:00
|
|
|
|
2014-06-10 10:14:47 +04:00
|
|
|
return irq;
|
2010-06-24 19:59:16 +04:00
|
|
|
}
|
|
|
|
|
2014-06-10 10:16:27 +04:00
|
|
|
static void acpi_unregister_gsi_ioapic(u32 gsi)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_X86_IO_APIC
|
2015-04-14 05:30:05 +03:00
|
|
|
int irq;
|
|
|
|
|
2014-11-02 09:04:29 +03:00
|
|
|
mutex_lock(&acpi_ioapic_lock);
|
2015-04-14 05:30:05 +03:00
|
|
|
irq = mp_map_gsi_to_irq(gsi, 0, NULL);
|
|
|
|
if (irq > 0)
|
|
|
|
mp_unmap_irq(irq);
|
2014-11-02 09:04:29 +03:00
|
|
|
mutex_unlock(&acpi_ioapic_lock);
|
2014-06-10 10:16:27 +04:00
|
|
|
#endif
|
2010-06-24 19:59:16 +04:00
|
|
|
}
|
2015-01-22 17:13:36 +03:00
|
|
|
#endif
|
2010-06-24 19:59:16 +04:00
|
|
|
|
2010-06-24 20:05:41 +04:00
|
|
|
int (*__acpi_register_gsi)(struct device *dev, u32 gsi,
|
|
|
|
int trigger, int polarity) = acpi_register_gsi_pic;
|
2014-06-10 10:16:27 +04:00
|
|
|
void (*__acpi_unregister_gsi)(u32 gsi) = NULL;
|
2010-06-24 19:59:16 +04:00
|
|
|
|
2013-05-14 21:09:16 +04:00
|
|
|
#ifdef CONFIG_ACPI_SLEEP
|
|
|
|
int (*acpi_suspend_lowlevel)(void) = x86_acpi_suspend_lowlevel;
|
|
|
|
#else
|
|
|
|
int (*acpi_suspend_lowlevel)(void);
|
|
|
|
#endif
|
|
|
|
|
2010-06-24 19:59:16 +04:00
|
|
|
/*
|
|
|
|
* success: return IRQ number (>=0)
|
|
|
|
* failure: return < 0
|
|
|
|
*/
|
|
|
|
int acpi_register_gsi(struct device *dev, u32 gsi, int trigger, int polarity)
|
|
|
|
{
|
2014-06-10 10:14:47 +04:00
|
|
|
return __acpi_register_gsi(dev, gsi, trigger, polarity);
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
2012-11-01 01:44:48 +04:00
|
|
|
EXPORT_SYMBOL_GPL(acpi_register_gsi);
|
|
|
|
|
|
|
|
void acpi_unregister_gsi(u32 gsi)
|
|
|
|
{
|
2014-06-10 10:16:27 +04:00
|
|
|
if (__acpi_unregister_gsi)
|
|
|
|
__acpi_unregister_gsi(gsi);
|
2012-11-01 01:44:48 +04:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_GPL(acpi_unregister_gsi);
|
2005-08-05 08:44:28 +04:00
|
|
|
|
2014-10-27 11:11:53 +03:00
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
2014-06-09 12:19:36 +04:00
|
|
|
static void __init acpi_set_irq_model_ioapic(void)
|
2010-06-24 19:59:16 +04:00
|
|
|
{
|
|
|
|
acpi_irq_model = ACPI_IRQ_MODEL_IOAPIC;
|
|
|
|
__acpi_register_gsi = acpi_register_gsi_ioapic;
|
2014-06-10 10:16:27 +04:00
|
|
|
__acpi_unregister_gsi = acpi_unregister_gsi_ioapic;
|
2010-06-24 19:59:16 +04:00
|
|
|
acpi_ioapic = 1;
|
|
|
|
}
|
2014-10-27 11:11:53 +03:00
|
|
|
#endif
|
2010-06-24 19:59:16 +04:00
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
/*
|
|
|
|
* ACPI based hotplug support for CPU
|
|
|
|
*/
|
|
|
|
#ifdef CONFIG_ACPI_HOTPLUG_CPU
|
2010-02-22 22:11:39 +03:00
|
|
|
#include <acpi/processor.h>
|
2008-02-01 19:49:42 +03:00
|
|
|
|
2017-03-03 11:02:23 +03:00
|
|
|
static int acpi_map_cpu2node(acpi_handle handle, int cpu, int physid)
|
2010-02-04 14:06:33 +03:00
|
|
|
{
|
|
|
|
#ifdef CONFIG_ACPI_NUMA
|
|
|
|
int nid;
|
|
|
|
|
|
|
|
nid = acpi_get_node(handle);
|
2016-12-12 22:29:52 +03:00
|
|
|
if (nid != NUMA_NO_NODE) {
|
2014-01-20 06:31:54 +04:00
|
|
|
set_apicid_to_node(physid, nid);
|
|
|
|
numa_set_node(cpu, nid);
|
|
|
|
}
|
2010-02-04 14:06:33 +03:00
|
|
|
#endif
|
2016-08-25 11:35:18 +03:00
|
|
|
return 0;
|
2010-02-04 14:06:33 +03:00
|
|
|
}
|
2008-02-01 19:49:42 +03:00
|
|
|
|
2017-02-06 20:01:51 +03:00
|
|
|
int acpi_map_cpu(acpi_handle handle, phys_cpuid_t physid, u32 acpi_id,
|
|
|
|
int *pcpu)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2006-09-26 12:52:35 +04:00
|
|
|
int cpu;
|
2009-01-01 05:08:47 +03:00
|
|
|
|
2017-02-06 20:01:51 +03:00
|
|
|
cpu = acpi_register_lapic(physid, acpi_id, ACPI_MADT_ENABLED);
|
2013-09-02 07:57:36 +04:00
|
|
|
if (cpu < 0) {
|
|
|
|
pr_info(PREFIX "Unable to map lapic to logical cpu number\n");
|
|
|
|
return cpu;
|
2006-09-26 12:52:35 +04:00
|
|
|
}
|
|
|
|
|
2010-02-22 22:11:39 +03:00
|
|
|
acpi_processor_set_pdc(handle);
|
2010-02-04 14:06:33 +03:00
|
|
|
acpi_map_cpu2node(handle, cpu, physid);
|
2006-09-26 12:52:35 +04:00
|
|
|
|
|
|
|
*pcpu = cpu;
|
2013-09-02 07:57:36 +04:00
|
|
|
return 0;
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
2015-01-04 13:55:03 +03:00
|
|
|
EXPORT_SYMBOL(acpi_map_cpu);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2015-01-04 13:55:03 +03:00
|
|
|
int acpi_unmap_cpu(int cpu)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2013-02-23 04:33:24 +04:00
|
|
|
#ifdef CONFIG_ACPI_NUMA
|
|
|
|
set_apicid_to_node(per_cpu(x86_cpu_to_apicid, cpu), NUMA_NO_NODE);
|
|
|
|
#endif
|
|
|
|
|
2007-10-19 22:35:03 +04:00
|
|
|
per_cpu(x86_cpu_to_apicid, cpu) = -1;
|
2009-01-01 05:08:46 +03:00
|
|
|
set_cpu_present(cpu, false);
|
2006-09-26 12:52:35 +04:00
|
|
|
num_processors--;
|
|
|
|
|
|
|
|
return (0);
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
2015-01-04 13:55:03 +03:00
|
|
|
EXPORT_SYMBOL(acpi_unmap_cpu);
|
2005-08-05 08:44:28 +04:00
|
|
|
#endif /* CONFIG_ACPI_HOTPLUG_CPU */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2005-08-05 08:44:28 +04:00
|
|
|
int acpi_register_ioapic(acpi_handle handle, u64 phys_addr, u32 gsi_base)
|
2005-04-28 11:25:58 +04:00
|
|
|
{
|
2014-10-27 08:21:45 +03:00
|
|
|
int ret = -ENOSYS;
|
|
|
|
#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
|
|
|
|
int ioapic_id;
|
|
|
|
u64 addr;
|
|
|
|
struct ioapic_domain_cfg cfg = {
|
|
|
|
.type = IOAPIC_DOMAIN_DYNAMIC,
|
2015-04-14 05:30:08 +03:00
|
|
|
.ops = &mp_ioapic_irqdomain_ops,
|
2014-10-27 08:21:45 +03:00
|
|
|
};
|
|
|
|
|
|
|
|
ioapic_id = acpi_get_ioapic_id(handle, gsi_base, &addr);
|
|
|
|
if (ioapic_id < 0) {
|
|
|
|
unsigned long long uid;
|
|
|
|
acpi_status status;
|
|
|
|
|
|
|
|
status = acpi_evaluate_integer(handle, METHOD_NAME__UID,
|
|
|
|
NULL, &uid);
|
|
|
|
if (ACPI_FAILURE(status)) {
|
|
|
|
acpi_handle_warn(handle, "failed to get IOAPIC ID.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
ioapic_id = (int)uid;
|
|
|
|
}
|
|
|
|
|
|
|
|
mutex_lock(&acpi_ioapic_lock);
|
|
|
|
ret = mp_register_ioapic(ioapic_id, phys_addr, gsi_base, &cfg);
|
|
|
|
mutex_unlock(&acpi_ioapic_lock);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return ret;
|
2005-04-28 11:25:58 +04:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(acpi_register_ioapic);
|
|
|
|
|
2005-08-05 08:44:28 +04:00
|
|
|
int acpi_unregister_ioapic(acpi_handle handle, u32 gsi_base)
|
2005-04-28 11:25:58 +04:00
|
|
|
{
|
2014-10-27 08:21:46 +03:00
|
|
|
int ret = -ENOSYS;
|
|
|
|
|
|
|
|
#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
|
|
|
|
mutex_lock(&acpi_ioapic_lock);
|
|
|
|
ret = mp_unregister_ioapic(gsi_base);
|
|
|
|
mutex_unlock(&acpi_ioapic_lock);
|
|
|
|
#endif
|
2005-08-05 08:44:28 +04:00
|
|
|
|
2014-10-27 08:21:46 +03:00
|
|
|
return ret;
|
|
|
|
}
|
2005-04-28 11:25:58 +04:00
|
|
|
EXPORT_SYMBOL(acpi_unregister_ioapic);
|
|
|
|
|
2014-10-27 08:21:47 +03:00
|
|
|
/**
|
|
|
|
* acpi_ioapic_registered - Check whether IOAPIC assoicatied with @gsi_base
|
|
|
|
* has been registered
|
2018-12-03 12:47:34 +03:00
|
|
|
* @handle: ACPI handle of the IOAPIC device
|
2014-10-27 08:21:47 +03:00
|
|
|
* @gsi_base: GSI base associated with the IOAPIC
|
|
|
|
*
|
|
|
|
* Assume caller holds some type of lock to serialize acpi_ioapic_registered()
|
|
|
|
* with acpi_register_ioapic()/acpi_unregister_ioapic().
|
|
|
|
*/
|
|
|
|
int acpi_ioapic_registered(acpi_handle handle, u32 gsi_base)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
#ifdef CONFIG_ACPI_HOTPLUG_IOAPIC
|
|
|
|
mutex_lock(&acpi_ioapic_lock);
|
|
|
|
ret = mp_ioapic_registered(gsi_base);
|
|
|
|
mutex_unlock(&acpi_ioapic_lock);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
static int __init acpi_parse_sbf(struct acpi_table_header *table)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2015-02-05 12:33:14 +03:00
|
|
|
struct acpi_table_boot *sb = (struct acpi_table_boot *)table;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
sbf_port = sb->cmos_index; /* Save CMOS port */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_HPET_TIMER
|
2007-02-16 12:28:18 +03:00
|
|
|
#include <asm/hpet.h>
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2013-09-30 19:29:43 +04:00
|
|
|
static struct resource *hpet_res __initdata;
|
2007-07-21 19:11:39 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
static int __init acpi_parse_hpet(struct acpi_table_header *table)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2015-02-05 12:33:14 +03:00
|
|
|
struct acpi_table_hpet *hpet_tbl = (struct acpi_table_hpet *)table;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
if (hpet_tbl->address.space_id != ACPI_SPACE_MEM) {
|
2005-04-17 02:20:36 +04:00
|
|
|
printk(KERN_WARNING PREFIX "HPET timers must be located in "
|
|
|
|
"memory.\n");
|
|
|
|
return -1;
|
|
|
|
}
|
2006-09-26 12:52:39 +04:00
|
|
|
|
2007-02-16 12:28:18 +03:00
|
|
|
hpet_address = hpet_tbl->address.address;
|
2009-08-04 23:07:09 +04:00
|
|
|
hpet_blockid = hpet_tbl->sequence;
|
2007-11-16 05:41:50 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Some broken BIOSes advertise HPET at 0x0. We really do not
|
|
|
|
* want to allocate a resource there.
|
|
|
|
*/
|
|
|
|
if (!hpet_address) {
|
|
|
|
printk(KERN_WARNING PREFIX
|
|
|
|
"HPET id: %#x base: %#lx is invalid\n",
|
|
|
|
hpet_tbl->id, hpet_address);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#ifdef CONFIG_X86_64
|
|
|
|
/*
|
|
|
|
* Some even more broken BIOSes advertise HPET at
|
|
|
|
* 0xfed0000000000000 instead of 0xfed00000. Fix it up and add
|
|
|
|
* some noise:
|
|
|
|
*/
|
|
|
|
if (hpet_address == 0xfed0000000000000UL) {
|
|
|
|
if (!hpet_force_user) {
|
|
|
|
printk(KERN_WARNING PREFIX "HPET id: %#x "
|
|
|
|
"base: 0xfed0000000000000 is bogus\n "
|
|
|
|
"try hpet=force on the kernel command line to "
|
|
|
|
"fix it up to 0xfed00000.\n", hpet_tbl->id);
|
|
|
|
hpet_address = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
printk(KERN_WARNING PREFIX
|
|
|
|
"HPET id: %#x base: 0xfed0000000000000 fixed up "
|
|
|
|
"to 0xfed00000.\n", hpet_tbl->id);
|
|
|
|
hpet_address >>= 32;
|
|
|
|
}
|
|
|
|
#endif
|
2005-08-05 08:44:28 +04:00
|
|
|
printk(KERN_INFO PREFIX "HPET id: %#x base: %#lx\n",
|
2007-02-16 12:28:18 +03:00
|
|
|
hpet_tbl->id, hpet_address);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-07-21 19:11:39 +04:00
|
|
|
/*
|
|
|
|
* Allocate and initialize the HPET firmware resource for adding into
|
|
|
|
* the resource tree during the lateinit timeframe.
|
|
|
|
*/
|
|
|
|
#define HPET_RESOURCE_NAME_SIZE 9
|
2018-10-31 01:09:09 +03:00
|
|
|
hpet_res = memblock_alloc(sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE,
|
memblock: stop using implicit alignment to SMP_CACHE_BYTES
When a memblock allocation APIs are called with align = 0, the alignment
is implicitly set to SMP_CACHE_BYTES.
Implicit alignment is done deep in the memblock allocator and it can
come as a surprise. Not that such an alignment would be wrong even
when used incorrectly but it is better to be explicit for the sake of
clarity and the prinicple of the least surprise.
Replace all such uses of memblock APIs with the 'align' parameter
explicitly set to SMP_CACHE_BYTES and stop implicit alignment assignment
in the memblock internal allocation functions.
For the case when memblock APIs are used via helper functions, e.g. like
iommu_arena_new_node() in Alpha, the helper functions were detected with
Coccinelle's help and then manually examined and updated where
appropriate.
The direct memblock APIs users were updated using the semantic patch below:
@@
expression size, min_addr, max_addr, nid;
@@
(
|
- memblock_alloc_try_nid_raw(size, 0, min_addr, max_addr, nid)
+ memblock_alloc_try_nid_raw(size, SMP_CACHE_BYTES, min_addr, max_addr,
nid)
|
- memblock_alloc_try_nid_nopanic(size, 0, min_addr, max_addr, nid)
+ memblock_alloc_try_nid_nopanic(size, SMP_CACHE_BYTES, min_addr, max_addr,
nid)
|
- memblock_alloc_try_nid(size, 0, min_addr, max_addr, nid)
+ memblock_alloc_try_nid(size, SMP_CACHE_BYTES, min_addr, max_addr, nid)
|
- memblock_alloc(size, 0)
+ memblock_alloc(size, SMP_CACHE_BYTES)
|
- memblock_alloc_raw(size, 0)
+ memblock_alloc_raw(size, SMP_CACHE_BYTES)
|
- memblock_alloc_from(size, 0, min_addr)
+ memblock_alloc_from(size, SMP_CACHE_BYTES, min_addr)
|
- memblock_alloc_nopanic(size, 0)
+ memblock_alloc_nopanic(size, SMP_CACHE_BYTES)
|
- memblock_alloc_low(size, 0)
+ memblock_alloc_low(size, SMP_CACHE_BYTES)
|
- memblock_alloc_low_nopanic(size, 0)
+ memblock_alloc_low_nopanic(size, SMP_CACHE_BYTES)
|
- memblock_alloc_from_nopanic(size, 0, min_addr)
+ memblock_alloc_from_nopanic(size, SMP_CACHE_BYTES, min_addr)
|
- memblock_alloc_node(size, 0, nid)
+ memblock_alloc_node(size, SMP_CACHE_BYTES, nid)
)
[mhocko@suse.com: changelog update]
[akpm@linux-foundation.org: coding-style fixes]
[rppt@linux.ibm.com: fix missed uses of implicit alignment]
Link: http://lkml.kernel.org/r/20181016133656.GA10925@rapoport-lnx
Link: http://lkml.kernel.org/r/1538687224-17535-1-git-send-email-rppt@linux.vnet.ibm.com
Signed-off-by: Mike Rapoport <rppt@linux.vnet.ibm.com>
Suggested-by: Michal Hocko <mhocko@suse.com>
Acked-by: Paul Burton <paul.burton@mips.com> [MIPS]
Acked-by: Michael Ellerman <mpe@ellerman.id.au> [powerpc]
Acked-by: Michal Hocko <mhocko@suse.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Chris Zankel <chris@zankel.net>
Cc: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Guan Xuetao <gxt@pku.edu.cn>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Matt Turner <mattst88@gmail.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Richard Weinberger <richard@nod.at>
Cc: Russell King <linux@armlinux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2018-10-31 01:09:57 +03:00
|
|
|
SMP_CACHE_BYTES);
|
2019-03-12 09:30:31 +03:00
|
|
|
if (!hpet_res)
|
|
|
|
panic("%s: Failed to allocate %zu bytes\n", __func__,
|
|
|
|
sizeof(*hpet_res) + HPET_RESOURCE_NAME_SIZE);
|
2007-07-21 19:11:39 +04:00
|
|
|
|
|
|
|
hpet_res->name = (void *)&hpet_res[1];
|
|
|
|
hpet_res->flags = IORESOURCE_MEM;
|
|
|
|
snprintf((char *)hpet_res->name, HPET_RESOURCE_NAME_SIZE, "HPET %u",
|
|
|
|
hpet_tbl->sequence);
|
|
|
|
|
|
|
|
hpet_res->start = hpet_address;
|
|
|
|
hpet_res->end = hpet_address + (1 * 1024) - 1;
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
return 0;
|
|
|
|
}
|
2007-07-21 19:11:39 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* hpet_insert_resource inserts the HPET resources used into the resource
|
|
|
|
* tree.
|
|
|
|
*/
|
|
|
|
static __init int hpet_insert_resource(void)
|
|
|
|
{
|
|
|
|
if (!hpet_res)
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
return insert_resource(&iomem_resource, hpet_res);
|
|
|
|
}
|
|
|
|
|
|
|
|
late_initcall(hpet_insert_resource);
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
#else
|
|
|
|
#define acpi_parse_hpet NULL
|
|
|
|
#endif
|
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
static int __init acpi_parse_fadt(struct acpi_table_header *table)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2016-04-14 03:04:42 +03:00
|
|
|
if (!(acpi_gbl_FADT.boot_flags & ACPI_FADT_LEGACY_DEVICES)) {
|
|
|
|
pr_debug("ACPI: no legacy devices present\n");
|
|
|
|
x86_platform.legacy.devices.pnpbios = 0;
|
|
|
|
}
|
|
|
|
|
2016-12-09 23:57:38 +03:00
|
|
|
if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
|
|
|
|
!(acpi_gbl_FADT.boot_flags & ACPI_FADT_8042) &&
|
|
|
|
x86_platform.legacy.i8042 != X86_LEGACY_I8042_PLATFORM_ABSENT) {
|
|
|
|
pr_debug("ACPI: i8042 controller is absent\n");
|
|
|
|
x86_platform.legacy.i8042 = X86_LEGACY_I8042_FIRMWARE_ABSENT;
|
|
|
|
}
|
|
|
|
|
2016-04-14 03:04:35 +03:00
|
|
|
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) {
|
|
|
|
pr_debug("ACPI: not registering RTC platform device\n");
|
|
|
|
x86_platform.legacy.rtc = 0;
|
|
|
|
}
|
2005-04-17 02:24:53 +04:00
|
|
|
|
2017-11-09 16:27:37 +03:00
|
|
|
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_VGA) {
|
|
|
|
pr_debug("ACPI: probing for VGA not safe\n");
|
|
|
|
x86_platform.legacy.no_vga = 1;
|
|
|
|
}
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
#ifdef CONFIG_X86_PM_TIMER
|
|
|
|
/* detect the location of the ACPI PM Timer */
|
2007-02-02 19:48:22 +03:00
|
|
|
if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID) {
|
2005-04-17 02:20:36 +04:00
|
|
|
/* FADT rev. 2 */
|
2007-02-02 19:48:22 +03:00
|
|
|
if (acpi_gbl_FADT.xpm_timer_block.space_id !=
|
2005-08-05 08:44:28 +04:00
|
|
|
ACPI_ADR_SPACE_SYSTEM_IO)
|
2005-04-17 02:20:36 +04:00
|
|
|
return 0;
|
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
pmtmr_ioport = acpi_gbl_FADT.xpm_timer_block.address;
|
2005-09-21 09:35:00 +04:00
|
|
|
/*
|
|
|
|
* "X" fields are optional extensions to the original V1.0
|
|
|
|
* fields, so we must selectively expand V1.0 fields if the
|
|
|
|
* corresponding X field is zero.
|
|
|
|
*/
|
|
|
|
if (!pmtmr_ioport)
|
2007-02-02 19:48:22 +03:00
|
|
|
pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
|
2005-04-17 02:20:36 +04:00
|
|
|
} else {
|
|
|
|
/* FADT rev. 1 */
|
2007-02-02 19:48:22 +03:00
|
|
|
pmtmr_ioport = acpi_gbl_FADT.pm_timer_block;
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
|
|
|
if (pmtmr_ioport)
|
2005-08-05 08:44:28 +04:00
|
|
|
printk(KERN_INFO PREFIX "PM-Timer IO Port: %#x\n",
|
|
|
|
pmtmr_ioport);
|
2005-04-17 02:20:36 +04:00
|
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
|
|
|
/*
|
|
|
|
* Parse LAPIC entries in MADT
|
|
|
|
* returns 0 on success, < 0 on error
|
|
|
|
*/
|
2008-04-04 23:41:57 +04:00
|
|
|
|
2008-02-19 14:21:06 +03:00
|
|
|
static int __init early_acpi_parse_madt_lapic_addr_ovr(void)
|
|
|
|
{
|
|
|
|
int count;
|
|
|
|
|
2016-04-04 23:25:00 +03:00
|
|
|
if (!boot_cpu_has(X86_FEATURE_APIC))
|
2008-02-19 14:21:06 +03:00
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Note that the LAPIC address is obtained from the MADT (32-bit value)
|
2016-02-24 02:34:30 +03:00
|
|
|
* and (optionally) overridden by a LAPIC_ADDR_OVR entry (64-bit value).
|
2008-02-19 14:21:06 +03:00
|
|
|
*/
|
|
|
|
|
2014-06-09 12:19:36 +04:00
|
|
|
count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE,
|
|
|
|
acpi_parse_lapic_addr_ovr, 0);
|
2008-02-19 14:21:06 +03:00
|
|
|
if (count < 0) {
|
|
|
|
printk(KERN_ERR PREFIX
|
|
|
|
"Error parsing LAPIC address override entry\n");
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2010-12-07 11:55:17 +03:00
|
|
|
register_lapic_address(acpi_lapic_addr);
|
2008-02-19 14:21:06 +03:00
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2005-08-05 08:44:28 +04:00
|
|
|
static int __init acpi_parse_madt_lapic_entries(void)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
|
|
|
int count;
|
2009-03-31 01:55:30 +04:00
|
|
|
int x2count = 0;
|
x86, ACPI: Handle apic/x2apic entries in MADT in correct order
ACPI specifies the following rules when listing APIC IDs:
(1) Boot processor is listed first
(2) For multi-threaded processors, BIOS should list the first logical
processor of each of the individual multi-threaded processors in MADT
before listing any of the second logical processors.
(3) APIC IDs < 0xFF should be listed in APIC subtable, APIC IDs >= 0xFF
should be listed in X2APIC subtable
Because of above, when there's more than 0xFF logical CPUs, BIOS
interleaves APIC/X2APIC subtables.
Assuming, there's 72 cores, 72 hyper-threads each, 288 CPUs total,
listing is like this:
APIC (0,4,8, .., 252)
X2APIC (258,260,264, .. 284)
APIC (1,5,9,...,253)
X2APIC (259,261,265,...,285)
APIC (2,6,10,...,254)
X2APIC (260,262,266,..,286)
APIC (3,7,11,...,251)
X2APIC (255,261,262,266,..,287)
Now, before this patch, due to how ACPI MADT subtables were parsed (BSP
then X2APIC then APIC), kernel enumerated CPUs in reverted order (i.e.
high APIC IDs were getting low logical IDs, and low APIC IDs were
getting high logical IDs).
This is wrong for the following reasons:
() it's hard to predict how cores and threads are enumerated
() when it's hard to predict, s/w threads cannot be properly affinitized
causing significant performance impact due to e.g. inproper cache
sharing
() enumeration is inconsistent with how threads are enumerated on
other Intel Xeon processors
So, order in which MADT APIC/X2APIC handlers are passed is
reverse and both handlers are passed to be called during same MADT
table to walk to achieve correct CPU enumeration.
In scenario when someone boots kernel with options 'maxcpus=72 nox2apic',
in result less cores may be booted, since some of the CPUs the kernel
will try to use will have APIC ID >= 0xFF. In such case, one
should not pass 'nox2apic'.
Disclimer: code parsing MADT APIC/X2APIC has not been touched since 2009,
when X2APIC support was initially added. I do not know why MADT parsing
code was added in the reversed order in the first place.
I guess it didn't matter at that time since nobody cared about cores
with APIC IDs >= 0xFF, right?
This patch is based on work of "Yinghai Lu <yinghai@kernel.org>"
previously published at https://lkml.org/lkml/2013/1/21/563
Here's the explanation why parsing interface needs to be changed
and why simpler approach will not work https://lkml.org/lkml/2015/9/7/285
Signed-off-by: Lukasz Anaczkowski <lukasz.anaczkowski@intel.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de> (commit message)
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-09-09 16:47:29 +03:00
|
|
|
int ret;
|
|
|
|
struct acpi_subtable_proc madt_proc[2];
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2016-04-04 23:25:00 +03:00
|
|
|
if (!boot_cpu_has(X86_FEATURE_APIC))
|
2006-04-11 14:54:36 +04:00
|
|
|
return -ENODEV;
|
|
|
|
|
2008-03-28 22:12:09 +03:00
|
|
|
count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_SAPIC,
|
2011-01-05 03:38:52 +03:00
|
|
|
acpi_parse_sapic, MAX_LOCAL_APIC);
|
2008-03-28 22:12:09 +03:00
|
|
|
|
2009-03-31 01:55:30 +04:00
|
|
|
if (!count) {
|
x86, ACPI: Handle apic/x2apic entries in MADT in correct order
ACPI specifies the following rules when listing APIC IDs:
(1) Boot processor is listed first
(2) For multi-threaded processors, BIOS should list the first logical
processor of each of the individual multi-threaded processors in MADT
before listing any of the second logical processors.
(3) APIC IDs < 0xFF should be listed in APIC subtable, APIC IDs >= 0xFF
should be listed in X2APIC subtable
Because of above, when there's more than 0xFF logical CPUs, BIOS
interleaves APIC/X2APIC subtables.
Assuming, there's 72 cores, 72 hyper-threads each, 288 CPUs total,
listing is like this:
APIC (0,4,8, .., 252)
X2APIC (258,260,264, .. 284)
APIC (1,5,9,...,253)
X2APIC (259,261,265,...,285)
APIC (2,6,10,...,254)
X2APIC (260,262,266,..,286)
APIC (3,7,11,...,251)
X2APIC (255,261,262,266,..,287)
Now, before this patch, due to how ACPI MADT subtables were parsed (BSP
then X2APIC then APIC), kernel enumerated CPUs in reverted order (i.e.
high APIC IDs were getting low logical IDs, and low APIC IDs were
getting high logical IDs).
This is wrong for the following reasons:
() it's hard to predict how cores and threads are enumerated
() when it's hard to predict, s/w threads cannot be properly affinitized
causing significant performance impact due to e.g. inproper cache
sharing
() enumeration is inconsistent with how threads are enumerated on
other Intel Xeon processors
So, order in which MADT APIC/X2APIC handlers are passed is
reverse and both handlers are passed to be called during same MADT
table to walk to achieve correct CPU enumeration.
In scenario when someone boots kernel with options 'maxcpus=72 nox2apic',
in result less cores may be booted, since some of the CPUs the kernel
will try to use will have APIC ID >= 0xFF. In such case, one
should not pass 'nox2apic'.
Disclimer: code parsing MADT APIC/X2APIC has not been touched since 2009,
when X2APIC support was initially added. I do not know why MADT parsing
code was added in the reversed order in the first place.
I guess it didn't matter at that time since nobody cared about cores
with APIC IDs >= 0xFF, right?
This patch is based on work of "Yinghai Lu <yinghai@kernel.org>"
previously published at https://lkml.org/lkml/2013/1/21/563
Here's the explanation why parsing interface needs to be changed
and why simpler approach will not work https://lkml.org/lkml/2015/9/7/285
Signed-off-by: Lukasz Anaczkowski <lukasz.anaczkowski@intel.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de> (commit message)
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2015-09-09 16:47:29 +03:00
|
|
|
memset(madt_proc, 0, sizeof(madt_proc));
|
|
|
|
madt_proc[0].id = ACPI_MADT_TYPE_LOCAL_APIC;
|
|
|
|
madt_proc[0].handler = acpi_parse_lapic;
|
|
|
|
madt_proc[1].id = ACPI_MADT_TYPE_LOCAL_X2APIC;
|
|
|
|
madt_proc[1].handler = acpi_parse_x2apic;
|
|
|
|
ret = acpi_table_parse_entries_array(ACPI_SIG_MADT,
|
|
|
|
sizeof(struct acpi_table_madt),
|
|
|
|
madt_proc, ARRAY_SIZE(madt_proc), MAX_LOCAL_APIC);
|
|
|
|
if (ret < 0) {
|
|
|
|
printk(KERN_ERR PREFIX
|
|
|
|
"Error parsing LAPIC/X2APIC entries\n");
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2016-08-20 02:24:02 +03:00
|
|
|
count = madt_proc[0].count;
|
|
|
|
x2count = madt_proc[1].count;
|
2009-03-31 01:55:30 +04:00
|
|
|
}
|
|
|
|
if (!count && !x2count) {
|
2005-04-17 02:20:36 +04:00
|
|
|
printk(KERN_ERR PREFIX "No LAPIC entries present\n");
|
|
|
|
/* TBD: Cleanup to allow fallback to MPS */
|
|
|
|
return -ENODEV;
|
2009-03-31 01:55:30 +04:00
|
|
|
} else if (count < 0 || x2count < 0) {
|
2005-04-17 02:20:36 +04:00
|
|
|
printk(KERN_ERR PREFIX "Error parsing LAPIC entry\n");
|
|
|
|
/* TBD: Cleanup to allow fallback to MPS */
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2014-06-09 12:19:36 +04:00
|
|
|
x2count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_X2APIC_NMI,
|
|
|
|
acpi_parse_x2apic_nmi, 0);
|
|
|
|
count = acpi_table_parse_madt(ACPI_MADT_TYPE_LOCAL_APIC_NMI,
|
|
|
|
acpi_parse_lapic_nmi, 0);
|
2009-03-31 01:55:30 +04:00
|
|
|
if (count < 0 || x2count < 0) {
|
2005-04-17 02:20:36 +04:00
|
|
|
printk(KERN_ERR PREFIX "Error parsing LAPIC NMI entry\n");
|
|
|
|
/* TBD: Cleanup to allow fallback to MPS */
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
2005-08-05 08:44:28 +04:00
|
|
|
#endif /* CONFIG_X86_LOCAL_APIC */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2005-08-24 20:09:07 +04:00
|
|
|
#ifdef CONFIG_X86_IO_APIC
|
2014-06-09 12:19:32 +04:00
|
|
|
static void __init mp_config_acpi_legacy_irqs(void)
|
2008-05-14 19:02:57 +04:00
|
|
|
{
|
2008-06-16 05:19:46 +04:00
|
|
|
int i;
|
2009-01-12 15:17:22 +03:00
|
|
|
struct mpc_intsrc mp_irq;
|
2008-05-14 19:02:57 +04:00
|
|
|
|
2012-05-18 03:06:13 +04:00
|
|
|
#ifdef CONFIG_EISA
|
2008-05-14 19:02:57 +04:00
|
|
|
/*
|
|
|
|
* Fabricate the legacy ISA bus (bus #31).
|
|
|
|
*/
|
|
|
|
mp_bus_id_to_type[MP_ISA_BUS] = MP_BUS_ISA;
|
|
|
|
#endif
|
|
|
|
set_bit(MP_ISA_BUS, mp_bus_not_pci);
|
2017-07-18 18:04:18 +03:00
|
|
|
pr_debug("Bus #%d is ISA (nIRQs: %d)\n", MP_ISA_BUS, nr_legacy_irqs());
|
2008-05-14 19:02:57 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Use the default configuration for the IRQs 0-15. Unless
|
|
|
|
* overridden by (MADT) interrupt source override entries.
|
|
|
|
*/
|
2014-06-09 12:19:48 +04:00
|
|
|
for (i = 0; i < nr_legacy_irqs(); i++) {
|
2010-03-30 12:07:06 +04:00
|
|
|
int ioapic, pin;
|
|
|
|
unsigned int dstapic;
|
2008-05-14 19:02:57 +04:00
|
|
|
int idx;
|
2010-03-30 12:07:06 +04:00
|
|
|
u32 gsi;
|
|
|
|
|
|
|
|
/* Locate the gsi that irq i maps to. */
|
|
|
|
if (acpi_isa_irq_to_gsi(i, &gsi))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Locate the IOAPIC that manages the ISA IRQ.
|
|
|
|
*/
|
|
|
|
ioapic = mp_find_ioapic(gsi);
|
|
|
|
if (ioapic < 0)
|
|
|
|
continue;
|
|
|
|
pin = mp_find_ioapic_pin(ioapic, gsi);
|
2011-05-19 03:31:37 +04:00
|
|
|
dstapic = mpc_ioapic_id(ioapic);
|
2008-05-14 19:02:57 +04:00
|
|
|
|
|
|
|
for (idx = 0; idx < mp_irq_entries; idx++) {
|
2009-01-12 15:17:22 +03:00
|
|
|
struct mpc_intsrc *irq = mp_irqs + idx;
|
2008-05-14 19:02:57 +04:00
|
|
|
|
|
|
|
/* Do we already have a mapping for this ISA IRQ? */
|
2009-01-12 15:17:22 +03:00
|
|
|
if (irq->srcbus == MP_ISA_BUS && irq->srcbusirq == i)
|
2008-05-14 19:02:57 +04:00
|
|
|
break;
|
|
|
|
|
|
|
|
/* Do we already have a mapping for this IOAPIC pin */
|
2010-03-30 12:07:06 +04:00
|
|
|
if (irq->dstapic == dstapic && irq->dstirq == pin)
|
2008-05-14 19:02:57 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (idx != mp_irq_entries) {
|
|
|
|
printk(KERN_DEBUG "ACPI: IRQ%d used by override.\n", i);
|
|
|
|
continue; /* IRQ already used */
|
|
|
|
}
|
|
|
|
|
2009-01-12 15:17:22 +03:00
|
|
|
mp_irq.type = MP_INTSRC;
|
|
|
|
mp_irq.irqflag = 0; /* Conforming */
|
|
|
|
mp_irq.srcbus = MP_ISA_BUS;
|
|
|
|
mp_irq.dstapic = dstapic;
|
|
|
|
mp_irq.irqtype = mp_INT;
|
|
|
|
mp_irq.srcbusirq = i; /* Identity mapped */
|
2010-03-30 12:07:06 +04:00
|
|
|
mp_irq.dstirq = pin;
|
2008-05-14 19:02:57 +04:00
|
|
|
|
2010-11-19 06:33:35 +03:00
|
|
|
mp_save_irq(&mp_irq);
|
2008-05-14 19:02:57 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
/*
|
|
|
|
* Parse IOAPIC related entries in MADT
|
|
|
|
* returns 0 on success, < 0 on error
|
|
|
|
*/
|
2005-08-05 08:44:28 +04:00
|
|
|
static int __init acpi_parse_madt_ioapic_entries(void)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
|
|
|
int count;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* ACPI interpreter is required to complete interrupt setup,
|
|
|
|
* so if it is off, don't enumerate the io-apics with ACPI.
|
|
|
|
* If MPS is present, it will handle them,
|
|
|
|
* otherwise the system will stay in PIC mode
|
|
|
|
*/
|
2009-06-08 13:53:50 +04:00
|
|
|
if (acpi_disabled || acpi_noirq)
|
2005-04-17 02:20:36 +04:00
|
|
|
return -ENODEV;
|
|
|
|
|
2016-04-04 23:25:00 +03:00
|
|
|
if (!boot_cpu_has(X86_FEATURE_APIC))
|
2006-04-07 21:49:39 +04:00
|
|
|
return -ENODEV;
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
/*
|
2005-08-05 08:44:28 +04:00
|
|
|
* if "noapic" boot option, don't look for IO-APICs
|
2005-04-17 02:20:36 +04:00
|
|
|
*/
|
|
|
|
if (skip_ioapic_setup) {
|
|
|
|
printk(KERN_INFO PREFIX "Skipping IOAPIC probe "
|
2005-08-05 08:44:28 +04:00
|
|
|
"due to 'noapic' option.\n");
|
2005-04-17 02:20:36 +04:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2014-06-09 12:19:36 +04:00
|
|
|
count = acpi_table_parse_madt(ACPI_MADT_TYPE_IO_APIC, acpi_parse_ioapic,
|
|
|
|
MAX_IO_APICS);
|
2005-04-17 02:20:36 +04:00
|
|
|
if (!count) {
|
|
|
|
printk(KERN_ERR PREFIX "No IOAPIC entries present\n");
|
|
|
|
return -ENODEV;
|
2005-08-05 08:44:28 +04:00
|
|
|
} else if (count < 0) {
|
2005-04-17 02:20:36 +04:00
|
|
|
printk(KERN_ERR PREFIX "Error parsing IOAPIC entry\n");
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2014-06-09 12:19:36 +04:00
|
|
|
count = acpi_table_parse_madt(ACPI_MADT_TYPE_INTERRUPT_OVERRIDE,
|
|
|
|
acpi_parse_int_src_ovr, nr_irqs);
|
2005-04-17 02:20:36 +04:00
|
|
|
if (count < 0) {
|
2005-08-05 08:44:28 +04:00
|
|
|
printk(KERN_ERR PREFIX
|
|
|
|
"Error parsing interrupt source overrides entry\n");
|
2005-04-17 02:20:36 +04:00
|
|
|
/* TBD: Cleanup to allow fallback to MPS */
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If BIOS did not supply an INT_SRC_OVR for the SCI
|
|
|
|
* pretend we got one so we can set the SCI flags.
|
2017-12-16 00:25:11 +03:00
|
|
|
* But ignore setting up SCI on hardware reduced platforms.
|
2005-04-17 02:20:36 +04:00
|
|
|
*/
|
2017-12-16 00:25:11 +03:00
|
|
|
if (acpi_sci_override_gsi == INVALID_ACPI_IRQ && !acpi_gbl_reduced_hardware)
|
2010-03-30 12:07:05 +04:00
|
|
|
acpi_sci_ioapic_setup(acpi_gbl_FADT.sci_interrupt, 0, 0,
|
|
|
|
acpi_gbl_FADT.sci_interrupt);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
tree-wide: fix assorted typos all over the place
That is "success", "unknown", "through", "performance", "[re|un]mapping"
, "access", "default", "reasonable", "[con]currently", "temperature"
, "channel", "[un]used", "application", "example","hierarchy", "therefore"
, "[over|under]flow", "contiguous", "threshold", "enough" and others.
Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2009-11-14 18:09:05 +03:00
|
|
|
/* Fill in identity legacy mappings where no override */
|
2005-04-17 02:20:36 +04:00
|
|
|
mp_config_acpi_legacy_irqs();
|
|
|
|
|
2014-06-09 12:19:36 +04:00
|
|
|
count = acpi_table_parse_madt(ACPI_MADT_TYPE_NMI_SOURCE,
|
|
|
|
acpi_parse_nmi_src, nr_irqs);
|
2005-04-17 02:20:36 +04:00
|
|
|
if (count < 0) {
|
|
|
|
printk(KERN_ERR PREFIX "Error parsing NMI SRC entry\n");
|
|
|
|
/* TBD: Cleanup to allow fallback to MPS */
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
#else
|
|
|
|
static inline int acpi_parse_madt_ioapic_entries(void)
|
|
|
|
{
|
|
|
|
return -1;
|
|
|
|
}
|
2005-08-24 20:09:07 +04:00
|
|
|
#endif /* !CONFIG_X86_IO_APIC */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2008-02-19 14:21:06 +03:00
|
|
|
static void __init early_acpi_process_madt(void)
|
|
|
|
{
|
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
|
|
|
int error;
|
|
|
|
|
|
|
|
if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Parse MADT LAPIC entries
|
|
|
|
*/
|
|
|
|
error = early_acpi_parse_madt_lapic_addr_ovr();
|
|
|
|
if (!error) {
|
|
|
|
acpi_lapic = 1;
|
|
|
|
smp_found_config = 1;
|
|
|
|
}
|
|
|
|
if (error == -EINVAL) {
|
|
|
|
/*
|
|
|
|
* Dell Precision Workstation 410, 610 come here.
|
|
|
|
*/
|
|
|
|
printk(KERN_ERR PREFIX
|
|
|
|
"Invalid BIOS MADT, disabling ACPI\n");
|
|
|
|
disable_acpi();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2005-08-05 08:44:28 +04:00
|
|
|
static void __init acpi_process_madt(void)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
|
|
|
#ifdef CONFIG_X86_LOCAL_APIC
|
2007-02-11 05:28:03 +03:00
|
|
|
int error;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-11 05:28:03 +03:00
|
|
|
if (!acpi_table_parse(ACPI_SIG_MADT, acpi_parse_madt)) {
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Parse MADT LAPIC entries
|
|
|
|
*/
|
|
|
|
error = acpi_parse_madt_lapic_entries();
|
|
|
|
if (!error) {
|
|
|
|
acpi_lapic = 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Parse MADT IO-APIC entries
|
|
|
|
*/
|
2014-11-02 09:04:29 +03:00
|
|
|
mutex_lock(&acpi_ioapic_lock);
|
2005-04-17 02:20:36 +04:00
|
|
|
error = acpi_parse_madt_ioapic_entries();
|
2014-11-02 09:04:29 +03:00
|
|
|
mutex_unlock(&acpi_ioapic_lock);
|
2005-04-17 02:20:36 +04:00
|
|
|
if (!error) {
|
2010-06-24 19:59:16 +04:00
|
|
|
acpi_set_irq_model_ioapic();
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
smp_found_config = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (error == -EINVAL) {
|
|
|
|
/*
|
|
|
|
* Dell Precision Workstation 410, 610 come here.
|
|
|
|
*/
|
2005-08-05 08:44:28 +04:00
|
|
|
printk(KERN_ERR PREFIX
|
|
|
|
"Invalid BIOS MADT, disabling ACPI\n");
|
2005-04-17 02:20:36 +04:00
|
|
|
disable_acpi();
|
|
|
|
}
|
2008-12-23 09:47:42 +03:00
|
|
|
} else {
|
|
|
|
/*
|
|
|
|
* ACPI found no MADT, and so ACPI wants UP PIC mode.
|
|
|
|
* In the event an MPS table was found, forget it.
|
|
|
|
* Boot with "acpi=off" to use MPS on such a system.
|
|
|
|
*/
|
|
|
|
if (smp_found_config) {
|
|
|
|
printk(KERN_WARNING PREFIX
|
|
|
|
"No APIC-table, disabling MPS\n");
|
|
|
|
smp_found_config = 0;
|
|
|
|
}
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
2008-12-06 09:45:50 +03:00
|
|
|
|
|
|
|
/*
|
|
|
|
* ACPI supports both logical (e.g. Hyper-Threading) and physical
|
|
|
|
* processors, where MPS only supports physical.
|
|
|
|
*/
|
|
|
|
if (acpi_lapic && acpi_ioapic)
|
|
|
|
printk(KERN_INFO "Using ACPI (MADT) for SMP configuration "
|
|
|
|
"information\n");
|
|
|
|
else if (acpi_lapic)
|
|
|
|
printk(KERN_INFO "Using ACPI for processor (LAPIC) "
|
|
|
|
"configuration information\n");
|
2005-04-17 02:20:36 +04:00
|
|
|
#endif
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2007-10-03 23:15:40 +04:00
|
|
|
static int __init disable_acpi_irq(const struct dmi_system_id *d)
|
2005-06-26 01:54:42 +04:00
|
|
|
{
|
|
|
|
if (!acpi_force) {
|
|
|
|
printk(KERN_NOTICE "%s detected: force use of acpi=noirq\n",
|
|
|
|
d->ident);
|
|
|
|
acpi_noirq_set();
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-10-03 23:15:40 +04:00
|
|
|
static int __init disable_acpi_pci(const struct dmi_system_id *d)
|
2005-06-26 01:54:42 +04:00
|
|
|
{
|
|
|
|
if (!acpi_force) {
|
|
|
|
printk(KERN_NOTICE "%s detected: force use of pci=noacpi\n",
|
|
|
|
d->ident);
|
|
|
|
acpi_disable_pci();
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2007-10-03 23:15:40 +04:00
|
|
|
static int __init dmi_disable_acpi(const struct dmi_system_id *d)
|
2005-06-26 01:54:42 +04:00
|
|
|
{
|
|
|
|
if (!acpi_force) {
|
2005-08-05 08:44:28 +04:00
|
|
|
printk(KERN_NOTICE "%s detected: acpi off\n", d->ident);
|
2005-06-26 01:54:42 +04:00
|
|
|
disable_acpi();
|
|
|
|
} else {
|
|
|
|
printk(KERN_NOTICE
|
|
|
|
"Warning: DMI blacklist says broken, but acpi forced\n");
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
x86: fix C1E && nx6325 stability problem
The problems are that, with the ACPI vs timer overring issue _fixed_,
after using the box for some time (between several seconds and 1 hour, at
random) processes get very high CPU loads (once I've got X using 107% of
the CPU, for example) and the system becomes unresponsive, as though there
were interrupts lost or something similar.
Andreas Herrman reproduced similar problems:
> Ok, now I've reproduced the stability problem.
> - Using tip/master,
> - reverting e38502eb8aa82314d5ab0eba45f50e6790dadd88 and
> - applying your patch from this posting
> http://marc.info/?l=linux-kernel&m=121539354224562&w=4
>
> Starting X, firefox, gimp, tuxpaint and doing some drawing in tuxpaint
> results in a slow system. Drawing is almost not possible anymore --
> Selections of new colors, cursors etc. is performed with huge delay
> if it's performed at all.
>
> BTW, the code sets up timer IRQ as Virtual Wire IRQ:
>
> Jul 8 14:57:58 kodscha IO-APIC (apicid-pin) 2-22, 2-23 not connected.
> Jul 8 14:57:58 kodscha ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> Jul 8 14:57:58 kodscha ...trying to set up timer as Virtual Wire IRQ... works.
>
> and both INT0 and INT2 of IOAPIC are masked:
>
> Jul 8 14:57:58 kodscha NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
> Jul 8 14:57:58 kodscha 00 000 1 0 0 0 0 0 0 00
> Jul 8 14:57:58 kodscha 01 003 0 0 0 0 0 1 1 31
> Jul 8 14:57:58 kodscha 02 003 1 0 0 0 0 0 0 30
>
> I've also seen strange CPU utilization -- with syslog-ng:
>
> top - 15:33:06 up 35 min, 4 users, load average: 1.70, 0.68, 0.37
> Tasks: 64 total, 4 running, 60 sleeping, 0 stopped, 0 zombie
> Cpu0 : 0.0%us,100.0%sy, 0.0%ni, 0.0%id, 0.0%wa, 0.0%hi, 0.0%si, 0.0%st
> Cpu1 : 6.4%us, 87.2%sy, 0.0%ni, 5.8%id, 0.0%wa, 0.6%hi, 0.0%si, 0.0%st
> Mem: 895384k total, 283568k used, 611816k free, 35492k buffers
> Swap: 1959920k total, 0k used, 1959920k free, 163044k cached
>
> PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND
> 4632 root 20 0 17216 800 580 S 104 0.1 0:34.22 syslog-ng
> 28505 root 20 0 205m 11m 4024 S 6 1.3 0:21.16 X
> 28518 root 20 0 56292 5652 4492 S 1 0.6 0:01.80 fluxbox
> 1 root 20 0 3724 608 508 S 0 0.1 0:00.36 init
>
> So far I have no clue why C1E-idle in conjunction with virtual wire
> mode causes this strange behaviour.
>
> ... and I start to think about the root cause of all this.
>
> I've performed similar tests under X with the IRQ0/INT0 configuration and
> I did not see above symptoms.
So lets fall back to the IRQ0/INT0 configuration on this box.
This basically restores the dont-use-the-lapic-timer exception mechanism
that was unconditional on this box prior commit 8750bf5 ("x86: add C1E
aware idle function").
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 18:12:26 +04:00
|
|
|
/*
|
2012-06-04 11:00:04 +04:00
|
|
|
* Force ignoring BIOS IRQ0 override
|
x86: fix C1E && nx6325 stability problem
The problems are that, with the ACPI vs timer overring issue _fixed_,
after using the box for some time (between several seconds and 1 hour, at
random) processes get very high CPU loads (once I've got X using 107% of
the CPU, for example) and the system becomes unresponsive, as though there
were interrupts lost or something similar.
Andreas Herrman reproduced similar problems:
> Ok, now I've reproduced the stability problem.
> - Using tip/master,
> - reverting e38502eb8aa82314d5ab0eba45f50e6790dadd88 and
> - applying your patch from this posting
> http://marc.info/?l=linux-kernel&m=121539354224562&w=4
>
> Starting X, firefox, gimp, tuxpaint and doing some drawing in tuxpaint
> results in a slow system. Drawing is almost not possible anymore --
> Selections of new colors, cursors etc. is performed with huge delay
> if it's performed at all.
>
> BTW, the code sets up timer IRQ as Virtual Wire IRQ:
>
> Jul 8 14:57:58 kodscha IO-APIC (apicid-pin) 2-22, 2-23 not connected.
> Jul 8 14:57:58 kodscha ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> Jul 8 14:57:58 kodscha ...trying to set up timer as Virtual Wire IRQ... works.
>
> and both INT0 and INT2 of IOAPIC are masked:
>
> Jul 8 14:57:58 kodscha NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
> Jul 8 14:57:58 kodscha 00 000 1 0 0 0 0 0 0 00
> Jul 8 14:57:58 kodscha 01 003 0 0 0 0 0 1 1 31
> Jul 8 14:57:58 kodscha 02 003 1 0 0 0 0 0 0 30
>
> I've also seen strange CPU utilization -- with syslog-ng:
>
> top - 15:33:06 up 35 min, 4 users, load average: 1.70, 0.68, 0.37
> Tasks: 64 total, 4 running, 60 sleeping, 0 stopped, 0 zombie
> Cpu0 : 0.0%us,100.0%sy, 0.0%ni, 0.0%id, 0.0%wa, 0.0%hi, 0.0%si, 0.0%st
> Cpu1 : 6.4%us, 87.2%sy, 0.0%ni, 5.8%id, 0.0%wa, 0.6%hi, 0.0%si, 0.0%st
> Mem: 895384k total, 283568k used, 611816k free, 35492k buffers
> Swap: 1959920k total, 0k used, 1959920k free, 163044k cached
>
> PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND
> 4632 root 20 0 17216 800 580 S 104 0.1 0:34.22 syslog-ng
> 28505 root 20 0 205m 11m 4024 S 6 1.3 0:21.16 X
> 28518 root 20 0 56292 5652 4492 S 1 0.6 0:01.80 fluxbox
> 1 root 20 0 3724 608 508 S 0 0.1 0:00.36 init
>
> So far I have no clue why C1E-idle in conjunction with virtual wire
> mode causes this strange behaviour.
>
> ... and I start to think about the root cause of all this.
>
> I've performed similar tests under X with the IRQ0/INT0 configuration and
> I did not see above symptoms.
So lets fall back to the IRQ0/INT0 configuration on this box.
This basically restores the dont-use-the-lapic-timer exception mechanism
that was unconditional on this box prior commit 8750bf5 ("x86: add C1E
aware idle function").
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 18:12:26 +04:00
|
|
|
*/
|
|
|
|
static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
|
|
|
|
{
|
2008-10-07 08:47:52 +04:00
|
|
|
if (!acpi_skip_timer_override) {
|
2012-06-04 11:00:04 +04:00
|
|
|
pr_notice("%s detected: Ignoring BIOS IRQ0 override\n",
|
2008-10-07 08:47:52 +04:00
|
|
|
d->ident);
|
|
|
|
acpi_skip_timer_override = 1;
|
|
|
|
}
|
x86: fix C1E && nx6325 stability problem
The problems are that, with the ACPI vs timer overring issue _fixed_,
after using the box for some time (between several seconds and 1 hour, at
random) processes get very high CPU loads (once I've got X using 107% of
the CPU, for example) and the system becomes unresponsive, as though there
were interrupts lost or something similar.
Andreas Herrman reproduced similar problems:
> Ok, now I've reproduced the stability problem.
> - Using tip/master,
> - reverting e38502eb8aa82314d5ab0eba45f50e6790dadd88 and
> - applying your patch from this posting
> http://marc.info/?l=linux-kernel&m=121539354224562&w=4
>
> Starting X, firefox, gimp, tuxpaint and doing some drawing in tuxpaint
> results in a slow system. Drawing is almost not possible anymore --
> Selections of new colors, cursors etc. is performed with huge delay
> if it's performed at all.
>
> BTW, the code sets up timer IRQ as Virtual Wire IRQ:
>
> Jul 8 14:57:58 kodscha IO-APIC (apicid-pin) 2-22, 2-23 not connected.
> Jul 8 14:57:58 kodscha ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> Jul 8 14:57:58 kodscha ...trying to set up timer as Virtual Wire IRQ... works.
>
> and both INT0 and INT2 of IOAPIC are masked:
>
> Jul 8 14:57:58 kodscha NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
> Jul 8 14:57:58 kodscha 00 000 1 0 0 0 0 0 0 00
> Jul 8 14:57:58 kodscha 01 003 0 0 0 0 0 1 1 31
> Jul 8 14:57:58 kodscha 02 003 1 0 0 0 0 0 0 30
>
> I've also seen strange CPU utilization -- with syslog-ng:
>
> top - 15:33:06 up 35 min, 4 users, load average: 1.70, 0.68, 0.37
> Tasks: 64 total, 4 running, 60 sleeping, 0 stopped, 0 zombie
> Cpu0 : 0.0%us,100.0%sy, 0.0%ni, 0.0%id, 0.0%wa, 0.0%hi, 0.0%si, 0.0%st
> Cpu1 : 6.4%us, 87.2%sy, 0.0%ni, 5.8%id, 0.0%wa, 0.6%hi, 0.0%si, 0.0%st
> Mem: 895384k total, 283568k used, 611816k free, 35492k buffers
> Swap: 1959920k total, 0k used, 1959920k free, 163044k cached
>
> PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND
> 4632 root 20 0 17216 800 580 S 104 0.1 0:34.22 syslog-ng
> 28505 root 20 0 205m 11m 4024 S 6 1.3 0:21.16 X
> 28518 root 20 0 56292 5652 4492 S 1 0.6 0:01.80 fluxbox
> 1 root 20 0 3724 608 508 S 0 0.1 0:00.36 init
>
> So far I have no clue why C1E-idle in conjunction with virtual wire
> mode causes this strange behaviour.
>
> ... and I start to think about the root cause of all this.
>
> I've performed similar tests under X with the IRQ0/INT0 configuration and
> I did not see above symptoms.
So lets fall back to the IRQ0/INT0 configuration on this box.
This basically restores the dont-use-the-lapic-timer exception mechanism
that was unconditional on this box prior commit 8750bf5 ("x86: add C1E
aware idle function").
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 18:12:26 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-03-11 11:09:00 +03:00
|
|
|
/*
|
|
|
|
* ACPI offers an alternative platform interface model that removes
|
|
|
|
* ACPI hardware requirements for platforms that do not implement
|
|
|
|
* the PC Architecture.
|
|
|
|
*
|
|
|
|
* We initialize the Hardware-reduced ACPI model here:
|
|
|
|
*/
|
2018-02-20 21:05:04 +03:00
|
|
|
void __init acpi_generic_reduced_hw_init(void)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Override x86_init functions and bypass legacy PIC in
|
|
|
|
* hardware reduced ACPI mode.
|
|
|
|
*/
|
|
|
|
x86_init.timers.timer_init = x86_init_noop;
|
|
|
|
x86_init.irqs.pre_vector_init = x86_init_noop;
|
|
|
|
legacy_pic = &null_legacy_pic;
|
|
|
|
}
|
|
|
|
|
2015-03-11 11:09:00 +03:00
|
|
|
static void __init acpi_reduced_hw_init(void)
|
|
|
|
{
|
2018-02-20 21:05:04 +03:00
|
|
|
if (acpi_gbl_reduced_hardware)
|
2018-02-20 21:05:05 +03:00
|
|
|
x86_init.acpi.reduced_hw_early_init();
|
2015-03-11 11:09:00 +03:00
|
|
|
}
|
|
|
|
|
2005-06-26 01:54:42 +04:00
|
|
|
/*
|
|
|
|
* If your system is blacklisted here, but you find that acpi=force
|
2009-04-01 09:49:42 +04:00
|
|
|
* works for you, please contact linux-acpi@vger.kernel.org
|
2005-06-26 01:54:42 +04:00
|
|
|
*/
|
2017-09-14 12:59:30 +03:00
|
|
|
static const struct dmi_system_id acpi_dmi_table[] __initconst = {
|
2005-06-26 01:54:42 +04:00
|
|
|
/*
|
|
|
|
* Boxes that need ACPI disabled
|
|
|
|
*/
|
|
|
|
{
|
2005-08-05 08:44:28 +04:00
|
|
|
.callback = dmi_disable_acpi,
|
|
|
|
.ident = "IBM Thinkpad",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
|
|
|
|
DMI_MATCH(DMI_BOARD_NAME, "2629H1G"),
|
|
|
|
},
|
|
|
|
},
|
2005-06-26 01:54:42 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Boxes that need ACPI PCI IRQ routing disabled
|
|
|
|
*/
|
|
|
|
{
|
2005-08-05 08:44:28 +04:00
|
|
|
.callback = disable_acpi_irq,
|
|
|
|
.ident = "ASUS A7V",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC"),
|
|
|
|
DMI_MATCH(DMI_BOARD_NAME, "<A7V>"),
|
|
|
|
/* newer BIOS, Revision 1011, does work */
|
|
|
|
DMI_MATCH(DMI_BIOS_VERSION,
|
|
|
|
"ASUS A7V ACPI BIOS Revision 1007"),
|
|
|
|
},
|
|
|
|
},
|
2007-03-08 10:48:30 +03:00
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Latest BIOS for IBM 600E (1.16) has bad pcinum
|
|
|
|
* for LPC bridge, which is needed for the PCI
|
|
|
|
* interrupt links to work. DSDT fix is in bug 5966.
|
|
|
|
* 2645, 2646 model numbers are shared with 600/600E/600X
|
|
|
|
*/
|
|
|
|
.callback = disable_acpi_irq,
|
|
|
|
.ident = "IBM Thinkpad 600 Series 2645",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
|
|
|
|
DMI_MATCH(DMI_BOARD_NAME, "2645"),
|
|
|
|
},
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.callback = disable_acpi_irq,
|
|
|
|
.ident = "IBM Thinkpad 600 Series 2646",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_BOARD_VENDOR, "IBM"),
|
|
|
|
DMI_MATCH(DMI_BOARD_NAME, "2646"),
|
|
|
|
},
|
|
|
|
},
|
2005-06-26 01:54:42 +04:00
|
|
|
/*
|
|
|
|
* Boxes that need ACPI PCI IRQ routing and PCI scan disabled
|
|
|
|
*/
|
2005-08-05 08:44:28 +04:00
|
|
|
{ /* _BBN 0 bug */
|
|
|
|
.callback = disable_acpi_pci,
|
|
|
|
.ident = "ASUS PR-DLS",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
|
|
|
|
DMI_MATCH(DMI_BOARD_NAME, "PR-DLS"),
|
|
|
|
DMI_MATCH(DMI_BIOS_VERSION,
|
|
|
|
"ASUS PR-DLS ACPI BIOS Revision 1010"),
|
|
|
|
DMI_MATCH(DMI_BIOS_DATE, "03/21/2003")
|
|
|
|
},
|
|
|
|
},
|
2005-06-26 01:54:42 +04:00
|
|
|
{
|
2005-08-05 08:44:28 +04:00
|
|
|
.callback = disable_acpi_pci,
|
|
|
|
.ident = "Acer TravelMate 36x Laptop",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
|
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
|
|
|
|
},
|
|
|
|
},
|
2008-10-22 15:08:31 +04:00
|
|
|
{}
|
|
|
|
};
|
|
|
|
|
|
|
|
/* second table for DMI checks that should run after early-quirks */
|
2017-09-14 12:59:30 +03:00
|
|
|
static const struct dmi_system_id acpi_dmi_table_late[] __initconst = {
|
x86: fix C1E && nx6325 stability problem
The problems are that, with the ACPI vs timer overring issue _fixed_,
after using the box for some time (between several seconds and 1 hour, at
random) processes get very high CPU loads (once I've got X using 107% of
the CPU, for example) and the system becomes unresponsive, as though there
were interrupts lost or something similar.
Andreas Herrman reproduced similar problems:
> Ok, now I've reproduced the stability problem.
> - Using tip/master,
> - reverting e38502eb8aa82314d5ab0eba45f50e6790dadd88 and
> - applying your patch from this posting
> http://marc.info/?l=linux-kernel&m=121539354224562&w=4
>
> Starting X, firefox, gimp, tuxpaint and doing some drawing in tuxpaint
> results in a slow system. Drawing is almost not possible anymore --
> Selections of new colors, cursors etc. is performed with huge delay
> if it's performed at all.
>
> BTW, the code sets up timer IRQ as Virtual Wire IRQ:
>
> Jul 8 14:57:58 kodscha IO-APIC (apicid-pin) 2-22, 2-23 not connected.
> Jul 8 14:57:58 kodscha ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> Jul 8 14:57:58 kodscha ...trying to set up timer as Virtual Wire IRQ... works.
>
> and both INT0 and INT2 of IOAPIC are masked:
>
> Jul 8 14:57:58 kodscha NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
> Jul 8 14:57:58 kodscha 00 000 1 0 0 0 0 0 0 00
> Jul 8 14:57:58 kodscha 01 003 0 0 0 0 0 1 1 31
> Jul 8 14:57:58 kodscha 02 003 1 0 0 0 0 0 0 30
>
> I've also seen strange CPU utilization -- with syslog-ng:
>
> top - 15:33:06 up 35 min, 4 users, load average: 1.70, 0.68, 0.37
> Tasks: 64 total, 4 running, 60 sleeping, 0 stopped, 0 zombie
> Cpu0 : 0.0%us,100.0%sy, 0.0%ni, 0.0%id, 0.0%wa, 0.0%hi, 0.0%si, 0.0%st
> Cpu1 : 6.4%us, 87.2%sy, 0.0%ni, 5.8%id, 0.0%wa, 0.6%hi, 0.0%si, 0.0%st
> Mem: 895384k total, 283568k used, 611816k free, 35492k buffers
> Swap: 1959920k total, 0k used, 1959920k free, 163044k cached
>
> PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND
> 4632 root 20 0 17216 800 580 S 104 0.1 0:34.22 syslog-ng
> 28505 root 20 0 205m 11m 4024 S 6 1.3 0:21.16 X
> 28518 root 20 0 56292 5652 4492 S 1 0.6 0:01.80 fluxbox
> 1 root 20 0 3724 608 508 S 0 0.1 0:00.36 init
>
> So far I have no clue why C1E-idle in conjunction with virtual wire
> mode causes this strange behaviour.
>
> ... and I start to think about the root cause of all this.
>
> I've performed similar tests under X with the IRQ0/INT0 configuration and
> I did not see above symptoms.
So lets fall back to the IRQ0/INT0 configuration on this box.
This basically restores the dont-use-the-lapic-timer exception mechanism
that was unconditional on this box prior commit 8750bf5 ("x86: add C1E
aware idle function").
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 18:12:26 +04:00
|
|
|
/*
|
|
|
|
* HP laptops which use a DSDT reporting as HP/SB400/10000,
|
|
|
|
* which includes some code which overrides all temperature
|
|
|
|
* trip points to 16C if the INTIN2 input of the I/O APIC
|
|
|
|
* is enabled. This input is incorrectly designated the
|
|
|
|
* ISA IRQ 0 via an interrupt source override even though
|
|
|
|
* it is wired to the output of the master 8259A and INTIN0
|
2012-06-04 11:00:04 +04:00
|
|
|
* is not connected at all. Force ignoring BIOS IRQ0
|
x86: fix C1E && nx6325 stability problem
The problems are that, with the ACPI vs timer overring issue _fixed_,
after using the box for some time (between several seconds and 1 hour, at
random) processes get very high CPU loads (once I've got X using 107% of
the CPU, for example) and the system becomes unresponsive, as though there
were interrupts lost or something similar.
Andreas Herrman reproduced similar problems:
> Ok, now I've reproduced the stability problem.
> - Using tip/master,
> - reverting e38502eb8aa82314d5ab0eba45f50e6790dadd88 and
> - applying your patch from this posting
> http://marc.info/?l=linux-kernel&m=121539354224562&w=4
>
> Starting X, firefox, gimp, tuxpaint and doing some drawing in tuxpaint
> results in a slow system. Drawing is almost not possible anymore --
> Selections of new colors, cursors etc. is performed with huge delay
> if it's performed at all.
>
> BTW, the code sets up timer IRQ as Virtual Wire IRQ:
>
> Jul 8 14:57:58 kodscha IO-APIC (apicid-pin) 2-22, 2-23 not connected.
> Jul 8 14:57:58 kodscha ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> Jul 8 14:57:58 kodscha ...trying to set up timer as Virtual Wire IRQ... works.
>
> and both INT0 and INT2 of IOAPIC are masked:
>
> Jul 8 14:57:58 kodscha NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
> Jul 8 14:57:58 kodscha 00 000 1 0 0 0 0 0 0 00
> Jul 8 14:57:58 kodscha 01 003 0 0 0 0 0 1 1 31
> Jul 8 14:57:58 kodscha 02 003 1 0 0 0 0 0 0 30
>
> I've also seen strange CPU utilization -- with syslog-ng:
>
> top - 15:33:06 up 35 min, 4 users, load average: 1.70, 0.68, 0.37
> Tasks: 64 total, 4 running, 60 sleeping, 0 stopped, 0 zombie
> Cpu0 : 0.0%us,100.0%sy, 0.0%ni, 0.0%id, 0.0%wa, 0.0%hi, 0.0%si, 0.0%st
> Cpu1 : 6.4%us, 87.2%sy, 0.0%ni, 5.8%id, 0.0%wa, 0.6%hi, 0.0%si, 0.0%st
> Mem: 895384k total, 283568k used, 611816k free, 35492k buffers
> Swap: 1959920k total, 0k used, 1959920k free, 163044k cached
>
> PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND
> 4632 root 20 0 17216 800 580 S 104 0.1 0:34.22 syslog-ng
> 28505 root 20 0 205m 11m 4024 S 6 1.3 0:21.16 X
> 28518 root 20 0 56292 5652 4492 S 1 0.6 0:01.80 fluxbox
> 1 root 20 0 3724 608 508 S 0 0.1 0:00.36 init
>
> So far I have no clue why C1E-idle in conjunction with virtual wire
> mode causes this strange behaviour.
>
> ... and I start to think about the root cause of all this.
>
> I've performed similar tests under X with the IRQ0/INT0 configuration and
> I did not see above symptoms.
So lets fall back to the IRQ0/INT0 configuration on this box.
This basically restores the dont-use-the-lapic-timer exception mechanism
that was unconditional on this box prior commit 8750bf5 ("x86: add C1E
aware idle function").
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 18:12:26 +04:00
|
|
|
* override in that cases.
|
|
|
|
*/
|
2008-10-06 13:59:29 +04:00
|
|
|
{
|
|
|
|
.callback = dmi_ignore_irq0_timer_override,
|
|
|
|
.ident = "HP nx6115 laptop",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
|
|
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6115"),
|
|
|
|
},
|
|
|
|
},
|
x86: fix C1E && nx6325 stability problem
The problems are that, with the ACPI vs timer overring issue _fixed_,
after using the box for some time (between several seconds and 1 hour, at
random) processes get very high CPU loads (once I've got X using 107% of
the CPU, for example) and the system becomes unresponsive, as though there
were interrupts lost or something similar.
Andreas Herrman reproduced similar problems:
> Ok, now I've reproduced the stability problem.
> - Using tip/master,
> - reverting e38502eb8aa82314d5ab0eba45f50e6790dadd88 and
> - applying your patch from this posting
> http://marc.info/?l=linux-kernel&m=121539354224562&w=4
>
> Starting X, firefox, gimp, tuxpaint and doing some drawing in tuxpaint
> results in a slow system. Drawing is almost not possible anymore --
> Selections of new colors, cursors etc. is performed with huge delay
> if it's performed at all.
>
> BTW, the code sets up timer IRQ as Virtual Wire IRQ:
>
> Jul 8 14:57:58 kodscha IO-APIC (apicid-pin) 2-22, 2-23 not connected.
> Jul 8 14:57:58 kodscha ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
> Jul 8 14:57:58 kodscha ...trying to set up timer as Virtual Wire IRQ... works.
>
> and both INT0 and INT2 of IOAPIC are masked:
>
> Jul 8 14:57:58 kodscha NR Dst Mask Trig IRR Pol Stat Dmod Deli Vect:
> Jul 8 14:57:58 kodscha 00 000 1 0 0 0 0 0 0 00
> Jul 8 14:57:58 kodscha 01 003 0 0 0 0 0 1 1 31
> Jul 8 14:57:58 kodscha 02 003 1 0 0 0 0 0 0 30
>
> I've also seen strange CPU utilization -- with syslog-ng:
>
> top - 15:33:06 up 35 min, 4 users, load average: 1.70, 0.68, 0.37
> Tasks: 64 total, 4 running, 60 sleeping, 0 stopped, 0 zombie
> Cpu0 : 0.0%us,100.0%sy, 0.0%ni, 0.0%id, 0.0%wa, 0.0%hi, 0.0%si, 0.0%st
> Cpu1 : 6.4%us, 87.2%sy, 0.0%ni, 5.8%id, 0.0%wa, 0.6%hi, 0.0%si, 0.0%st
> Mem: 895384k total, 283568k used, 611816k free, 35492k buffers
> Swap: 1959920k total, 0k used, 1959920k free, 163044k cached
>
> PID USER PR NI VIRT RES SHR S %CPU %MEM TIME+ COMMAND
> 4632 root 20 0 17216 800 580 S 104 0.1 0:34.22 syslog-ng
> 28505 root 20 0 205m 11m 4024 S 6 1.3 0:21.16 X
> 28518 root 20 0 56292 5652 4492 S 1 0.6 0:01.80 fluxbox
> 1 root 20 0 3724 608 508 S 0 0.1 0:00.36 init
>
> So far I have no clue why C1E-idle in conjunction with virtual wire
> mode causes this strange behaviour.
>
> ... and I start to think about the root cause of all this.
>
> I've performed similar tests under X with the IRQ0/INT0 configuration and
> I did not see above symptoms.
So lets fall back to the IRQ0/INT0 configuration on this box.
This basically restores the dont-use-the-lapic-timer exception mechanism
that was unconditional on this box prior commit 8750bf5 ("x86: add C1E
aware idle function").
Signed-off-by: Ingo Molnar <mingo@elte.hu>
2008-07-08 18:12:26 +04:00
|
|
|
{
|
|
|
|
.callback = dmi_ignore_irq0_timer_override,
|
|
|
|
.ident = "HP NX6125 laptop",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
|
|
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6125"),
|
|
|
|
},
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.callback = dmi_ignore_irq0_timer_override,
|
|
|
|
.ident = "HP NX6325 laptop",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
|
|
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq nx6325"),
|
|
|
|
},
|
|
|
|
},
|
2008-10-06 13:59:29 +04:00
|
|
|
{
|
|
|
|
.callback = dmi_ignore_irq0_timer_override,
|
|
|
|
.ident = "HP 6715b laptop",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
|
|
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq 6715b"),
|
|
|
|
},
|
|
|
|
},
|
2012-06-04 11:00:06 +04:00
|
|
|
{
|
|
|
|
.callback = dmi_ignore_irq0_timer_override,
|
|
|
|
.ident = "FUJITSU SIEMENS",
|
|
|
|
.matches = {
|
|
|
|
DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
|
|
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "AMILO PRO V2030"),
|
|
|
|
},
|
|
|
|
},
|
2005-08-05 08:44:28 +04:00
|
|
|
{}
|
2005-06-26 01:54:42 +04:00
|
|
|
};
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
/*
|
|
|
|
* acpi_boot_table_init() and acpi_boot_init()
|
|
|
|
* called from setup_arch(), always.
|
|
|
|
* 1. checksums all tables
|
|
|
|
* 2. enumerates lapics
|
|
|
|
* 3. enumerates io-apics
|
|
|
|
*
|
|
|
|
* acpi_table_init() is separate to allow reading SRAT without
|
|
|
|
* other side effects.
|
|
|
|
*
|
|
|
|
* side effects of acpi_boot_init:
|
|
|
|
* acpi_lapic = 1 if LAPIC found
|
|
|
|
* acpi_ioapic = 1 if IOAPIC found
|
|
|
|
* if (acpi_lapic && acpi_ioapic) smp_found_config = 1;
|
|
|
|
* if acpi_blacklisted() acpi_disabled = 1;
|
|
|
|
* acpi_irq_model=...
|
|
|
|
* ...
|
|
|
|
*/
|
|
|
|
|
2010-01-07 00:11:06 +03:00
|
|
|
void __init acpi_boot_table_init(void)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2005-06-26 01:54:42 +04:00
|
|
|
dmi_check_system(acpi_dmi_table);
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
/*
|
|
|
|
* If acpi_disabled, bail out
|
|
|
|
*/
|
2010-02-19 08:09:22 +03:00
|
|
|
if (acpi_disabled)
|
2016-08-20 02:24:01 +03:00
|
|
|
return;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
/*
|
2005-04-17 02:20:36 +04:00
|
|
|
* Initialize the ACPI boot-time table parser.
|
|
|
|
*/
|
2010-01-07 00:11:06 +03:00
|
|
|
if (acpi_table_init()) {
|
2005-04-17 02:20:36 +04:00
|
|
|
disable_acpi();
|
2010-01-07 00:11:06 +03:00
|
|
|
return;
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* blacklist may disable ACPI entirely
|
|
|
|
*/
|
2010-01-07 00:11:06 +03:00
|
|
|
if (acpi_blacklisted()) {
|
2005-04-17 02:20:36 +04:00
|
|
|
if (acpi_force) {
|
|
|
|
printk(KERN_WARNING PREFIX "acpi=force override\n");
|
|
|
|
} else {
|
|
|
|
printk(KERN_WARNING PREFIX "Disabling ACPI support\n");
|
|
|
|
disable_acpi();
|
2010-01-07 00:11:06 +03:00
|
|
|
return;
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
|
|
|
}
|
2008-02-19 14:21:06 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
int __init early_acpi_boot_init(void)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* If acpi_disabled, bail out
|
|
|
|
*/
|
2010-02-19 08:09:22 +03:00
|
|
|
if (acpi_disabled)
|
2008-02-19 14:21:06 +03:00
|
|
|
return 1;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Process the Multiple APIC Description Table (MADT), if present
|
|
|
|
*/
|
|
|
|
early_acpi_process_madt();
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2015-03-11 11:09:00 +03:00
|
|
|
/*
|
|
|
|
* Hardware-reduced ACPI mode initialization:
|
|
|
|
*/
|
|
|
|
acpi_reduced_hw_init();
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int __init acpi_boot_init(void)
|
|
|
|
{
|
2008-10-22 15:08:31 +04:00
|
|
|
/* those are executed after early-quirks are executed */
|
|
|
|
dmi_check_system(acpi_dmi_table_late);
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
/*
|
|
|
|
* If acpi_disabled, bail out
|
|
|
|
*/
|
2010-02-19 08:09:22 +03:00
|
|
|
if (acpi_disabled)
|
2005-08-05 08:44:28 +04:00
|
|
|
return 1;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_table_parse(ACPI_SIG_BOOT, acpi_parse_sbf);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* set sci_int and PM timer address
|
|
|
|
*/
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_table_parse(ACPI_SIG_FADT, acpi_parse_fadt);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Process the Multiple APIC Description Table (MADT), if present
|
|
|
|
*/
|
|
|
|
acpi_process_madt();
|
|
|
|
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_table_parse(ACPI_SIG_HPET, acpi_parse_hpet);
|
2017-01-31 16:21:40 +03:00
|
|
|
if (IS_ENABLED(CONFIG_ACPI_BGRT))
|
|
|
|
acpi_table_parse(ACPI_SIG_BGRT, acpi_parse_bgrt);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2009-08-29 18:24:51 +04:00
|
|
|
if (!acpi_noirq)
|
|
|
|
x86_init.pci.init = pci_acpi_init;
|
|
|
|
|
2018-01-18 18:09:51 +03:00
|
|
|
/* Do not enable ACPI SPCR console by default */
|
|
|
|
acpi_parse_spcr(earlycon_acpi_spcr_enable, false);
|
2005-04-17 02:20:36 +04:00
|
|
|
return 0;
|
|
|
|
}
|
2006-09-26 12:52:32 +04:00
|
|
|
|
|
|
|
static int __init parse_acpi(char *arg)
|
|
|
|
{
|
|
|
|
if (!arg)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
/* "acpi=off" disables both ACPI table parsing and interpreter */
|
|
|
|
if (strcmp(arg, "off") == 0) {
|
|
|
|
disable_acpi();
|
|
|
|
}
|
|
|
|
/* acpi=force to over-ride black-list */
|
|
|
|
else if (strcmp(arg, "force") == 0) {
|
|
|
|
acpi_force = 1;
|
|
|
|
acpi_disabled = 0;
|
|
|
|
}
|
|
|
|
/* acpi=strict disables out-of-spec workarounds */
|
|
|
|
else if (strcmp(arg, "strict") == 0) {
|
|
|
|
acpi_strict = 1;
|
|
|
|
}
|
2008-12-17 11:55:18 +03:00
|
|
|
/* acpi=rsdt use RSDT instead of XSDT */
|
|
|
|
else if (strcmp(arg, "rsdt") == 0) {
|
2014-01-08 09:43:40 +04:00
|
|
|
acpi_gbl_do_not_use_xsdt = TRUE;
|
2008-12-17 11:55:18 +03:00
|
|
|
}
|
2006-09-26 12:52:32 +04:00
|
|
|
/* "acpi=noirq" disables ACPI interrupt routing */
|
|
|
|
else if (strcmp(arg, "noirq") == 0) {
|
|
|
|
acpi_noirq_set();
|
2010-04-08 10:34:27 +04:00
|
|
|
}
|
|
|
|
/* "acpi=copy_dsdt" copys DSDT */
|
|
|
|
else if (strcmp(arg, "copy_dsdt") == 0) {
|
|
|
|
acpi_gbl_copy_dsdt_locally = 1;
|
2013-07-01 19:38:54 +04:00
|
|
|
}
|
|
|
|
/* "acpi=nocmcff" disables FF mode for corrected errors */
|
|
|
|
else if (strcmp(arg, "nocmcff") == 0) {
|
|
|
|
acpi_disable_cmcff = 1;
|
2006-09-26 12:52:32 +04:00
|
|
|
} else {
|
|
|
|
/* Core will printk when we return error. */
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
early_param("acpi", parse_acpi);
|
|
|
|
|
|
|
|
/* FIXME: Using pci= for an ACPI parameter is a travesty. */
|
|
|
|
static int __init parse_pci(char *arg)
|
|
|
|
{
|
|
|
|
if (arg && strcmp(arg, "noacpi") == 0)
|
|
|
|
acpi_disable_pci();
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
early_param("pci", parse_pci);
|
|
|
|
|
2008-06-21 03:11:20 +04:00
|
|
|
int __init acpi_mps_check(void)
|
|
|
|
{
|
|
|
|
#if defined(CONFIG_X86_LOCAL_APIC) && !defined(CONFIG_X86_MPPARSE)
|
|
|
|
/* mptable code is not built-in*/
|
|
|
|
if (acpi_disabled || acpi_noirq) {
|
|
|
|
printk(KERN_WARNING "MPS support code is not built-in.\n"
|
|
|
|
"Using acpi=off or acpi=noirq or pci=noacpi "
|
|
|
|
"may have problem\n");
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2006-09-26 12:52:32 +04:00
|
|
|
#ifdef CONFIG_X86_IO_APIC
|
|
|
|
static int __init parse_acpi_skip_timer_override(char *arg)
|
|
|
|
{
|
|
|
|
acpi_skip_timer_override = 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
early_param("acpi_skip_timer_override", parse_acpi_skip_timer_override);
|
2006-11-14 18:57:46 +03:00
|
|
|
|
|
|
|
static int __init parse_acpi_use_timer_override(char *arg)
|
|
|
|
{
|
|
|
|
acpi_use_timer_override = 1;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
early_param("acpi_use_timer_override", parse_acpi_use_timer_override);
|
2006-09-26 12:52:32 +04:00
|
|
|
#endif /* CONFIG_X86_IO_APIC */
|
|
|
|
|
|
|
|
static int __init setup_acpi_sci(char *s)
|
|
|
|
{
|
|
|
|
if (!s)
|
|
|
|
return -EINVAL;
|
|
|
|
if (!strcmp(s, "edge"))
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_sci_flags = ACPI_MADT_TRIGGER_EDGE |
|
|
|
|
(acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
|
2006-09-26 12:52:32 +04:00
|
|
|
else if (!strcmp(s, "level"))
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_sci_flags = ACPI_MADT_TRIGGER_LEVEL |
|
|
|
|
(acpi_sci_flags & ~ACPI_MADT_TRIGGER_MASK);
|
2006-09-26 12:52:32 +04:00
|
|
|
else if (!strcmp(s, "high"))
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_HIGH |
|
|
|
|
(acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
|
2006-09-26 12:52:32 +04:00
|
|
|
else if (!strcmp(s, "low"))
|
2007-02-02 19:48:22 +03:00
|
|
|
acpi_sci_flags = ACPI_MADT_POLARITY_ACTIVE_LOW |
|
|
|
|
(acpi_sci_flags & ~ACPI_MADT_POLARITY_MASK);
|
2006-09-26 12:52:32 +04:00
|
|
|
else
|
|
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
early_param("acpi_sci", setup_acpi_sci);
|
2006-10-21 01:30:27 +04:00
|
|
|
|
|
|
|
int __acpi_acquire_global_lock(unsigned int *lock)
|
|
|
|
{
|
|
|
|
unsigned int old, new, val;
|
|
|
|
do {
|
|
|
|
old = *lock;
|
|
|
|
new = (((old & ~0x3) + 2) + ((old >> 1) & 0x1));
|
|
|
|
val = cmpxchg(lock, old, new);
|
|
|
|
} while (unlikely (val != old));
|
|
|
|
return (new < 3) ? -1 : 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int __acpi_release_global_lock(unsigned int *lock)
|
|
|
|
{
|
|
|
|
unsigned int old, new, val;
|
|
|
|
do {
|
|
|
|
old = *lock;
|
|
|
|
new = old & ~0x3;
|
|
|
|
val = cmpxchg(lock, old, new);
|
|
|
|
} while (unlikely (val != old));
|
|
|
|
return old & 0x1;
|
|
|
|
}
|
2012-10-01 02:23:53 +04:00
|
|
|
|
|
|
|
void __init arch_reserve_mem_area(acpi_physical_address addr, size_t size)
|
|
|
|
{
|
2017-01-28 19:09:33 +03:00
|
|
|
e820__range_add(addr, size, E820_TYPE_ACPI);
|
2017-01-28 16:03:04 +03:00
|
|
|
e820__update_table_print();
|
2012-10-01 02:23:53 +04:00
|
|
|
}
|
2018-10-10 09:14:56 +03:00
|
|
|
|
|
|
|
u64 x86_default_get_root_pointer(void)
|
|
|
|
{
|
2018-11-20 10:25:29 +03:00
|
|
|
return boot_params.acpi_rsdp_addr;
|
2018-10-10 09:14:56 +03:00
|
|
|
}
|