2012-05-10 18:16:00 +04:00
|
|
|
/*
|
2013-06-07 17:22:47 +04:00
|
|
|
* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
|
2012-05-10 18:16:00 +04:00
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or modify
|
|
|
|
* it under the terms of the GNU General Public License version 2 as
|
|
|
|
* published by the Free Software Foundation.
|
|
|
|
*/
|
|
|
|
/dts-v1/;
|
|
|
|
|
2013-05-31 16:32:55 +04:00
|
|
|
#include "omap5.dtsi"
|
2012-05-10 18:16:00 +04:00
|
|
|
|
|
|
|
/ {
|
2013-06-07 17:22:47 +04:00
|
|
|
model = "TI OMAP5 uEVM board";
|
|
|
|
compatible = "ti,omap5-uevm", "ti,omap5";
|
2012-05-10 18:16:00 +04:00
|
|
|
|
|
|
|
memory {
|
|
|
|
device_type = "memory";
|
2013-01-18 10:13:16 +04:00
|
|
|
reg = <0x80000000 0x7F000000>; /* 2032 MB */
|
2012-05-10 18:16:00 +04:00
|
|
|
};
|
2012-08-07 11:18:21 +04:00
|
|
|
|
|
|
|
vmmcsd_fixed: fixedregulator-mmcsd {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "vmmcsd_fixed";
|
|
|
|
regulator-min-microvolt = <3000000>;
|
|
|
|
regulator-max-microvolt = <3000000>;
|
|
|
|
};
|
2012-07-25 09:33:27 +04:00
|
|
|
|
2013-06-07 17:22:48 +04:00
|
|
|
/* HS USB Port 2 RESET */
|
|
|
|
hsusb2_reset: hsusb2_reset_reg {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "hsusb2_reset";
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>; /* gpio3_80 HUB_NRESET */
|
|
|
|
startup-delay-us = <70000>;
|
|
|
|
enable-active-high;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* HS USB Host PHY on PORT 2 */
|
|
|
|
hsusb2_phy: hsusb2_phy {
|
|
|
|
compatible = "usb-nop-xceiv";
|
|
|
|
reset-supply = <&hsusb2_reset>;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* HS USB Port 3 RESET */
|
|
|
|
hsusb3_reset: hsusb3_reset_reg {
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
regulator-name = "hsusb3_reset";
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; /* gpio3_79 ETH_NRESET */
|
|
|
|
startup-delay-us = <70000>;
|
|
|
|
enable-active-high;
|
|
|
|
};
|
|
|
|
|
|
|
|
/* HS USB Host PHY on PORT 3 */
|
|
|
|
hsusb3_phy: hsusb3_phy {
|
|
|
|
compatible = "usb-nop-xceiv";
|
|
|
|
reset-supply = <&hsusb3_reset>;
|
|
|
|
};
|
|
|
|
|
2013-06-07 17:22:49 +04:00
|
|
|
leds {
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
led@1 {
|
|
|
|
label = "omap5:blue:usr1";
|
|
|
|
gpios = <&gpio5 25 GPIO_ACTIVE_HIGH>; /* gpio5_153 D1 LED */
|
|
|
|
linux,default-trigger = "heartbeat";
|
|
|
|
default-state = "off";
|
|
|
|
};
|
|
|
|
};
|
2012-08-07 11:18:21 +04:00
|
|
|
};
|
|
|
|
|
2012-10-04 15:57:28 +04:00
|
|
|
&omap5_pmx_core {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <
|
|
|
|
&twl6040_pins
|
|
|
|
&mcpdm_pins
|
|
|
|
&dmic_pins
|
|
|
|
&mcbsp1_pins
|
|
|
|
&mcbsp2_pins
|
2013-06-07 17:22:48 +04:00
|
|
|
&usbhost_pins
|
2013-06-07 17:22:49 +04:00
|
|
|
&led_gpio_pins
|
2012-10-04 15:57:28 +04:00
|
|
|
>;
|
|
|
|
|
|
|
|
twl6040_pins: pinmux_twl6040_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
|
2012-10-04 15:57:28 +04:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
mcpdm_pins: pinmux_mcpdm_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0x142 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abe_clks.abe_clks */
|
|
|
|
0x15c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_ul_data.abemcpdm_ul_data */
|
|
|
|
0x15e (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_dl_data.abemcpdm_dl_data */
|
|
|
|
0x160 (PIN_INPUT_PULLUP | MUX_MODE0) /* abemcpdm_frame.abemcpdm_frame */
|
|
|
|
0x162 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcpdm_lb_clk.abemcpdm_lb_clk */
|
2012-10-04 15:57:28 +04:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
dmic_pins: pinmux_dmic_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */
|
|
|
|
0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */
|
|
|
|
0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */
|
|
|
|
0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */
|
2012-10-04 15:57:28 +04:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
mcbsp1_pins: pinmux_mcbsp1_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
|
|
|
|
0x14e (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* abedmic_clk3.abemcbsp1_dx */
|
|
|
|
0x150 (PIN_INPUT | MUX_MODE1) /* abeslimbus1_clock.abemcbsp1_clkx */
|
|
|
|
0x152 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* abeslimbus1_data.abemcbsp1_dr */
|
2012-10-04 15:57:28 +04:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
mcbsp2_pins: pinmux_mcbsp2_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0x154 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dr.abemcbsp2_dr */
|
|
|
|
0x156 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* abemcbsp2_dx.abemcbsp2_dx */
|
|
|
|
0x158 (PIN_INPUT | MUX_MODE0) /* abemcbsp2_fsx.abemcbsp2_fsx */
|
|
|
|
0x15a (PIN_INPUT | MUX_MODE0) /* abemcbsp2_clkx.abemcbsp2_clkx */
|
2012-10-04 15:57:28 +04:00
|
|
|
>;
|
|
|
|
};
|
2013-02-13 13:28:22 +04:00
|
|
|
|
2013-05-31 16:32:59 +04:00
|
|
|
i2c1_pins: pinmux_i2c1_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
0x1b2 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
|
|
|
0x1b4 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
|
|
|
>;
|
|
|
|
};
|
2013-02-13 13:28:22 +04:00
|
|
|
|
|
|
|
i2c5_pins: pinmux_i2c5_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0x184 (PIN_INPUT | MUX_MODE0) /* i2c5_scl */
|
|
|
|
0x186 (PIN_INPUT | MUX_MODE0) /* i2c5_sda */
|
2013-02-13 13:28:22 +04:00
|
|
|
>;
|
|
|
|
};
|
2013-02-13 13:28:44 +04:00
|
|
|
|
|
|
|
mcspi2_pins: pinmux_mcspi2_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
|
|
|
|
0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
|
|
|
|
0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
|
|
|
|
0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */
|
2013-02-13 13:28:44 +04:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
mcspi3_pins: pinmux_mcspi3_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
|
|
|
|
0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
|
|
|
|
0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
|
|
|
|
0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
|
2013-02-13 13:28:44 +04:00
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
mcspi4_pins: pinmux_mcspi4_pins {
|
|
|
|
pinctrl-single,pins = <
|
2013-05-31 16:32:59 +04:00
|
|
|
0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
|
|
|
|
0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
|
|
|
|
0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
|
|
|
|
0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
|
2013-02-13 13:28:44 +04:00
|
|
|
>;
|
|
|
|
};
|
2013-06-07 17:22:48 +04:00
|
|
|
|
|
|
|
usbhost_pins: pinmux_usbhost_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
0x84 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */
|
|
|
|
0x86 (PIN_INPUT | MUX_MODE0) /* usbb2_hsic_data */
|
|
|
|
|
|
|
|
0x19e (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_strobe */
|
|
|
|
0x1a0 (PIN_INPUT | MUX_MODE0) /* usbb3_hsic_data */
|
|
|
|
|
|
|
|
0x70 (PIN_OUTPUT | MUX_MODE6) /* gpio3_80 HUB_NRESET */
|
|
|
|
0x6e (PIN_OUTPUT | MUX_MODE6) /* gpio3_79 ETH_NRESET */
|
|
|
|
>;
|
|
|
|
};
|
2013-06-07 17:22:49 +04:00
|
|
|
|
|
|
|
led_gpio_pins: pinmux_led_gpio_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
0x196 (PIN_OUTPUT | MUX_MODE6) /* uart3_cts_rctx.gpio5_153 */
|
|
|
|
>;
|
|
|
|
};
|
2013-06-07 17:22:50 +04:00
|
|
|
|
|
|
|
uart1_pins: pinmux_uart1_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
0x60 (PIN_OUTPUT | MUX_MODE0) /* uart1_tx.uart1_cts */
|
|
|
|
0x62 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_tx.uart1_cts */
|
|
|
|
0x64 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rx.uart1_rts */
|
|
|
|
0x66 (PIN_OUTPUT | MUX_MODE0) /* uart1_rx.uart1_rts */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
uart3_pins: pinmux_uart3_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
0x19a (PIN_OUTPUT | MUX_MODE0) /* uart3_rts_irsd.uart3_tx_irtx */
|
|
|
|
0x19c (PIN_INPUT_PULLUP | MUX_MODE0) /* uart3_rx_irrx.uart3_usbb3_hsic */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
|
|
|
uart5_pins: pinmux_uart5_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_rx.uart5_rx */
|
|
|
|
0x172 (PIN_OUTPUT | MUX_MODE0) /* uart5_tx.uart5_tx */
|
|
|
|
0x174 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart5_cts.uart5_rts */
|
|
|
|
0x176 (PIN_OUTPUT | MUX_MODE0) /* uart5_cts.uart5_rts */
|
|
|
|
>;
|
|
|
|
};
|
|
|
|
|
2013-06-07 17:22:48 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
&omap5_pmx_wkup {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <
|
|
|
|
&usbhost_wkup_pins
|
|
|
|
>;
|
|
|
|
|
|
|
|
usbhost_wkup_pins: pinmux_usbhost_wkup_pins {
|
|
|
|
pinctrl-single,pins = <
|
|
|
|
0x1A (PIN_OUTPUT | MUX_MODE0) /* fref_clk1_out, USB hub clk */
|
|
|
|
>;
|
|
|
|
};
|
2012-10-04 15:57:28 +04:00
|
|
|
};
|
|
|
|
|
2012-08-07 11:18:21 +04:00
|
|
|
&mmc1 {
|
|
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
|
|
|
bus-width = <4>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&mmc2 {
|
|
|
|
vmmc-supply = <&vmmcsd_fixed>;
|
|
|
|
bus-width = <8>;
|
|
|
|
ti,non-removable;
|
|
|
|
};
|
|
|
|
|
|
|
|
&mmc3 {
|
|
|
|
bus-width = <4>;
|
|
|
|
ti,non-removable;
|
|
|
|
};
|
|
|
|
|
|
|
|
&mmc4 {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
&mmc5 {
|
|
|
|
status = "disabled";
|
2012-05-10 18:16:00 +04:00
|
|
|
};
|
2012-07-25 09:32:43 +04:00
|
|
|
|
2013-02-13 13:28:22 +04:00
|
|
|
&i2c1 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&i2c1_pins>;
|
|
|
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&i2c5 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&i2c5_pins>;
|
|
|
|
|
|
|
|
clock-frequency = <400000>;
|
|
|
|
};
|
|
|
|
|
2012-10-04 15:57:24 +04:00
|
|
|
&mcbsp3 {
|
|
|
|
status = "disabled";
|
|
|
|
};
|
2012-11-05 16:52:52 +04:00
|
|
|
|
2013-06-07 17:22:48 +04:00
|
|
|
&usbhshost {
|
|
|
|
port2-mode = "ehci-hsic";
|
|
|
|
port3-mode = "ehci-hsic";
|
|
|
|
};
|
|
|
|
|
|
|
|
&usbhsehci {
|
|
|
|
phys = <0 &hsusb2_phy &hsusb3_phy>;
|
|
|
|
};
|
|
|
|
|
2013-02-13 13:28:44 +04:00
|
|
|
&mcspi1 {
|
|
|
|
|
|
|
|
};
|
|
|
|
|
|
|
|
&mcspi2 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&mcspi2_pins>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&mcspi3 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&mcspi3_pins>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&mcspi4 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&mcspi4_pins>;
|
|
|
|
};
|
2013-06-07 17:22:50 +04:00
|
|
|
|
|
|
|
&uart1 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&uart1_pins>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart3 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&uart3_pins>;
|
|
|
|
};
|
|
|
|
|
|
|
|
&uart5 {
|
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&uart5_pins>;
|
|
|
|
};
|