2018-05-31 20:11:02 +03:00
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// SPDX-License-Identifier: GPL-2.0
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2017-05-28 02:23:35 +03:00
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/*
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* Copyright (c) 2016-2017, Linaro Ltd
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*/
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#include <linux/idr.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/list.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/rpmsg.h>
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#include <linux/slab.h>
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#include <linux/workqueue.h>
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#include <linux/mailbox_client.h>
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#include "rpmsg_internal.h"
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2017-08-24 10:21:26 +03:00
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#include "qcom_glink_native.h"
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2017-05-28 02:23:35 +03:00
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#define RPM_TOC_SIZE 256
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#define RPM_TOC_MAGIC 0x67727430 /* grt0 */
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#define RPM_TOC_MAX_ENTRIES ((RPM_TOC_SIZE - sizeof(struct rpm_toc)) / \
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sizeof(struct rpm_toc_entry))
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#define RPM_TX_FIFO_ID 0x61703272 /* ap2r */
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#define RPM_RX_FIFO_ID 0x72326170 /* r2ap */
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2017-08-24 10:21:26 +03:00
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#define to_rpm_pipe(p) container_of(p, struct glink_rpm_pipe, native)
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2017-08-24 10:21:24 +03:00
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2017-05-28 02:23:35 +03:00
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struct rpm_toc_entry {
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__le32 id;
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__le32 offset;
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__le32 size;
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} __packed;
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struct rpm_toc {
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__le32 magic;
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__le32 count;
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struct rpm_toc_entry entries[];
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} __packed;
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struct glink_rpm_pipe {
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2017-08-24 10:21:24 +03:00
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struct qcom_glink_pipe native;
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2017-05-28 02:23:35 +03:00
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void __iomem *tail;
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void __iomem *head;
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void __iomem *fifo;
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};
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2023-02-13 18:52:12 +03:00
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struct glink_rpm {
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struct qcom_glink *glink;
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struct glink_rpm_pipe rx_pipe;
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struct glink_rpm_pipe tx_pipe;
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};
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2017-08-24 10:21:24 +03:00
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static size_t glink_rpm_rx_avail(struct qcom_glink_pipe *glink_pipe)
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2017-05-28 02:23:35 +03:00
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{
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2017-08-24 10:21:24 +03:00
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struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
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2017-05-28 02:23:35 +03:00
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unsigned int head;
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unsigned int tail;
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head = readl(pipe->head);
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tail = readl(pipe->tail);
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if (head < tail)
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2017-08-24 10:21:24 +03:00
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return pipe->native.length - tail + head;
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2017-05-28 02:23:35 +03:00
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else
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return head - tail;
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}
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2017-08-24 10:21:24 +03:00
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static void glink_rpm_rx_peak(struct qcom_glink_pipe *glink_pipe,
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2017-08-24 10:21:36 +03:00
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void *data, unsigned int offset, size_t count)
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2017-05-28 02:23:35 +03:00
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{
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2017-08-24 10:21:24 +03:00
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struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
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2017-05-28 02:23:35 +03:00
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unsigned int tail;
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size_t len;
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tail = readl(pipe->tail);
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2017-08-24 10:21:36 +03:00
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tail += offset;
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if (tail >= pipe->native.length)
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tail -= pipe->native.length;
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2017-05-28 02:23:35 +03:00
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2017-08-24 10:21:24 +03:00
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len = min_t(size_t, count, pipe->native.length - tail);
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2017-05-28 02:23:35 +03:00
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if (len) {
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__ioread32_copy(data, pipe->fifo + tail,
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len / sizeof(u32));
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}
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if (len != count) {
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__ioread32_copy(data + len, pipe->fifo,
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(count - len) / sizeof(u32));
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}
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}
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2017-08-24 10:21:24 +03:00
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static void glink_rpm_rx_advance(struct qcom_glink_pipe *glink_pipe,
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size_t count)
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{
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struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
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2017-05-28 02:23:35 +03:00
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unsigned int tail;
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tail = readl(pipe->tail);
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tail += count;
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2017-08-24 10:21:24 +03:00
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if (tail >= pipe->native.length)
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tail -= pipe->native.length;
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2017-05-28 02:23:35 +03:00
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writel(tail, pipe->tail);
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}
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2017-08-24 10:21:24 +03:00
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static size_t glink_rpm_tx_avail(struct qcom_glink_pipe *glink_pipe)
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2017-05-28 02:23:35 +03:00
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{
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2017-08-24 10:21:24 +03:00
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struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
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2017-05-28 02:23:35 +03:00
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unsigned int head;
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unsigned int tail;
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head = readl(pipe->head);
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tail = readl(pipe->tail);
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if (tail <= head)
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2017-08-24 10:21:24 +03:00
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return pipe->native.length - head + tail;
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2017-05-28 02:23:35 +03:00
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else
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return tail - head;
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}
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2017-08-24 10:21:24 +03:00
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static unsigned int glink_rpm_tx_write_one(struct glink_rpm_pipe *pipe,
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unsigned int head,
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const void *data, size_t count)
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2017-05-28 02:23:35 +03:00
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{
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size_t len;
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2017-08-24 10:21:24 +03:00
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len = min_t(size_t, count, pipe->native.length - head);
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2017-05-28 02:23:35 +03:00
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if (len) {
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__iowrite32_copy(pipe->fifo + head, data,
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len / sizeof(u32));
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}
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if (len != count) {
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__iowrite32_copy(pipe->fifo, data + len,
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(count - len) / sizeof(u32));
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}
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head += count;
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2017-08-24 10:21:24 +03:00
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if (head >= pipe->native.length)
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head -= pipe->native.length;
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2017-05-28 02:23:35 +03:00
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return head;
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}
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2017-08-24 10:21:24 +03:00
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static void glink_rpm_tx_write(struct qcom_glink_pipe *glink_pipe,
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const void *hdr, size_t hlen,
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const void *data, size_t dlen)
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{
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struct glink_rpm_pipe *pipe = to_rpm_pipe(glink_pipe);
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2017-08-24 10:21:27 +03:00
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size_t tlen = hlen + dlen;
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size_t aligned_dlen;
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2017-08-24 10:21:24 +03:00
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unsigned int head;
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2017-08-24 10:21:27 +03:00
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char padding[8] = {0};
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size_t pad;
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/* Header length comes from glink native and is always 4 byte aligned */
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if (WARN(hlen % 4, "Glink Header length must be 4 bytes aligned\n"))
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return;
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/*
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* Move the unaligned tail of the message to the padding chunk, to
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* ensure word aligned accesses
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*/
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aligned_dlen = ALIGN_DOWN(dlen, 4);
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if (aligned_dlen != dlen)
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memcpy(padding, data + aligned_dlen, dlen - aligned_dlen);
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2017-08-24 10:21:24 +03:00
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head = readl(pipe->head);
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head = glink_rpm_tx_write_one(pipe, head, hdr, hlen);
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2017-08-24 10:21:27 +03:00
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head = glink_rpm_tx_write_one(pipe, head, data, aligned_dlen);
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pad = ALIGN(tlen, 8) - ALIGN_DOWN(tlen, 4);
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if (pad)
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head = glink_rpm_tx_write_one(pipe, head, padding, pad);
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2017-08-24 10:21:24 +03:00
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writel(head, pipe->head);
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}
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2017-05-28 02:23:35 +03:00
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static int glink_rpm_parse_toc(struct device *dev,
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void __iomem *msg_ram,
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size_t msg_ram_size,
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struct glink_rpm_pipe *rx,
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struct glink_rpm_pipe *tx)
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{
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struct rpm_toc *toc;
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int num_entries;
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unsigned int id;
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size_t offset;
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size_t size;
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void *buf;
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int i;
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buf = kzalloc(RPM_TOC_SIZE, GFP_KERNEL);
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if (!buf)
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return -ENOMEM;
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__ioread32_copy(buf, msg_ram + msg_ram_size - RPM_TOC_SIZE,
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RPM_TOC_SIZE / sizeof(u32));
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toc = buf;
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if (le32_to_cpu(toc->magic) != RPM_TOC_MAGIC) {
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dev_err(dev, "RPM TOC has invalid magic\n");
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goto err_inval;
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}
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num_entries = le32_to_cpu(toc->count);
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if (num_entries > RPM_TOC_MAX_ENTRIES) {
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dev_err(dev, "Invalid number of toc entries\n");
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goto err_inval;
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}
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for (i = 0; i < num_entries; i++) {
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id = le32_to_cpu(toc->entries[i].id);
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offset = le32_to_cpu(toc->entries[i].offset);
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size = le32_to_cpu(toc->entries[i].size);
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if (offset > msg_ram_size || offset + size > msg_ram_size) {
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dev_err(dev, "TOC entry with invalid size\n");
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continue;
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}
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switch (id) {
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case RPM_RX_FIFO_ID:
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2017-08-24 10:21:24 +03:00
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rx->native.length = size;
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2017-05-28 02:23:35 +03:00
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rx->tail = msg_ram + offset;
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rx->head = msg_ram + offset + sizeof(u32);
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rx->fifo = msg_ram + offset + 2 * sizeof(u32);
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break;
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case RPM_TX_FIFO_ID:
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2017-08-24 10:21:24 +03:00
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tx->native.length = size;
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2017-05-28 02:23:35 +03:00
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tx->tail = msg_ram + offset;
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tx->head = msg_ram + offset + sizeof(u32);
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tx->fifo = msg_ram + offset + 2 * sizeof(u32);
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break;
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}
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}
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if (!rx->fifo || !tx->fifo) {
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dev_err(dev, "Unable to find rx and tx descriptors\n");
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goto err_inval;
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}
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kfree(buf);
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return 0;
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err_inval:
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kfree(buf);
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return -EINVAL;
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}
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2017-08-24 10:21:25 +03:00
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static int glink_rpm_probe(struct platform_device *pdev)
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{
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struct qcom_glink *glink;
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2023-02-13 18:52:12 +03:00
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struct glink_rpm *rpm;
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2017-08-24 10:21:25 +03:00
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struct device_node *np;
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void __iomem *msg_ram;
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size_t msg_ram_size;
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struct device *dev = &pdev->dev;
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struct resource r;
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int ret;
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2023-02-13 18:52:12 +03:00
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rpm = devm_kzalloc(&pdev->dev, sizeof(*rpm), GFP_KERNEL);
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if (!rpm)
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2017-08-24 10:21:25 +03:00
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return -ENOMEM;
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2017-05-28 02:23:35 +03:00
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np = of_parse_phandle(dev->of_node, "qcom,rpm-msg-ram", 0);
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ret = of_address_to_resource(np, 0, &r);
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of_node_put(np);
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if (ret)
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return ret;
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msg_ram = devm_ioremap(dev, r.start, resource_size(&r));
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msg_ram_size = resource_size(&r);
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if (!msg_ram)
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return -ENOMEM;
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ret = glink_rpm_parse_toc(dev, msg_ram, msg_ram_size,
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2023-02-13 18:52:12 +03:00
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&rpm->rx_pipe, &rpm->tx_pipe);
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2017-05-28 02:23:35 +03:00
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if (ret)
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return ret;
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2017-08-24 10:21:24 +03:00
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/* Pipe specific accessors */
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2023-02-13 18:52:12 +03:00
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rpm->rx_pipe.native.avail = glink_rpm_rx_avail;
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rpm->rx_pipe.native.peak = glink_rpm_rx_peak;
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rpm->rx_pipe.native.advance = glink_rpm_rx_advance;
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rpm->tx_pipe.native.avail = glink_rpm_tx_avail;
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rpm->tx_pipe.native.write = glink_rpm_tx_write;
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2017-08-24 10:21:24 +03:00
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2023-02-13 18:52:12 +03:00
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writel(0, rpm->tx_pipe.head);
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writel(0, rpm->rx_pipe.tail);
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2017-05-28 02:23:35 +03:00
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2023-02-13 18:52:12 +03:00
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glink = qcom_glink_native_probe(dev,
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2017-08-24 10:21:32 +03:00
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0,
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2023-02-13 18:52:12 +03:00
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&rpm->rx_pipe.native,
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&rpm->tx_pipe.native,
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2017-08-24 10:21:34 +03:00
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true);
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2017-08-24 10:21:25 +03:00
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if (IS_ERR(glink))
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return PTR_ERR(glink);
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2017-05-28 02:23:35 +03:00
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2023-02-13 18:52:12 +03:00
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rpm->glink = glink;
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platform_set_drvdata(pdev, rpm);
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2017-05-28 02:23:35 +03:00
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return 0;
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}
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static int glink_rpm_remove(struct platform_device *pdev)
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{
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2023-02-13 18:52:12 +03:00
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struct glink_rpm *rpm = platform_get_drvdata(pdev);
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struct qcom_glink *glink = rpm->glink;
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2017-05-28 02:23:35 +03:00
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2017-08-24 10:21:26 +03:00
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qcom_glink_native_remove(glink);
|
2017-05-28 02:23:35 +03:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct of_device_id glink_rpm_of_match[] = {
|
|
|
|
{ .compatible = "qcom,glink-rpm" },
|
|
|
|
{}
|
|
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(of, glink_rpm_of_match);
|
|
|
|
|
|
|
|
static struct platform_driver glink_rpm_driver = {
|
|
|
|
.probe = glink_rpm_probe,
|
|
|
|
.remove = glink_rpm_remove,
|
|
|
|
.driver = {
|
|
|
|
.name = "qcom_glink_rpm",
|
|
|
|
.of_match_table = glink_rpm_of_match,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init glink_rpm_init(void)
|
|
|
|
{
|
|
|
|
return platform_driver_register(&glink_rpm_driver);
|
|
|
|
}
|
|
|
|
subsys_initcall(glink_rpm_init);
|
|
|
|
|
|
|
|
static void __exit glink_rpm_exit(void)
|
|
|
|
{
|
|
|
|
platform_driver_unregister(&glink_rpm_driver);
|
|
|
|
}
|
|
|
|
module_exit(glink_rpm_exit);
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Bjorn Andersson <bjorn.andersson@linaro.org>");
|
|
|
|
MODULE_DESCRIPTION("Qualcomm GLINK RPM driver");
|
|
|
|
MODULE_LICENSE("GPL v2");
|