2019-02-20 09:56:58 +03:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Non-emulated single-stepping support (currently limited to basic integer
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* computations) used to validate the instruction emulation infrastructure.
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*
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* Copyright (C) 2019 IBM Corporation
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*/
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#include <asm/asm-offsets.h>
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#include <asm/ppc_asm.h>
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#include <asm/code-patching-asm.h>
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#include <linux/errno.h>
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/* int exec_instr(struct pt_regs *regs) */
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_GLOBAL(exec_instr)
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/*
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* Stack frame layout (INT_FRAME_SIZE bytes)
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* In-memory pt_regs (SP + STACK_FRAME_OVERHEAD)
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* Scratch space (SP + 8)
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* Back chain (SP + 0)
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*/
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/*
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* Allocate a new stack frame with enough space to hold the register
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* states in an in-memory pt_regs and also create the back chain to
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* the caller's stack frame.
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*/
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stdu r1, -INT_FRAME_SIZE(r1)
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/*
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* Save non-volatile GPRs on stack. This includes TOC pointer (GPR2)
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* and local variables (GPR14 to GPR31). The register for the pt_regs
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* parameter (GPR3) is saved additionally to ensure that the resulting
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* register state can still be saved even if GPR3 gets overwritten
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* when loading the initial register state for the test instruction.
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* The stack pointer (GPR1) and the thread pointer (GPR13) are not
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* saved as these should not be modified anyway.
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*/
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SAVE_2GPRS(2, r1)
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SAVE_NVGPRS(r1)
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/*
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* Save LR on stack to ensure that the return address is available
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* even if it gets overwritten by the test instruction.
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*/
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mflr r0
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std r0, _LINK(r1)
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/*
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* Save CR on stack. For simplicity, the entire register is saved
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* even though only fields 2 to 4 are non-volatile.
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*/
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mfcr r0
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std r0, _CCR(r1)
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/*
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* Load register state for the test instruction without touching the
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* critical non-volatile registers. The register state is passed as a
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* pointer to a pt_regs instance.
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*/
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subi r31, r3, GPR0
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/* Load LR from pt_regs */
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ld r0, _LINK(r31)
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mtlr r0
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/* Load CR from pt_regs */
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ld r0, _CCR(r31)
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mtcr r0
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/* Load XER from pt_regs */
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ld r0, _XER(r31)
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mtxer r0
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/* Load GPRs from pt_regs */
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REST_GPR(0, r31)
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REST_10GPRS(2, r31)
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REST_GPR(12, r31)
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REST_NVGPRS(r31)
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/* Placeholder for the test instruction */
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2020-05-25 05:59:23 +03:00
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.balign 64
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2019-02-20 09:56:58 +03:00
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1: nop
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2020-05-25 05:59:23 +03:00
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nop
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2019-02-20 09:56:58 +03:00
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patch_site 1b patch__exec_instr
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/*
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* Since GPR3 is overwritten, temporarily restore it back to its
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* original state, i.e. the pointer to pt_regs, to ensure that the
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* resulting register state can be saved. Before doing this, a copy
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* of it is created in the scratch space which is used later on to
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* save it to pt_regs.
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*/
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std r3, 8(r1)
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REST_GPR(3, r1)
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/* Save resulting GPR state to pt_regs */
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subi r3, r3, GPR0
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SAVE_GPR(0, r3)
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SAVE_GPR(2, r3)
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SAVE_8GPRS(4, r3)
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SAVE_GPR(12, r3)
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SAVE_NVGPRS(r3)
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/* Save resulting LR to pt_regs */
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mflr r0
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std r0, _LINK(r3)
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/* Save resulting CR to pt_regs */
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mfcr r0
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std r0, _CCR(r3)
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/* Save resulting XER to pt_regs */
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mfxer r0
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std r0, _XER(r3)
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/* Restore resulting GPR3 from scratch space and save it to pt_regs */
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ld r0, 8(r1)
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std r0, GPR3(r3)
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/* Set return value to denote execution success */
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li r3, 0
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/* Continue */
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b 3f
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/* Set return value to denote execution failure */
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2: li r3, -EFAULT
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/* Restore the non-volatile GPRs from stack */
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3: REST_GPR(2, r1)
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REST_NVGPRS(r1)
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/* Restore LR from stack to be able to return */
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ld r0, _LINK(r1)
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mtlr r0
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/* Restore CR from stack */
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ld r0, _CCR(r1)
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mtcr r0
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/* Tear down stack frame */
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addi r1, r1, INT_FRAME_SIZE
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/* Return */
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blr
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/* Setup exception table */
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EX_TABLE(1b, 2b)
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_ASM_NOKPROBE_SYMBOL(exec_instr)
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