2005-04-17 02:20:36 +04:00
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/*
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2008-08-02 13:55:55 +04:00
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* arch/arm/include/asm/processor.h
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2005-04-17 02:20:36 +04:00
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*
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* Copyright (C) 1995-1999 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARM_PROCESSOR_H
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#define __ASM_ARM_PROCESSOR_H
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#ifdef __KERNEL__
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2010-09-03 13:42:55 +04:00
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#include <asm/hw_breakpoint.h>
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2005-04-17 02:20:36 +04:00
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#include <asm/ptrace.h>
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#include <asm/types.h>
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2013-07-02 15:10:42 +04:00
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#include <asm/unified.h>
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2005-04-17 02:20:36 +04:00
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2008-02-08 15:19:26 +03:00
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#ifdef __KERNEL__
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2008-12-05 05:25:47 +03:00
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#define STACK_TOP ((current->personality & ADDR_LIMIT_32BIT) ? \
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2008-02-08 15:19:26 +03:00
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TASK_SIZE : TASK_SIZE_26)
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#define STACK_TOP_MAX TASK_SIZE
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#endif
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2005-04-17 02:20:36 +04:00
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struct debug_info {
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2010-09-03 13:42:55 +04:00
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#ifdef CONFIG_HAVE_HW_BREAKPOINT
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struct perf_event *hbp[ARM_MAX_HBP_SLOTS];
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#endif
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2005-04-17 02:20:36 +04:00
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};
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struct thread_struct {
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/* fault info */
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unsigned long address;
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unsigned long trap_no;
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unsigned long error_code;
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/* debugging */
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struct debug_info debug;
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};
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2017-08-17 00:09:13 +03:00
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/*
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* Everything usercopied to/from thread_struct is statically-sized, so
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* no hardened usercopy whitelist is needed.
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*/
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static inline void arch_thread_struct_whitelist(unsigned long *offset,
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unsigned long *size)
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{
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*offset = *size = 0;
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}
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2005-04-17 02:20:36 +04:00
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#define INIT_THREAD { }
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#define start_thread(regs,pc,sp) \
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({ \
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2017-07-29 01:48:48 +03:00
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unsigned long r7, r8, r9; \
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\
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if (IS_ENABLED(CONFIG_BINFMT_ELF_FDPIC)) { \
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r7 = regs->ARM_r7; \
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r8 = regs->ARM_r8; \
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r9 = regs->ARM_r9; \
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} \
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2008-10-27 14:24:09 +03:00
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memset(regs->uregs, 0, sizeof(regs->uregs)); \
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2017-07-29 01:48:48 +03:00
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if (IS_ENABLED(CONFIG_BINFMT_ELF_FDPIC) && \
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current->personality & FDPIC_FUNCPTRS) { \
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regs->ARM_r7 = r7; \
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regs->ARM_r8 = r8; \
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regs->ARM_r9 = r9; \
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regs->ARM_r10 = current->mm->start_data; \
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} else if (!IS_ENABLED(CONFIG_MMU)) \
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regs->ARM_r10 = current->mm->start_data; \
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2005-04-17 02:20:36 +04:00
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if (current->personality & ADDR_LIMIT_32BIT) \
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regs->ARM_cpsr = USR_MODE; \
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else \
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regs->ARM_cpsr = USR26_MODE; \
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if (elf_hwcap & HWCAP_THUMB && pc & 1) \
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regs->ARM_cpsr |= PSR_T_BIT; \
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2009-05-30 17:00:18 +04:00
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regs->ARM_cpsr |= PSR_ENDSTATE; \
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2005-04-17 02:20:36 +04:00
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regs->ARM_pc = pc & ~1; /* pc */ \
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regs->ARM_sp = sp; /* sp */ \
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})
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/* Forward declaration, a strange C thing */
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struct task_struct;
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/* Free all resources held by a thread. */
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extern void release_thread(struct task_struct *);
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unsigned long get_wchan(struct task_struct *p);
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2011-03-04 14:38:54 +03:00
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#if __LINUX_ARM_ARCH__ == 6 || defined(CONFIG_ARM_ERRATA_754327)
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ARM: avoid Cortex-A9 livelock on tight dmb loops
machine_crash_nonpanic_core() does this:
while (1)
cpu_relax();
because the kernel has crashed, and we have no known safe way to deal
with the CPU. So, we place the CPU into an infinite loop which we
expect it to never exit - at least not until the system as a whole is
reset by some method.
In the absence of erratum 754327, this code assembles to:
b .
In other words, an infinite loop. When erratum 754327 is enabled,
this becomes:
1: dmb
b 1b
It has been observed that on some systems (eg, OMAP4) where, if a
crash is triggered, the system tries to kexec into the panic kernel,
but fails after taking the secondary CPU down - placing it into one
of these loops. This causes the system to livelock, and the most
noticable effect is the system stops after issuing:
Loading crashdump kernel...
to the system console.
The tested as working solution I came up with was to add wfe() to
these infinite loops thusly:
while (1) {
cpu_relax();
wfe();
}
which, without 754327 builds to:
1: wfe
b 1b
or with 754327 is enabled:
1: dmb
wfe
b 1b
Adding "wfe" does two things depending on the environment we're running
under:
- where we're running on bare metal, and the processor implements
"wfe", it stops us spinning endlessly in a loop where we're never
going to do any useful work.
- if we're running in a VM, it allows the CPU to be given back to the
hypervisor and rescheduled for other purposes (maybe a different VM)
rather than wasting CPU cycles inside a crashed VM.
However, in light of erratum 794072, Will Deacon wanted to see 10 nops
as well - which is reasonable to cover the case where we have erratum
754327 enabled _and_ we have a processor that doesn't implement the
wfe hint.
So, we now end up with:
1: wfe
b 1b
when erratum 754327 is disabled, or:
1: dmb
nop
nop
nop
nop
nop
nop
nop
nop
nop
nop
wfe
b 1b
when erratum 754327 is enabled. We also get the dmb + 10 nop
sequence elsewhere in the kernel, in terminating loops.
This is reasonable - it means we get the workaround for erratum
794072 when erratum 754327 is enabled, but still relinquish the dead
processor - either by placing it in a lower power mode when wfe is
implemented as such or by returning it to the hypervisior, or in the
case where wfe is a no-op, we use the workaround specified in erratum
794072 to avoid the problem.
These as two entirely orthogonal problems - the 10 nops addresses
erratum 794072, and the wfe is an optimisation that makes the system
more efficient when crashed either in terms of power consumption or
by allowing the host/other VMs to make use of the CPU.
I don't see any reason not to use kexec() inside a VM - it has the
potential to provide automated recovery from a failure of the VMs
kernel with the opportunity for saving a crashdump of the failure.
A panic() with a reboot timeout won't do that, and reading the
libvirt documentation, setting on_reboot to "preserve" won't either
(the documentation states "The preserve action for an on_reboot event
is treated as a destroy".) Surely it has to be a good thing to
avoiding having CPUs spinning inside a VM that is doing no useful
work.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2018-04-10 13:35:36 +03:00
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#define cpu_relax() \
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do { \
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smp_mb(); \
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__asm__ __volatile__("nop; nop; nop; nop; nop; nop; nop; nop; nop; nop;"); \
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} while (0)
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2010-06-21 18:29:03 +04:00
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#else
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2005-04-17 02:20:36 +04:00
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#define cpu_relax() barrier()
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2010-06-21 18:29:03 +04:00
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#endif
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2005-04-17 02:20:36 +04:00
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2006-01-12 12:05:57 +03:00
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#define task_pt_regs(p) \
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2006-01-12 12:05:58 +03:00
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((struct pt_regs *)(THREAD_START_SP + task_stack_page(p)) - 1)
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2006-01-12 12:05:57 +03:00
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#define KSTK_EIP(tsk) task_pt_regs(tsk)->ARM_pc
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#define KSTK_ESP(tsk) task_pt_regs(tsk)->ARM_sp
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2005-04-17 02:20:36 +04:00
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2013-07-02 15:10:42 +04:00
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#ifdef CONFIG_SMP
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#define __ALT_SMP_ASM(smp, up) \
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"9998: " smp "\n" \
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" .pushsection \".alt.smp.init\", \"a\"\n" \
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" .long 9998b\n" \
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" " up "\n" \
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" .popsection\n"
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#else
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#define __ALT_SMP_ASM(smp, up) up
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#endif
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2005-04-17 02:20:36 +04:00
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/*
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* Prefetching support - only ARMv5.
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*/
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#if __LINUX_ARM_ARCH__ >= 5
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#define ARCH_HAS_PREFETCH
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2006-12-13 20:39:26 +03:00
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static inline void prefetch(const void *ptr)
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{
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__asm__ __volatile__(
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2008-08-13 01:10:59 +04:00
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"pld\t%a0"
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2013-06-26 19:47:35 +04:00
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:: "p" (ptr));
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2006-12-13 20:39:26 +03:00
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}
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2005-04-17 02:20:36 +04:00
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2013-06-26 20:03:40 +04:00
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#if __LINUX_ARM_ARCH__ >= 7 && defined(CONFIG_SMP)
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2005-04-17 02:20:36 +04:00
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#define ARCH_HAS_PREFETCHW
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2013-06-26 20:03:40 +04:00
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static inline void prefetchw(const void *ptr)
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{
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__asm__ __volatile__(
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".arch_extension mp\n"
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__ALT_SMP_ASM(
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2019-03-23 14:13:14 +03:00
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"pldw\t%a0",
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"pld\t%a0"
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2013-06-26 20:03:40 +04:00
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)
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:: "p" (ptr));
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}
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#endif
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2005-04-17 02:20:36 +04:00
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#endif
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2011-11-22 07:01:07 +04:00
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#define HAVE_ARCH_PICK_MMAP_LAYOUT
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2005-04-17 02:20:36 +04:00
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#endif
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#endif /* __ASM_ARM_PROCESSOR_H */
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