2019-06-04 11:11:33 +03:00
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// SPDX-License-Identifier: GPL-2.0-only
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2008-06-22 15:01:58 +04:00
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/*
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* Toshiba TC6393XB SoC support
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*
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* Copyright(c) 2005-2006 Chris Humbert
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* Copyright(c) 2005 Dirk Opfer
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* Copyright(c) 2005 Ian Molton <spyro@f2s.com>
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* Copyright(c) 2007 Dmitry Baryshkov
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*
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* Based on code written by Sharp/Lineo for 2.4 kernels
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* Based on locomo.c
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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2008-08-11 01:32:07 +04:00
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#include <linux/err.h>
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2008-06-27 13:37:57 +04:00
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#include <linux/mfd/core.h>
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#include <linux/mfd/tmio.h>
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2008-06-22 15:01:58 +04:00
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#include <linux/mfd/tc6393xb.h>
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2016-03-30 11:48:06 +03:00
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#include <linux/gpio/driver.h>
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2022-05-07 15:33:31 +03:00
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#include <linux/gpio/machine.h>
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#include <linux/gpio/consumer.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 11:04:11 +03:00
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#include <linux/slab.h>
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2008-06-22 15:01:58 +04:00
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#define SCR_REVID 0x08 /* b Revision ID */
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#define SCR_ISR 0x50 /* b Interrupt Status */
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#define SCR_IMR 0x52 /* b Interrupt Mask */
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#define SCR_IRR 0x54 /* b Interrupt Routing */
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#define SCR_GPER 0x60 /* w GP Enable */
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#define SCR_GPI_SR(i) (0x64 + (i)) /* b3 GPI Status */
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#define SCR_GPI_IMR(i) (0x68 + (i)) /* b3 GPI INT Mask */
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#define SCR_GPI_EDER(i) (0x6c + (i)) /* b3 GPI Edge Detect Enable */
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#define SCR_GPI_LIR(i) (0x70 + (i)) /* b3 GPI Level Invert */
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#define SCR_GPO_DSR(i) (0x78 + (i)) /* b3 GPO Data Set */
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#define SCR_GPO_DOECR(i) (0x7c + (i)) /* b3 GPO Data OE Control */
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#define SCR_GP_IARCR(i) (0x80 + (i)) /* b3 GP Internal Active Register Control */
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#define SCR_GP_IARLCR(i) (0x84 + (i)) /* b3 GP INTERNAL Active Register Level Control */
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#define SCR_GPI_BCR(i) (0x88 + (i)) /* b3 GPI Buffer Control */
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#define SCR_GPA_IARCR 0x8c /* w GPa Internal Active Register Control */
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#define SCR_GPA_IARLCR 0x90 /* w GPa Internal Active Register Level Control */
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#define SCR_GPA_BCR 0x94 /* w GPa Buffer Control */
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#define SCR_CCR 0x98 /* w Clock Control */
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#define SCR_PLL2CR 0x9a /* w PLL2 Control */
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#define SCR_PLL1CR 0x9c /* l PLL1 Control */
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#define SCR_DIARCR 0xa0 /* b Device Internal Active Register Control */
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#define SCR_DBOCR 0xa1 /* b Device Buffer Off Control */
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#define SCR_FER 0xe0 /* b Function Enable */
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#define SCR_MCR 0xe4 /* w Mode Control */
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#define SCR_CONFIG 0xfc /* b Configuration Control */
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#define SCR_DEBUG 0xff /* b Debug */
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#define SCR_CCR_CK32K BIT(0)
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#define SCR_CCR_USBCK BIT(1)
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#define SCR_CCR_UNK1 BIT(4)
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#define SCR_CCR_MCLK_MASK (7 << 8)
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#define SCR_CCR_MCLK_OFF (0 << 8)
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#define SCR_CCR_MCLK_12 (1 << 8)
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#define SCR_CCR_MCLK_24 (2 << 8)
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#define SCR_CCR_MCLK_48 (3 << 8)
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#define SCR_CCR_HCLK_MASK (3 << 12)
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#define SCR_CCR_HCLK_24 (0 << 12)
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#define SCR_CCR_HCLK_48 (1 << 12)
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#define SCR_FER_USBEN BIT(0) /* USB host enable */
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#define SCR_FER_LCDCVEN BIT(1) /* polysilicon TFT enable */
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#define SCR_FER_SLCDEN BIT(2) /* SLCD enable */
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#define SCR_MCR_RDY_MASK (3 << 0)
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#define SCR_MCR_RDY_OPENDRAIN (0 << 0)
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#define SCR_MCR_RDY_TRISTATE (1 << 0)
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#define SCR_MCR_RDY_PUSHPULL (2 << 0)
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#define SCR_MCR_RDY_UNK BIT(2)
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#define SCR_MCR_RDY_EN BIT(3)
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#define SCR_MCR_INT_MASK (3 << 4)
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#define SCR_MCR_INT_OPENDRAIN (0 << 4)
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#define SCR_MCR_INT_TRISTATE (1 << 4)
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#define SCR_MCR_INT_PUSHPULL (2 << 4)
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#define SCR_MCR_INT_UNK BIT(6)
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#define SCR_MCR_INT_EN BIT(7)
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/* bits 8 - 16 are unknown */
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#define TC_GPIO_BIT(i) (1 << (i & 0x7))
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/*--------------------------------------------------------------------------*/
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struct tc6393xb {
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void __iomem *scr;
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2022-05-07 15:33:31 +03:00
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struct device *dev;
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2008-06-22 15:01:58 +04:00
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struct gpio_chip gpio;
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2022-05-07 15:33:31 +03:00
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struct gpio_desc *vcc_on;
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2008-06-22 15:01:58 +04:00
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struct clk *clk; /* 3,6 Mhz */
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2017-03-22 01:43:06 +03:00
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raw_spinlock_t lock; /* protects RMW cycles */
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2008-06-22 15:01:58 +04:00
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struct {
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u8 fer;
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u16 ccr;
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u8 gpi_bcr[3];
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u8 gpo_dsr[3];
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u8 gpo_doecr[3];
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} suspend_state;
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struct resource rscr;
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struct resource *iomem;
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int irq;
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int irq_base;
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};
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2008-06-27 13:37:57 +04:00
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enum {
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TC6393XB_CELL_NAND,
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2008-08-11 01:32:07 +04:00
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TC6393XB_CELL_MMC,
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2008-10-03 22:11:36 +04:00
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TC6393XB_CELL_OHCI,
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2008-10-04 02:50:36 +04:00
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TC6393XB_CELL_FB,
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2008-06-27 13:37:57 +04:00
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};
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/*--------------------------------------------------------------------------*/
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static int tc6393xb_nand_enable(struct platform_device *nand)
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{
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2019-05-09 17:23:39 +03:00
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struct tc6393xb *tc6393xb = dev_get_drvdata(nand->dev.parent);
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2008-06-27 13:37:57 +04:00
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unsigned long flags;
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2017-03-22 01:43:06 +03:00
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raw_spin_lock_irqsave(&tc6393xb->lock, flags);
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2008-06-27 13:37:57 +04:00
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/* SMD buffer on */
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2019-05-09 17:23:39 +03:00
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dev_dbg(nand->dev.parent, "SMD buffer on\n");
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2008-08-11 01:32:07 +04:00
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tmio_iowrite8(0xff, tc6393xb->scr + SCR_GPI_BCR(1));
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2008-06-27 13:37:57 +04:00
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2017-03-22 01:43:06 +03:00
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raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
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2008-06-27 13:37:57 +04:00
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return 0;
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}
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2020-09-22 22:26:59 +03:00
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static const struct resource tc6393xb_nand_resources[] = {
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2008-06-27 13:37:57 +04:00
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{
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2008-08-11 01:32:07 +04:00
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.start = 0x1000,
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.end = 0x1007,
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2008-06-27 13:37:57 +04:00
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.flags = IORESOURCE_MEM,
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},
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{
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2008-08-11 01:32:07 +04:00
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.start = 0x0100,
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.end = 0x01ff,
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2008-06-27 13:37:57 +04:00
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_TC6393_NAND,
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.end = IRQ_TC6393_NAND,
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.flags = IORESOURCE_IRQ,
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},
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};
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2020-09-22 22:26:59 +03:00
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static const struct resource tc6393xb_mmc_resources[] = {
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2008-08-11 01:32:07 +04:00
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{
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.start = 0x800,
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.end = 0x9ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_TC6393_MMC,
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.end = IRQ_TC6393_MMC,
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.flags = IORESOURCE_IRQ,
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},
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};
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2009-02-17 12:11:42 +03:00
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static const struct resource tc6393xb_ohci_resources[] = {
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2008-10-03 22:11:36 +04:00
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{
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.start = 0x3000,
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.end = 0x31ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x0300,
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.end = 0x03ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x010000,
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.end = 0x017fff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x018000,
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.end = 0x01ffff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_TC6393_OHCI,
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.end = IRQ_TC6393_OHCI,
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.flags = IORESOURCE_IRQ,
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},
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};
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2020-09-22 22:26:59 +03:00
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static const struct resource tc6393xb_fb_resources[] = {
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2008-10-04 02:50:36 +04:00
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{
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.start = 0x5000,
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.end = 0x51ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x0500,
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.end = 0x05ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 0x100000,
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.end = 0x1fffff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IRQ_TC6393_FB,
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.end = IRQ_TC6393_FB,
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.flags = IORESOURCE_IRQ,
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},
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};
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2008-10-03 22:11:36 +04:00
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static int tc6393xb_ohci_enable(struct platform_device *dev)
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{
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struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
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unsigned long flags;
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u16 ccr;
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u8 fer;
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2017-03-22 01:43:06 +03:00
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raw_spin_lock_irqsave(&tc6393xb->lock, flags);
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2008-10-03 22:11:36 +04:00
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ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
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ccr |= SCR_CCR_USBCK;
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tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
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fer = tmio_ioread8(tc6393xb->scr + SCR_FER);
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fer |= SCR_FER_USBEN;
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tmio_iowrite8(fer, tc6393xb->scr + SCR_FER);
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2017-03-22 01:43:06 +03:00
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raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
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2008-10-03 22:11:36 +04:00
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return 0;
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}
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static int tc6393xb_ohci_disable(struct platform_device *dev)
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{
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struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
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unsigned long flags;
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u16 ccr;
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u8 fer;
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2017-03-22 01:43:06 +03:00
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raw_spin_lock_irqsave(&tc6393xb->lock, flags);
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2008-10-03 22:11:36 +04:00
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fer = tmio_ioread8(tc6393xb->scr + SCR_FER);
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fer &= ~SCR_FER_USBEN;
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tmio_iowrite8(fer, tc6393xb->scr + SCR_FER);
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ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
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ccr &= ~SCR_CCR_USBCK;
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tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
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2017-03-22 01:43:06 +03:00
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raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
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2008-10-03 22:11:36 +04:00
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return 0;
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}
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2014-10-24 21:19:57 +04:00
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static int tc6393xb_ohci_suspend(struct platform_device *dev)
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{
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|
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struct tc6393xb_platform_data *tcpd = dev_get_platdata(dev->dev.parent);
|
|
|
|
|
|
|
|
/* We can't properly store/restore OHCI state, so fail here */
|
|
|
|
if (tcpd->resume_restore)
|
|
|
|
return -EBUSY;
|
|
|
|
|
|
|
|
return tc6393xb_ohci_disable(dev);
|
|
|
|
}
|
|
|
|
|
2008-10-04 02:50:36 +04:00
|
|
|
static int tc6393xb_fb_enable(struct platform_device *dev)
|
|
|
|
{
|
|
|
|
struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
|
|
|
|
unsigned long flags;
|
|
|
|
u16 ccr;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-10-04 02:50:36 +04:00
|
|
|
|
|
|
|
ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
|
|
|
|
ccr &= ~SCR_CCR_MCLK_MASK;
|
|
|
|
ccr |= SCR_CCR_MCLK_48;
|
|
|
|
tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-10-04 02:50:36 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tc6393xb_fb_disable(struct platform_device *dev)
|
|
|
|
{
|
|
|
|
struct tc6393xb *tc6393xb = dev_get_drvdata(dev->dev.parent);
|
|
|
|
unsigned long flags;
|
|
|
|
u16 ccr;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-10-04 02:50:36 +04:00
|
|
|
|
|
|
|
ccr = tmio_ioread16(tc6393xb->scr + SCR_CCR);
|
|
|
|
ccr &= ~SCR_CCR_MCLK_MASK;
|
|
|
|
ccr |= SCR_CCR_MCLK_OFF;
|
|
|
|
tmio_iowrite16(ccr, tc6393xb->scr + SCR_CCR);
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-10-04 02:50:36 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int tc6393xb_lcd_set_power(struct platform_device *fb, bool on)
|
|
|
|
{
|
2019-05-09 17:23:39 +03:00
|
|
|
struct tc6393xb *tc6393xb = dev_get_drvdata(fb->dev.parent);
|
2008-10-04 02:50:36 +04:00
|
|
|
u8 fer;
|
|
|
|
unsigned long flags;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-10-04 02:50:36 +04:00
|
|
|
|
|
|
|
fer = ioread8(tc6393xb->scr + SCR_FER);
|
|
|
|
if (on)
|
|
|
|
fer |= SCR_FER_SLCDEN;
|
|
|
|
else
|
|
|
|
fer &= ~SCR_FER_SLCDEN;
|
|
|
|
iowrite8(fer, tc6393xb->scr + SCR_FER);
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-10-04 02:50:36 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(tc6393xb_lcd_set_power);
|
|
|
|
|
|
|
|
int tc6393xb_lcd_mode(struct platform_device *fb,
|
|
|
|
const struct fb_videomode *mode) {
|
2019-05-09 17:23:39 +03:00
|
|
|
struct tc6393xb *tc6393xb = dev_get_drvdata(fb->dev.parent);
|
2008-10-04 02:50:36 +04:00
|
|
|
unsigned long flags;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-10-04 02:50:36 +04:00
|
|
|
|
|
|
|
iowrite16(mode->pixclock, tc6393xb->scr + SCR_PLL1CR + 0);
|
|
|
|
iowrite16(mode->pixclock >> 16, tc6393xb->scr + SCR_PLL1CR + 2);
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-10-04 02:50:36 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(tc6393xb_lcd_mode);
|
|
|
|
|
2010-01-06 15:51:48 +03:00
|
|
|
static int tc6393xb_mmc_enable(struct platform_device *mmc)
|
|
|
|
{
|
2019-05-09 17:23:39 +03:00
|
|
|
struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent);
|
2010-01-06 15:51:48 +03:00
|
|
|
|
|
|
|
tmio_core_mmc_enable(tc6393xb->scr + 0x200, 0,
|
|
|
|
tc6393xb_mmc_resources[0].start & 0xfffe);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tc6393xb_mmc_resume(struct platform_device *mmc)
|
|
|
|
{
|
2019-05-09 17:23:39 +03:00
|
|
|
struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent);
|
2010-01-06 15:51:48 +03:00
|
|
|
|
|
|
|
tmio_core_mmc_resume(tc6393xb->scr + 0x200, 0,
|
|
|
|
tc6393xb_mmc_resources[0].start & 0xfffe);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tc6393xb_mmc_pwr(struct platform_device *mmc, int state)
|
|
|
|
{
|
2019-05-09 17:23:39 +03:00
|
|
|
struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent);
|
2010-01-06 15:51:48 +03:00
|
|
|
|
|
|
|
tmio_core_mmc_pwr(tc6393xb->scr + 0x200, 0, state);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void tc6393xb_mmc_clk_div(struct platform_device *mmc, int state)
|
|
|
|
{
|
2019-05-09 17:23:39 +03:00
|
|
|
struct tc6393xb *tc6393xb = dev_get_drvdata(mmc->dev.parent);
|
2010-01-06 15:51:48 +03:00
|
|
|
|
|
|
|
tmio_core_mmc_clk_div(tc6393xb->scr + 0x200, 0, state);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct tmio_mmc_data tc6393xb_mmc_data = {
|
|
|
|
.hclk = 24000000,
|
|
|
|
.set_pwr = tc6393xb_mmc_pwr,
|
|
|
|
.set_clk_div = tc6393xb_mmc_clk_div,
|
|
|
|
};
|
|
|
|
|
2012-11-19 22:24:21 +04:00
|
|
|
static struct mfd_cell tc6393xb_cells[] = {
|
2008-06-27 13:37:57 +04:00
|
|
|
[TC6393XB_CELL_NAND] = {
|
|
|
|
.name = "tmio-nand",
|
|
|
|
.enable = tc6393xb_nand_enable,
|
|
|
|
.num_resources = ARRAY_SIZE(tc6393xb_nand_resources),
|
|
|
|
.resources = tc6393xb_nand_resources,
|
|
|
|
},
|
2008-08-11 01:32:07 +04:00
|
|
|
[TC6393XB_CELL_MMC] = {
|
|
|
|
.name = "tmio-mmc",
|
2010-01-06 15:51:48 +03:00
|
|
|
.enable = tc6393xb_mmc_enable,
|
|
|
|
.resume = tc6393xb_mmc_resume,
|
2011-04-06 13:38:14 +04:00
|
|
|
.platform_data = &tc6393xb_mmc_data,
|
|
|
|
.pdata_size = sizeof(tc6393xb_mmc_data),
|
2008-08-11 01:32:07 +04:00
|
|
|
.num_resources = ARRAY_SIZE(tc6393xb_mmc_resources),
|
|
|
|
.resources = tc6393xb_mmc_resources,
|
|
|
|
},
|
2008-10-03 22:11:36 +04:00
|
|
|
[TC6393XB_CELL_OHCI] = {
|
|
|
|
.name = "tmio-ohci",
|
|
|
|
.num_resources = ARRAY_SIZE(tc6393xb_ohci_resources),
|
|
|
|
.resources = tc6393xb_ohci_resources,
|
|
|
|
.enable = tc6393xb_ohci_enable,
|
2014-10-24 21:19:57 +04:00
|
|
|
.suspend = tc6393xb_ohci_suspend,
|
2008-10-03 22:11:36 +04:00
|
|
|
.resume = tc6393xb_ohci_enable,
|
|
|
|
.disable = tc6393xb_ohci_disable,
|
|
|
|
},
|
2008-10-04 02:50:36 +04:00
|
|
|
[TC6393XB_CELL_FB] = {
|
|
|
|
.name = "tmio-fb",
|
|
|
|
.num_resources = ARRAY_SIZE(tc6393xb_fb_resources),
|
|
|
|
.resources = tc6393xb_fb_resources,
|
|
|
|
.enable = tc6393xb_fb_enable,
|
|
|
|
.suspend = tc6393xb_fb_disable,
|
|
|
|
.resume = tc6393xb_fb_enable,
|
|
|
|
.disable = tc6393xb_fb_disable,
|
|
|
|
},
|
2008-06-27 13:37:57 +04:00
|
|
|
};
|
|
|
|
|
2008-06-22 15:01:58 +04:00
|
|
|
/*--------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
static int tc6393xb_gpio_get(struct gpio_chip *chip,
|
|
|
|
unsigned offset)
|
|
|
|
{
|
2016-03-30 11:48:06 +03:00
|
|
|
struct tc6393xb *tc6393xb = gpiochip_get_data(chip);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
/* XXX: does dsr also represent inputs? */
|
2015-12-22 17:47:55 +03:00
|
|
|
return !!(tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8))
|
|
|
|
& TC_GPIO_BIT(offset));
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void __tc6393xb_gpio_set(struct gpio_chip *chip,
|
|
|
|
unsigned offset, int value)
|
|
|
|
{
|
2016-03-30 11:48:06 +03:00
|
|
|
struct tc6393xb *tc6393xb = gpiochip_get_data(chip);
|
2008-06-22 15:01:58 +04:00
|
|
|
u8 dsr;
|
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
dsr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DSR(offset / 8));
|
2008-06-22 15:01:58 +04:00
|
|
|
if (value)
|
|
|
|
dsr |= TC_GPIO_BIT(offset);
|
|
|
|
else
|
|
|
|
dsr &= ~TC_GPIO_BIT(offset);
|
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
tmio_iowrite8(dsr, tc6393xb->scr + SCR_GPO_DSR(offset / 8));
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void tc6393xb_gpio_set(struct gpio_chip *chip,
|
|
|
|
unsigned offset, int value)
|
|
|
|
{
|
2016-03-30 11:48:06 +03:00
|
|
|
struct tc6393xb *tc6393xb = gpiochip_get_data(chip);
|
2008-06-22 15:01:58 +04:00
|
|
|
unsigned long flags;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
__tc6393xb_gpio_set(chip, offset, value);
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int tc6393xb_gpio_direction_input(struct gpio_chip *chip,
|
|
|
|
unsigned offset)
|
|
|
|
{
|
2016-03-30 11:48:06 +03:00
|
|
|
struct tc6393xb *tc6393xb = gpiochip_get_data(chip);
|
2008-06-22 15:01:58 +04:00
|
|
|
unsigned long flags;
|
|
|
|
u8 doecr;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
|
2008-06-22 15:01:58 +04:00
|
|
|
doecr &= ~TC_GPIO_BIT(offset);
|
2008-08-11 01:32:07 +04:00
|
|
|
tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
|
2008-06-22 15:01:58 +04:00
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int tc6393xb_gpio_direction_output(struct gpio_chip *chip,
|
|
|
|
unsigned offset, int value)
|
|
|
|
{
|
2016-03-30 11:48:06 +03:00
|
|
|
struct tc6393xb *tc6393xb = gpiochip_get_data(chip);
|
2008-06-22 15:01:58 +04:00
|
|
|
unsigned long flags;
|
|
|
|
u8 doecr;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
__tc6393xb_gpio_set(chip, offset, value);
|
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
doecr = tmio_ioread8(tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
|
2008-06-22 15:01:58 +04:00
|
|
|
doecr |= TC_GPIO_BIT(offset);
|
2008-08-11 01:32:07 +04:00
|
|
|
tmio_iowrite8(doecr, tc6393xb->scr + SCR_GPO_DOECR(offset / 8));
|
2008-06-22 15:01:58 +04:00
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2022-05-07 15:33:31 +03:00
|
|
|
/*
|
|
|
|
* TC6393XB GPIOs as used on TOSA, are the only user of this chip.
|
|
|
|
* GPIOs 2, 5, 8 and 13 are not connected.
|
|
|
|
*/
|
|
|
|
#define TOSA_GPIO_TG_ON 0
|
|
|
|
#define TOSA_GPIO_L_MUTE 1
|
|
|
|
#define TOSA_GPIO_BL_C20MA 3
|
|
|
|
#define TOSA_GPIO_CARD_VCC_ON 4
|
|
|
|
#define TOSA_GPIO_CHARGE_OFF 6
|
|
|
|
#define TOSA_GPIO_CHARGE_OFF_JC 7
|
|
|
|
#define TOSA_GPIO_BAT0_V_ON 9
|
|
|
|
#define TOSA_GPIO_BAT1_V_ON 10
|
|
|
|
#define TOSA_GPIO_BU_CHRG_ON 11
|
|
|
|
#define TOSA_GPIO_BAT_SW_ON 12
|
|
|
|
#define TOSA_GPIO_BAT0_TH_ON 14
|
|
|
|
#define TOSA_GPIO_BAT1_TH_ON 15
|
|
|
|
|
|
|
|
|
|
|
|
GPIO_LOOKUP_SINGLE(tosa_lcd_gpio_lookup, "spi2.0", "tc6393xb",
|
|
|
|
TOSA_GPIO_TG_ON, "tg #pwr", GPIO_ACTIVE_HIGH);
|
|
|
|
|
|
|
|
GPIO_LOOKUP_SINGLE(tosa_lcd_bl_gpio_lookup, "i2c-tos-bl", "tc6393xb",
|
|
|
|
TOSA_GPIO_BL_C20MA, "backlight", GPIO_ACTIVE_HIGH);
|
|
|
|
|
|
|
|
GPIO_LOOKUP_SINGLE(tosa_audio_gpio_lookup, "tosa-audio", "tc6393xb",
|
|
|
|
TOSA_GPIO_L_MUTE, NULL, GPIO_ACTIVE_HIGH);
|
|
|
|
|
|
|
|
static struct gpiod_lookup_table tosa_battery_gpio_lookup = {
|
|
|
|
.dev_id = "wm97xx-battery",
|
|
|
|
.table = {
|
|
|
|
GPIO_LOOKUP("tc6393xb", TOSA_GPIO_CHARGE_OFF,
|
|
|
|
"main charge off", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("tc6393xb", TOSA_GPIO_CHARGE_OFF_JC,
|
|
|
|
"jacket charge off", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT0_V_ON,
|
|
|
|
"main battery", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT1_V_ON,
|
|
|
|
"jacket battery", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BU_CHRG_ON,
|
|
|
|
"backup battery", GPIO_ACTIVE_HIGH),
|
|
|
|
/* BAT1 and BAT0 thermistors appear to be swapped */
|
|
|
|
GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT1_TH_ON,
|
|
|
|
"main battery temp", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT0_TH_ON,
|
|
|
|
"jacket battery temp", GPIO_ACTIVE_HIGH),
|
|
|
|
GPIO_LOOKUP("tc6393xb", TOSA_GPIO_BAT_SW_ON,
|
|
|
|
"battery switch", GPIO_ACTIVE_HIGH),
|
|
|
|
{ },
|
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
static struct gpiod_lookup_table *tc6393xb_gpio_lookups[] = {
|
|
|
|
&tosa_lcd_gpio_lookup,
|
|
|
|
&tosa_lcd_bl_gpio_lookup,
|
|
|
|
&tosa_audio_gpio_lookup,
|
|
|
|
&tosa_battery_gpio_lookup,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int tc6393xb_register_gpio(struct tc6393xb *tc6393xb)
|
2008-06-22 15:01:58 +04:00
|
|
|
{
|
2022-05-07 15:33:31 +03:00
|
|
|
struct gpio_chip *gc = &tc6393xb->gpio;
|
|
|
|
struct device *dev = tc6393xb->dev;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
gc->label = "tc6393xb";
|
|
|
|
gc->base = -1; /* Dynamic allocation */
|
|
|
|
gc->ngpio = 16;
|
|
|
|
gc->set = tc6393xb_gpio_set;
|
|
|
|
gc->get = tc6393xb_gpio_get;
|
|
|
|
gc->direction_input = tc6393xb_gpio_direction_input;
|
|
|
|
gc->direction_output = tc6393xb_gpio_direction_output;
|
|
|
|
|
|
|
|
ret = devm_gpiochip_add_data(dev, gc, tc6393xb);
|
|
|
|
if (ret)
|
|
|
|
return dev_err_probe(dev, ret, "failed to add GPIO chip\n");
|
|
|
|
|
|
|
|
/* Register descriptor look-ups for consumers */
|
|
|
|
gpiod_add_lookup_tables(tc6393xb_gpio_lookups, ARRAY_SIZE(tc6393xb_gpio_lookups));
|
|
|
|
|
|
|
|
/* Request some of our own GPIOs */
|
|
|
|
tc6393xb->vcc_on = gpiochip_request_own_desc(gc, TOSA_GPIO_CARD_VCC_ON, "VCC ON",
|
|
|
|
GPIO_ACTIVE_HIGH, GPIOD_OUT_HIGH);
|
|
|
|
if (IS_ERR(tc6393xb->vcc_on))
|
|
|
|
return dev_err_probe(dev, PTR_ERR(tc6393xb->vcc_on),
|
|
|
|
"failed to request VCC ON GPIO\n");
|
|
|
|
|
|
|
|
return 0;
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*--------------------------------------------------------------------------*/
|
|
|
|
|
2015-09-14 11:42:37 +03:00
|
|
|
static void tc6393xb_irq(struct irq_desc *desc)
|
2008-06-22 15:01:58 +04:00
|
|
|
{
|
2015-07-13 23:44:56 +03:00
|
|
|
struct tc6393xb *tc6393xb = irq_desc_get_handler_data(desc);
|
2008-06-22 15:01:58 +04:00
|
|
|
unsigned int isr;
|
|
|
|
unsigned int i, irq_base;
|
|
|
|
|
|
|
|
irq_base = tc6393xb->irq_base;
|
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
while ((isr = tmio_ioread8(tc6393xb->scr + SCR_ISR) &
|
|
|
|
~tmio_ioread8(tc6393xb->scr + SCR_IMR)))
|
2008-06-22 15:01:58 +04:00
|
|
|
for (i = 0; i < TC6393XB_NR_IRQS; i++) {
|
|
|
|
if (isr & (1 << i))
|
|
|
|
generic_handle_irq(irq_base + i);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-12-12 15:34:04 +03:00
|
|
|
static void tc6393xb_irq_ack(struct irq_data *data)
|
2008-06-22 15:01:58 +04:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2010-12-12 15:34:04 +03:00
|
|
|
static void tc6393xb_irq_mask(struct irq_data *data)
|
2008-06-22 15:01:58 +04:00
|
|
|
{
|
2010-12-12 15:34:04 +03:00
|
|
|
struct tc6393xb *tc6393xb = irq_data_get_irq_chip_data(data);
|
2008-06-22 15:01:58 +04:00
|
|
|
unsigned long flags;
|
|
|
|
u8 imr;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-08-11 01:32:07 +04:00
|
|
|
imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
|
2010-12-12 15:34:04 +03:00
|
|
|
imr |= 1 << (data->irq - tc6393xb->irq_base);
|
2008-08-11 01:32:07 +04:00
|
|
|
tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
2010-12-12 15:34:04 +03:00
|
|
|
static void tc6393xb_irq_unmask(struct irq_data *data)
|
2008-06-22 15:01:58 +04:00
|
|
|
{
|
2010-12-12 15:34:04 +03:00
|
|
|
struct tc6393xb *tc6393xb = irq_data_get_irq_chip_data(data);
|
2008-06-22 15:01:58 +04:00
|
|
|
unsigned long flags;
|
|
|
|
u8 imr;
|
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_irqsave(&tc6393xb->lock, flags);
|
2008-08-11 01:32:07 +04:00
|
|
|
imr = tmio_ioread8(tc6393xb->scr + SCR_IMR);
|
2010-12-12 15:34:04 +03:00
|
|
|
imr &= ~(1 << (data->irq - tc6393xb->irq_base));
|
2008-08-11 01:32:07 +04:00
|
|
|
tmio_iowrite8(imr, tc6393xb->scr + SCR_IMR);
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_unlock_irqrestore(&tc6393xb->lock, flags);
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static struct irq_chip tc6393xb_chip = {
|
2010-12-12 15:34:04 +03:00
|
|
|
.name = "tc6393xb",
|
|
|
|
.irq_ack = tc6393xb_irq_ack,
|
|
|
|
.irq_mask = tc6393xb_irq_mask,
|
|
|
|
.irq_unmask = tc6393xb_irq_unmask,
|
2008-06-22 15:01:58 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
static void tc6393xb_attach_irq(struct platform_device *dev)
|
|
|
|
{
|
|
|
|
struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
|
|
|
|
unsigned int irq, irq_base;
|
|
|
|
|
|
|
|
irq_base = tc6393xb->irq_base;
|
|
|
|
|
|
|
|
for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
|
2011-03-25 14:12:35 +03:00
|
|
|
irq_set_chip_and_handler(irq, &tc6393xb_chip, handle_edge_irq);
|
2011-03-25 14:12:32 +03:00
|
|
|
irq_set_chip_data(irq, tc6393xb);
|
2015-07-27 23:55:20 +03:00
|
|
|
irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
2011-03-25 14:12:32 +03:00
|
|
|
irq_set_irq_type(tc6393xb->irq, IRQ_TYPE_EDGE_FALLING);
|
2015-07-13 23:44:54 +03:00
|
|
|
irq_set_chained_handler_and_data(tc6393xb->irq, tc6393xb_irq,
|
|
|
|
tc6393xb);
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void tc6393xb_detach_irq(struct platform_device *dev)
|
|
|
|
{
|
|
|
|
struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
|
|
|
|
unsigned int irq, irq_base;
|
|
|
|
|
2015-07-13 23:44:54 +03:00
|
|
|
irq_set_chained_handler_and_data(tc6393xb->irq, NULL, NULL);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
irq_base = tc6393xb->irq_base;
|
|
|
|
|
|
|
|
for (irq = irq_base; irq < irq_base + TC6393XB_NR_IRQS; irq++) {
|
2015-07-27 23:55:20 +03:00
|
|
|
irq_set_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
|
2011-03-25 14:12:32 +03:00
|
|
|
irq_set_chip(irq, NULL);
|
|
|
|
irq_set_chip_data(irq, NULL);
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*--------------------------------------------------------------------------*/
|
|
|
|
|
2012-11-19 22:23:04 +04:00
|
|
|
static int tc6393xb_probe(struct platform_device *dev)
|
2008-06-22 15:01:58 +04:00
|
|
|
{
|
2013-07-30 12:10:05 +04:00
|
|
|
struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
|
2008-06-22 15:01:58 +04:00
|
|
|
struct tc6393xb *tc6393xb;
|
2008-08-11 01:32:07 +04:00
|
|
|
struct resource *iomem, *rscr;
|
2014-07-13 00:30:14 +04:00
|
|
|
int ret;
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
|
|
|
if (!iomem)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
tc6393xb = kzalloc(sizeof *tc6393xb, GFP_KERNEL);
|
|
|
|
if (!tc6393xb) {
|
2008-08-11 01:32:07 +04:00
|
|
|
ret = -ENOMEM;
|
2008-06-22 15:01:58 +04:00
|
|
|
goto err_kzalloc;
|
|
|
|
}
|
2022-05-07 15:33:31 +03:00
|
|
|
tc6393xb->dev = &dev->dev;
|
2008-06-22 15:01:58 +04:00
|
|
|
|
2017-03-22 01:43:06 +03:00
|
|
|
raw_spin_lock_init(&tc6393xb->lock);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
platform_set_drvdata(dev, tc6393xb);
|
2008-08-11 01:32:07 +04:00
|
|
|
|
|
|
|
ret = platform_get_irq(dev, 0);
|
|
|
|
if (ret >= 0)
|
|
|
|
tc6393xb->irq = ret;
|
|
|
|
else
|
|
|
|
goto err_noirq;
|
|
|
|
|
2008-06-22 15:01:58 +04:00
|
|
|
tc6393xb->iomem = iomem;
|
|
|
|
tc6393xb->irq_base = tcpd->irq_base;
|
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
tc6393xb->clk = clk_get(&dev->dev, "CLK_CK3P6MI");
|
2008-06-22 15:01:58 +04:00
|
|
|
if (IS_ERR(tc6393xb->clk)) {
|
2008-08-11 01:32:07 +04:00
|
|
|
ret = PTR_ERR(tc6393xb->clk);
|
2008-06-22 15:01:58 +04:00
|
|
|
goto err_clk_get;
|
|
|
|
}
|
|
|
|
|
|
|
|
rscr = &tc6393xb->rscr;
|
|
|
|
rscr->name = "tc6393xb-core";
|
|
|
|
rscr->start = iomem->start;
|
|
|
|
rscr->end = iomem->start + 0xff;
|
|
|
|
rscr->flags = IORESOURCE_MEM;
|
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
ret = request_resource(iomem, rscr);
|
|
|
|
if (ret)
|
2008-06-22 15:01:58 +04:00
|
|
|
goto err_request_scr;
|
|
|
|
|
2010-01-05 22:01:16 +03:00
|
|
|
tc6393xb->scr = ioremap(rscr->start, resource_size(rscr));
|
2008-06-22 15:01:58 +04:00
|
|
|
if (!tc6393xb->scr) {
|
2008-08-11 01:32:07 +04:00
|
|
|
ret = -ENOMEM;
|
2008-06-22 15:01:58 +04:00
|
|
|
goto err_ioremap;
|
|
|
|
}
|
|
|
|
|
2014-11-06 11:52:38 +03:00
|
|
|
ret = clk_prepare_enable(tc6393xb->clk);
|
2008-08-11 01:32:07 +04:00
|
|
|
if (ret)
|
2008-06-22 15:01:58 +04:00
|
|
|
goto err_clk_enable;
|
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
ret = tcpd->enable(dev);
|
|
|
|
if (ret)
|
2008-06-22 15:01:58 +04:00
|
|
|
goto err_enable;
|
|
|
|
|
2008-09-25 01:46:10 +04:00
|
|
|
iowrite8(0, tc6393xb->scr + SCR_FER);
|
|
|
|
iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR);
|
|
|
|
iowrite16(SCR_CCR_UNK1 | SCR_CCR_HCLK_48,
|
|
|
|
tc6393xb->scr + SCR_CCR);
|
|
|
|
iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
|
|
|
|
SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
|
|
|
|
BIT(15), tc6393xb->scr + SCR_MCR);
|
|
|
|
iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER);
|
|
|
|
iowrite8(0, tc6393xb->scr + SCR_IRR);
|
|
|
|
iowrite8(0xbf, tc6393xb->scr + SCR_IMR);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
|
|
|
printk(KERN_INFO "Toshiba tc6393xb revision %d at 0x%08lx, irq %d\n",
|
2008-08-11 01:32:07 +04:00
|
|
|
tmio_ioread8(tc6393xb->scr + SCR_REVID),
|
2008-06-22 15:01:58 +04:00
|
|
|
(unsigned long) iomem->start, tc6393xb->irq);
|
|
|
|
|
2022-05-07 15:33:31 +03:00
|
|
|
ret = tc6393xb_register_gpio(tc6393xb);
|
|
|
|
if (ret)
|
|
|
|
goto err_gpio_add;
|
2008-06-22 15:01:58 +04:00
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
tc6393xb_attach_irq(dev);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
2011-04-06 14:20:49 +04:00
|
|
|
tc6393xb_cells[TC6393XB_CELL_NAND].platform_data = tcpd->nand_data;
|
|
|
|
tc6393xb_cells[TC6393XB_CELL_NAND].pdata_size =
|
|
|
|
sizeof(*tcpd->nand_data);
|
2011-04-06 14:13:25 +04:00
|
|
|
tc6393xb_cells[TC6393XB_CELL_FB].platform_data = tcpd->fb_data;
|
|
|
|
tc6393xb_cells[TC6393XB_CELL_FB].pdata_size = sizeof(*tcpd->fb_data);
|
2008-06-27 13:37:57 +04:00
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
ret = mfd_add_devices(&dev->dev, dev->id,
|
2012-09-11 11:16:36 +04:00
|
|
|
tc6393xb_cells, ARRAY_SIZE(tc6393xb_cells),
|
|
|
|
iomem, tcpd->irq_base, NULL);
|
2008-06-27 13:37:57 +04:00
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
if (!ret)
|
|
|
|
return 0;
|
2008-06-22 15:01:58 +04:00
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
tc6393xb_detach_irq(dev);
|
2008-06-22 15:01:58 +04:00
|
|
|
err_gpio_add:
|
|
|
|
tcpd->disable(dev);
|
|
|
|
err_enable:
|
2014-11-06 11:52:38 +03:00
|
|
|
clk_disable_unprepare(tc6393xb->clk);
|
2010-08-03 07:10:41 +04:00
|
|
|
err_clk_enable:
|
2008-06-22 15:01:58 +04:00
|
|
|
iounmap(tc6393xb->scr);
|
|
|
|
err_ioremap:
|
|
|
|
release_resource(&tc6393xb->rscr);
|
|
|
|
err_request_scr:
|
|
|
|
clk_put(tc6393xb->clk);
|
2008-08-11 01:32:07 +04:00
|
|
|
err_noirq:
|
2008-06-22 15:01:58 +04:00
|
|
|
err_clk_get:
|
|
|
|
kfree(tc6393xb);
|
|
|
|
err_kzalloc:
|
2008-08-11 01:32:07 +04:00
|
|
|
return ret;
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
2012-11-19 22:26:01 +04:00
|
|
|
static int tc6393xb_remove(struct platform_device *dev)
|
2008-06-22 15:01:58 +04:00
|
|
|
{
|
2013-07-30 12:10:05 +04:00
|
|
|
struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
|
2008-06-22 15:01:58 +04:00
|
|
|
struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
|
|
|
|
|
2008-07-29 03:30:26 +04:00
|
|
|
mfd_remove_devices(&dev->dev);
|
2008-09-25 01:36:23 +04:00
|
|
|
|
2008-08-11 01:32:07 +04:00
|
|
|
tc6393xb_detach_irq(dev);
|
2008-06-22 15:01:58 +04:00
|
|
|
|
2022-06-19 11:26:55 +03:00
|
|
|
tcpd->disable(dev);
|
2014-11-06 11:52:38 +03:00
|
|
|
clk_disable_unprepare(tc6393xb->clk);
|
2008-06-22 15:01:58 +04:00
|
|
|
iounmap(tc6393xb->scr);
|
|
|
|
release_resource(&tc6393xb->rscr);
|
|
|
|
clk_put(tc6393xb->clk);
|
|
|
|
kfree(tc6393xb);
|
|
|
|
|
2022-06-19 11:26:55 +03:00
|
|
|
return 0;
|
2008-06-22 15:01:58 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
|
|
|
static int tc6393xb_suspend(struct platform_device *dev, pm_message_t state)
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{
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2013-07-30 12:10:05 +04:00
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struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
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2008-06-22 15:01:58 +04:00
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struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
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2008-08-11 01:32:07 +04:00
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int i, ret;
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2008-06-22 15:01:58 +04:00
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tc6393xb->suspend_state.ccr = ioread16(tc6393xb->scr + SCR_CCR);
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tc6393xb->suspend_state.fer = ioread8(tc6393xb->scr + SCR_FER);
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for (i = 0; i < 3; i++) {
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tc6393xb->suspend_state.gpo_dsr[i] =
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ioread8(tc6393xb->scr + SCR_GPO_DSR(i));
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tc6393xb->suspend_state.gpo_doecr[i] =
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ioread8(tc6393xb->scr + SCR_GPO_DOECR(i));
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tc6393xb->suspend_state.gpi_bcr[i] =
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ioread8(tc6393xb->scr + SCR_GPI_BCR(i));
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}
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2008-08-11 01:32:07 +04:00
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ret = tcpd->suspend(dev);
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2014-11-06 11:52:38 +03:00
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clk_disable_unprepare(tc6393xb->clk);
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2008-06-22 15:01:58 +04:00
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2008-08-11 01:32:07 +04:00
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return ret;
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2008-06-22 15:01:58 +04:00
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}
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static int tc6393xb_resume(struct platform_device *dev)
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{
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2013-07-30 12:10:05 +04:00
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struct tc6393xb_platform_data *tcpd = dev_get_platdata(&dev->dev);
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2008-08-11 01:32:07 +04:00
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struct tc6393xb *tc6393xb = platform_get_drvdata(dev);
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int ret;
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2008-09-25 01:46:10 +04:00
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int i;
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2008-08-11 01:32:07 +04:00
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2017-06-01 10:14:50 +03:00
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ret = clk_prepare_enable(tc6393xb->clk);
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if (ret)
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return ret;
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2008-08-11 01:32:07 +04:00
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ret = tcpd->resume(dev);
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2008-06-22 15:01:58 +04:00
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if (ret)
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return ret;
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2008-09-25 01:46:10 +04:00
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if (!tcpd->resume_restore)
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return 0;
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iowrite8(tc6393xb->suspend_state.fer, tc6393xb->scr + SCR_FER);
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iowrite16(tcpd->scr_pll2cr, tc6393xb->scr + SCR_PLL2CR);
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iowrite16(tc6393xb->suspend_state.ccr, tc6393xb->scr + SCR_CCR);
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iowrite16(SCR_MCR_RDY_OPENDRAIN | SCR_MCR_RDY_UNK | SCR_MCR_RDY_EN |
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SCR_MCR_INT_OPENDRAIN | SCR_MCR_INT_UNK | SCR_MCR_INT_EN |
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BIT(15), tc6393xb->scr + SCR_MCR);
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iowrite16(tcpd->scr_gper, tc6393xb->scr + SCR_GPER);
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iowrite8(0, tc6393xb->scr + SCR_IRR);
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iowrite8(0xbf, tc6393xb->scr + SCR_IMR);
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for (i = 0; i < 3; i++) {
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iowrite8(tc6393xb->suspend_state.gpo_dsr[i],
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tc6393xb->scr + SCR_GPO_DSR(i));
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iowrite8(tc6393xb->suspend_state.gpo_doecr[i],
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tc6393xb->scr + SCR_GPO_DOECR(i));
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iowrite8(tc6393xb->suspend_state.gpi_bcr[i],
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tc6393xb->scr + SCR_GPI_BCR(i));
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}
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return 0;
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2008-06-22 15:01:58 +04:00
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}
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#else
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#define tc6393xb_suspend NULL
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#define tc6393xb_resume NULL
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#endif
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static struct platform_driver tc6393xb_driver = {
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.probe = tc6393xb_probe,
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2012-11-19 22:20:24 +04:00
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.remove = tc6393xb_remove,
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2008-06-22 15:01:58 +04:00
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.suspend = tc6393xb_suspend,
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.resume = tc6393xb_resume,
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.driver = {
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.name = "tc6393xb",
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},
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};
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static int __init tc6393xb_init(void)
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{
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return platform_driver_register(&tc6393xb_driver);
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}
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static void __exit tc6393xb_exit(void)
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{
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platform_driver_unregister(&tc6393xb_driver);
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}
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subsys_initcall(tc6393xb_init);
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module_exit(tc6393xb_exit);
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2008-08-11 01:32:07 +04:00
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MODULE_LICENSE("GPL v2");
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2008-06-22 15:01:58 +04:00
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MODULE_AUTHOR("Ian Molton, Dmitry Baryshkov and Dirk Opfer");
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MODULE_DESCRIPTION("tc6393xb Toshiba Mobile IO Controller");
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MODULE_ALIAS("platform:tc6393xb");
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2010-01-06 15:51:48 +03:00
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