2005-04-17 02:20:36 +04:00
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/*
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* File: pci-acpi.c
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2005-03-24 00:16:03 +03:00
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* Purpose: Provide PCI support in ACPI
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2005-04-17 02:20:36 +04:00
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*
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2005-03-19 02:53:36 +03:00
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* Copyright (C) 2005 David Shaohua Li <shaohua.li@intel.com>
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* Copyright (C) 2004 Tom Long Nguyen <tom.l.nguyen@intel.com>
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* Copyright (C) 2004 Intel Corp.
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2005-04-17 02:20:36 +04:00
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/module.h>
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2008-07-23 06:32:24 +04:00
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#include <linux/pci-aspm.h>
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2005-04-17 02:20:36 +04:00
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#include <acpi/acpi.h>
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#include <acpi/acpi_bus.h>
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#include <linux/pci-acpi.h>
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2010-02-18 01:44:09 +03:00
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#include <linux/pm_runtime.h>
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2012-10-24 04:08:38 +04:00
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#include <linux/pm_qos.h>
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2005-03-19 08:15:48 +03:00
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#include "pci.h"
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2005-04-17 02:20:36 +04:00
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2010-02-18 01:44:09 +03:00
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/**
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* pci_acpi_wake_bus - Wake-up notification handler for root buses.
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* @handle: ACPI handle of a device the notification is for.
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* @event: Type of the signaled event.
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* @context: PCI root bus to wake up devices on.
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*/
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static void pci_acpi_wake_bus(acpi_handle handle, u32 event, void *context)
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{
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struct pci_bus *pci_bus = context;
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if (event == ACPI_NOTIFY_DEVICE_WAKE && pci_bus)
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pci_pme_wakeup_bus(pci_bus);
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}
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/**
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* pci_acpi_wake_dev - Wake-up notification handler for PCI devices.
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* @handle: ACPI handle of a device the notification is for.
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* @event: Type of the signaled event.
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* @context: PCI device object to wake up.
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*/
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static void pci_acpi_wake_dev(acpi_handle handle, u32 event, void *context)
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{
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struct pci_dev *pci_dev = context;
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2011-11-07 01:21:46 +04:00
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if (event != ACPI_NOTIFY_DEVICE_WAKE || !pci_dev)
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return;
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PCI/PM: add PCIe runtime D3cold support
This patch adds runtime D3cold support and corresponding ACPI platform
support. This patch only enables runtime D3cold support; it does not
enable D3cold support during system suspend/hibernate.
D3cold is the deepest power saving state for a PCIe device, where its main
power is removed. While it is in D3cold, you can't access the device at
all, not even its configuration space (which is still accessible in D3hot).
Therefore the PCI PM registers can not be used to transition into/out of
the D3cold state; that must be done by platform logic such as ACPI _PR3.
To support wakeup from D3cold, a system may provide auxiliary power, which
allows a device to request wakeup using a Beacon or the sideband WAKE#
signal. WAKE# is usually connected to platform logic such as ACPI GPE.
This is quite different from other power saving states, where devices
request wakeup via a PME message on the PCIe link.
Some devices, such as those in plug-in slots, have no direct platform
logic. For example, there is usually no ACPI _PR3 for them. D3cold
support for these devices can be done via the PCIe Downstream Port leading
to the device. When the PCIe port is powered on/off, the device is powered
on/off too. Wakeup events from the device will be notified to the
corresponding PCIe port.
For more information about PCIe D3cold and corresponding ACPI support,
please refer to:
- PCI Express Base Specification Revision 2.0
- Advanced Configuration and Power Interface Specification Revision 5.0
[bhelgaas: changelog]
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Originally-by: Zheng Yan <zheng.z.yan@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-23 06:23:51 +04:00
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if (pci_dev->current_state == PCI_D3cold) {
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pci_wakeup_event(pci_dev);
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pm_runtime_resume(&pci_dev->dev);
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return;
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}
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2013-03-28 15:07:29 +04:00
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/* Clear PME Status if set. */
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if (pci_dev->pme_support)
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pci_check_pme_status(pci_dev);
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PCI / PM: Extend PME polling to all PCI devices
The land of PCI power management is a land of sorrow and ugliness,
especially in the area of signaling events by devices. There are
devices that set their PME Status bits, but don't really bother
to send a PME message or assert PME#. There are hardware vendors
who don't connect PME# lines to the system core logic (they know
who they are). There are PCI Express Root Ports that don't bother
to trigger interrupts when they receive PME messages from the devices
below. There are ACPI BIOSes that forget to provide _PRW methods for
devices capable of signaling wakeup. Finally, there are BIOSes that
do provide _PRW methods for such devices, but then don't bother to
call Notify() for those devices from the corresponding _Lxx/_Exx
GPE-handling methods. In all of these cases the kernel doesn't have
a chance to receive a proper notification that it should wake up a
device, so devices stay in low-power states forever. Worse yet, in
some cases they continuously send PME Messages that are silently
ignored, because the kernel simply doesn't know that it should clear
the device's PME Status bit.
This problem was first observed for "parallel" (non-Express) PCI
devices on add-on cards and Matthew Garrett addressed it by adding
code that polls PME Status bits of such devices, if they are enabled
to signal PME, to the kernel. Recently, however, it has turned out
that PCI Express devices are also affected by this issue and that it
is not limited to add-on devices, so it seems necessary to extend
the PME polling to all PCI devices, including PCI Express and planar
ones. Still, it would be wasteful to poll the PME Status bits of
devices that are known to receive proper PME notifications, so make
the kernel (1) poll the PME Status bits of all PCI and PCIe devices
enabled to signal PME and (2) disable the PME Status polling for
devices for which correct PME notifications are received.
Tested-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2011-10-04 01:16:33 +04:00
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2013-03-28 15:07:29 +04:00
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if (pci_dev->pme_poll)
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pci_dev->pme_poll = false;
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pci_wakeup_event(pci_dev);
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pm_runtime_resume(&pci_dev->dev);
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2011-11-07 01:21:46 +04:00
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if (pci_dev->subordinate)
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pci_pme_wakeup_bus(pci_dev->subordinate);
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2010-02-18 01:44:09 +03:00
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}
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/**
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* pci_acpi_add_bus_pm_notifier - Register PM notifier for given PCI bus.
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* @dev: ACPI device to add the notifier for.
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* @pci_bus: PCI bus to walk checking for PME status if an event is signaled.
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*/
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acpi_status pci_acpi_add_bus_pm_notifier(struct acpi_device *dev,
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struct pci_bus *pci_bus)
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{
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2012-11-02 04:40:09 +04:00
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return acpi_add_pm_notifier(dev, pci_acpi_wake_bus, pci_bus);
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2010-02-18 01:44:09 +03:00
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}
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/**
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* pci_acpi_remove_bus_pm_notifier - Unregister PCI bus PM notifier.
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* @dev: ACPI device to remove the notifier from.
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*/
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acpi_status pci_acpi_remove_bus_pm_notifier(struct acpi_device *dev)
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{
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2012-11-02 04:40:09 +04:00
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return acpi_remove_pm_notifier(dev, pci_acpi_wake_bus);
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2010-02-18 01:44:09 +03:00
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}
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/**
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* pci_acpi_add_pm_notifier - Register PM notifier for given PCI device.
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* @dev: ACPI device to add the notifier for.
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* @pci_dev: PCI device to check for the PME status if an event is signaled.
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*/
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acpi_status pci_acpi_add_pm_notifier(struct acpi_device *dev,
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struct pci_dev *pci_dev)
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{
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2012-11-02 04:40:09 +04:00
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return acpi_add_pm_notifier(dev, pci_acpi_wake_dev, pci_dev);
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2010-02-18 01:44:09 +03:00
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}
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/**
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* pci_acpi_remove_pm_notifier - Unregister PCI device PM notifier.
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* @dev: ACPI device to remove the notifier from.
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*/
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acpi_status pci_acpi_remove_pm_notifier(struct acpi_device *dev)
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{
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2012-11-02 04:40:09 +04:00
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return acpi_remove_pm_notifier(dev, pci_acpi_wake_dev);
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2010-02-18 01:44:09 +03:00
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}
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2012-06-22 10:55:16 +04:00
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phys_addr_t acpi_pci_root_get_mcfg_addr(acpi_handle handle)
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{
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acpi_status status = AE_NOT_EXIST;
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unsigned long long mcfg_addr;
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if (handle)
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status = acpi_evaluate_integer(handle, METHOD_NAME__CBA,
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NULL, &mcfg_addr);
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if (ACPI_FAILURE(status))
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return 0;
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return (phys_addr_t)mcfg_addr;
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}
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2005-03-19 08:15:48 +03:00
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/*
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* _SxD returns the D-state with the highest power
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* (lowest D-state number) supported in the S-state "x".
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*
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* If the devices does not have a _PRW
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* (Power Resources for Wake) supporting system wakeup from "x"
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* then the OS is free to choose a lower power (higher number
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* D-state) than the return value from _SxD.
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*
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* But if _PRW is enabled at S-state "x", the OS
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* must not choose a power lower than _SxD --
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* unless the device has an _SxW method specifying
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* the lowest power (highest D-state number) the device
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* may enter while still able to wake the system.
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*
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* ie. depending on global OS policy:
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*
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* if (_PRW at S-state x)
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* choose from highest power _SxD to lowest power _SxW
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* else // no _PRW at S-state x
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* choose highest power _SxD or any lower power
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*/
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2008-06-05 03:16:37 +04:00
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static pci_power_t acpi_pci_choose_state(struct pci_dev *pdev)
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2005-03-19 08:15:48 +03:00
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{
|
PCI/PM: add PCIe runtime D3cold support
This patch adds runtime D3cold support and corresponding ACPI platform
support. This patch only enables runtime D3cold support; it does not
enable D3cold support during system suspend/hibernate.
D3cold is the deepest power saving state for a PCIe device, where its main
power is removed. While it is in D3cold, you can't access the device at
all, not even its configuration space (which is still accessible in D3hot).
Therefore the PCI PM registers can not be used to transition into/out of
the D3cold state; that must be done by platform logic such as ACPI _PR3.
To support wakeup from D3cold, a system may provide auxiliary power, which
allows a device to request wakeup using a Beacon or the sideband WAKE#
signal. WAKE# is usually connected to platform logic such as ACPI GPE.
This is quite different from other power saving states, where devices
request wakeup via a PME message on the PCIe link.
Some devices, such as those in plug-in slots, have no direct platform
logic. For example, there is usually no ACPI _PR3 for them. D3cold
support for these devices can be done via the PCIe Downstream Port leading
to the device. When the PCIe port is powered on/off, the device is powered
on/off too. Wakeup events from the device will be notified to the
corresponding PCIe port.
For more information about PCIe D3cold and corresponding ACPI support,
please refer to:
- PCI Express Base Specification Revision 2.0
- Advanced Configuration and Power Interface Specification Revision 5.0
[bhelgaas: changelog]
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Originally-by: Zheng Yan <zheng.z.yan@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-23 06:23:51 +04:00
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int acpi_state, d_max;
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2005-03-19 08:15:48 +03:00
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|
|
PCI/PM: add PCIe runtime D3cold support
This patch adds runtime D3cold support and corresponding ACPI platform
support. This patch only enables runtime D3cold support; it does not
enable D3cold support during system suspend/hibernate.
D3cold is the deepest power saving state for a PCIe device, where its main
power is removed. While it is in D3cold, you can't access the device at
all, not even its configuration space (which is still accessible in D3hot).
Therefore the PCI PM registers can not be used to transition into/out of
the D3cold state; that must be done by platform logic such as ACPI _PR3.
To support wakeup from D3cold, a system may provide auxiliary power, which
allows a device to request wakeup using a Beacon or the sideband WAKE#
signal. WAKE# is usually connected to platform logic such as ACPI GPE.
This is quite different from other power saving states, where devices
request wakeup via a PME message on the PCIe link.
Some devices, such as those in plug-in slots, have no direct platform
logic. For example, there is usually no ACPI _PR3 for them. D3cold
support for these devices can be done via the PCIe Downstream Port leading
to the device. When the PCIe port is powered on/off, the device is powered
on/off too. Wakeup events from the device will be notified to the
corresponding PCIe port.
For more information about PCIe D3cold and corresponding ACPI support,
please refer to:
- PCI Express Base Specification Revision 2.0
- Advanced Configuration and Power Interface Specification Revision 5.0
[bhelgaas: changelog]
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Originally-by: Zheng Yan <zheng.z.yan@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-23 06:23:51 +04:00
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if (pdev->no_d3cold)
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d_max = ACPI_STATE_D3_HOT;
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else
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d_max = ACPI_STATE_D3_COLD;
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acpi_state = acpi_pm_device_sleep_state(&pdev->dev, NULL, d_max);
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2007-07-20 06:03:22 +04:00
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if (acpi_state < 0)
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return PCI_POWER_ERROR;
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switch (acpi_state) {
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case ACPI_STATE_D0:
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return PCI_D0;
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case ACPI_STATE_D1:
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return PCI_D1;
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case ACPI_STATE_D2:
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return PCI_D2;
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2012-04-23 05:03:49 +04:00
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case ACPI_STATE_D3_HOT:
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2007-07-20 06:03:22 +04:00
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return PCI_D3hot;
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2011-05-04 18:56:43 +04:00
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case ACPI_STATE_D3_COLD:
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return PCI_D3cold;
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2007-07-20 06:03:22 +04:00
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}
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return PCI_POWER_ERROR;
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2005-03-19 08:15:48 +03:00
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}
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2008-07-07 05:32:02 +04:00
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static bool acpi_pci_power_manageable(struct pci_dev *dev)
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{
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acpi_handle handle = DEVICE_ACPI_HANDLE(&dev->dev);
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return handle ? acpi_bus_power_manageable(handle) : false;
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}
|
2005-03-19 08:15:48 +03:00
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2005-03-19 08:16:18 +03:00
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static int acpi_pci_set_power_state(struct pci_dev *dev, pci_power_t state)
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{
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acpi_handle handle = DEVICE_ACPI_HANDLE(&dev->dev);
|
2007-07-20 06:03:25 +04:00
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acpi_handle tmp;
|
2008-02-23 08:41:51 +03:00
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static const u8 state_conv[] = {
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[PCI_D0] = ACPI_STATE_D0,
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[PCI_D1] = ACPI_STATE_D1,
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[PCI_D2] = ACPI_STATE_D2,
|
2013-06-14 02:29:50 +04:00
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[PCI_D3hot] = ACPI_STATE_D3_COLD,
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[PCI_D3cold] = ACPI_STATE_D3_COLD,
|
2005-03-19 08:16:18 +03:00
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};
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2008-07-07 05:32:52 +04:00
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int error = -EINVAL;
|
2005-03-19 08:16:18 +03:00
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2007-07-20 06:03:25 +04:00
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/* If the ACPI device has _EJ0, ignore the device */
|
2008-07-07 05:32:52 +04:00
|
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if (!handle || ACPI_SUCCESS(acpi_get_handle(handle, "_EJ0", &tmp)))
|
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return -ENODEV;
|
2008-02-23 08:41:51 +03:00
|
|
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switch (state) {
|
2012-10-24 04:08:38 +04:00
|
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|
case PCI_D3cold:
|
|
|
|
if (dev_pm_qos_flags(&dev->dev, PM_QOS_FLAG_NO_POWER_OFF) ==
|
|
|
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PM_QOS_FLAGS_ALL) {
|
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error = -EBUSY;
|
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break;
|
|
|
|
}
|
2008-02-23 08:41:51 +03:00
|
|
|
case PCI_D0:
|
|
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|
case PCI_D1:
|
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case PCI_D2:
|
|
|
|
case PCI_D3hot:
|
2008-07-07 05:32:52 +04:00
|
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|
error = acpi_bus_set_power(handle, state_conv[state]);
|
2008-02-23 08:41:51 +03:00
|
|
|
}
|
2008-07-07 05:32:52 +04:00
|
|
|
|
|
|
|
if (!error)
|
2012-08-05 01:27:32 +04:00
|
|
|
dev_info(&dev->dev, "power state changed by ACPI to %s\n",
|
2013-06-14 02:29:50 +04:00
|
|
|
acpi_power_state_string(state_conv[state]));
|
2008-07-07 05:32:52 +04:00
|
|
|
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|
return error;
|
2005-03-19 08:16:18 +03:00
|
|
|
}
|
|
|
|
|
2008-07-07 05:34:48 +04:00
|
|
|
static bool acpi_pci_can_wakeup(struct pci_dev *dev)
|
|
|
|
{
|
|
|
|
acpi_handle handle = DEVICE_ACPI_HANDLE(&dev->dev);
|
|
|
|
|
|
|
|
return handle ? acpi_bus_can_wakeup(handle) : false;
|
|
|
|
}
|
|
|
|
|
PCI / ACPI PM: Propagate wake-up enable for devices w/o ACPI support
Some PCI devices (not PCI Express), like PCI add-on cards, can
generate PME#, but they don't have any special platform wake-up
support. For this reason, even if they generate PME# to wake up the
system from a sleep state, wake-up events are not generated by the
platform.
It turns out that, at least on some systems, PCI bridges and the PCI
host bridge have ACPI GPEs associated with them that, if enabled to
generate wake-up events, allow the system to wake up if one of the
add-on devices asserts PME# while the system is in a sleep state.
Following this observation, if a PCI device without direct ACPI
wake-up support is prepared to wake up the system during a transition
into a sleep state (eg. suspend to RAM), try to configure the bridges
on the path from the device to the root bridge to wake-up the system.
Reviewed-by: Matthew Garrett <mjg59@srcf.ucam.org>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-09 01:16:24 +04:00
|
|
|
static void acpi_pci_propagate_wakeup_enable(struct pci_bus *bus, bool enable)
|
|
|
|
{
|
|
|
|
while (bus->parent) {
|
2009-11-29 18:35:54 +03:00
|
|
|
if (!acpi_pm_device_sleep_wake(&bus->self->dev, enable))
|
PCI / ACPI PM: Propagate wake-up enable for devices w/o ACPI support
Some PCI devices (not PCI Express), like PCI add-on cards, can
generate PME#, but they don't have any special platform wake-up
support. For this reason, even if they generate PME# to wake up the
system from a sleep state, wake-up events are not generated by the
platform.
It turns out that, at least on some systems, PCI bridges and the PCI
host bridge have ACPI GPEs associated with them that, if enabled to
generate wake-up events, allow the system to wake up if one of the
add-on devices asserts PME# while the system is in a sleep state.
Following this observation, if a PCI device without direct ACPI
wake-up support is prepared to wake up the system during a transition
into a sleep state (eg. suspend to RAM), try to configure the bridges
on the path from the device to the root bridge to wake-up the system.
Reviewed-by: Matthew Garrett <mjg59@srcf.ucam.org>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-09 01:16:24 +04:00
|
|
|
return;
|
|
|
|
bus = bus->parent;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We have reached the root bus. */
|
|
|
|
if (bus->bridge)
|
|
|
|
acpi_pm_device_sleep_wake(bus->bridge, enable);
|
|
|
|
}
|
|
|
|
|
2008-07-07 05:34:48 +04:00
|
|
|
static int acpi_pci_sleep_wake(struct pci_dev *dev, bool enable)
|
|
|
|
{
|
PCI / ACPI PM: Propagate wake-up enable for devices w/o ACPI support
Some PCI devices (not PCI Express), like PCI add-on cards, can
generate PME#, but they don't have any special platform wake-up
support. For this reason, even if they generate PME# to wake up the
system from a sleep state, wake-up events are not generated by the
platform.
It turns out that, at least on some systems, PCI bridges and the PCI
host bridge have ACPI GPEs associated with them that, if enabled to
generate wake-up events, allow the system to wake up if one of the
add-on devices asserts PME# while the system is in a sleep state.
Following this observation, if a PCI device without direct ACPI
wake-up support is prepared to wake up the system during a transition
into a sleep state (eg. suspend to RAM), try to configure the bridges
on the path from the device to the root bridge to wake-up the system.
Reviewed-by: Matthew Garrett <mjg59@srcf.ucam.org>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-09 01:16:24 +04:00
|
|
|
if (acpi_pci_can_wakeup(dev))
|
|
|
|
return acpi_pm_device_sleep_wake(&dev->dev, enable);
|
|
|
|
|
2009-11-29 18:35:54 +03:00
|
|
|
acpi_pci_propagate_wakeup_enable(dev->bus, enable);
|
PCI / ACPI PM: Propagate wake-up enable for devices w/o ACPI support
Some PCI devices (not PCI Express), like PCI add-on cards, can
generate PME#, but they don't have any special platform wake-up
support. For this reason, even if they generate PME# to wake up the
system from a sleep state, wake-up events are not generated by the
platform.
It turns out that, at least on some systems, PCI bridges and the PCI
host bridge have ACPI GPEs associated with them that, if enabled to
generate wake-up events, allow the system to wake up if one of the
add-on devices asserts PME# while the system is in a sleep state.
Following this observation, if a PCI device without direct ACPI
wake-up support is prepared to wake up the system during a transition
into a sleep state (eg. suspend to RAM), try to configure the bridges
on the path from the device to the root bridge to wake-up the system.
Reviewed-by: Matthew Garrett <mjg59@srcf.ucam.org>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-09-09 01:16:24 +04:00
|
|
|
return 0;
|
2008-07-07 05:34:48 +04:00
|
|
|
}
|
|
|
|
|
2010-02-18 01:44:09 +03:00
|
|
|
static void acpi_pci_propagate_run_wake(struct pci_bus *bus, bool enable)
|
|
|
|
{
|
|
|
|
while (bus->parent) {
|
|
|
|
struct pci_dev *bridge = bus->self;
|
|
|
|
|
|
|
|
if (bridge->pme_interrupt)
|
|
|
|
return;
|
2012-03-27 11:43:25 +04:00
|
|
|
if (!acpi_pm_device_run_wake(&bridge->dev, enable))
|
2010-02-18 01:44:09 +03:00
|
|
|
return;
|
|
|
|
bus = bus->parent;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We have reached the root bus. */
|
|
|
|
if (bus->bridge)
|
2012-03-27 11:43:25 +04:00
|
|
|
acpi_pm_device_run_wake(bus->bridge, enable);
|
2010-02-18 01:44:09 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static int acpi_pci_run_wake(struct pci_dev *dev, bool enable)
|
|
|
|
{
|
PCI/PM: add PCIe runtime D3cold support
This patch adds runtime D3cold support and corresponding ACPI platform
support. This patch only enables runtime D3cold support; it does not
enable D3cold support during system suspend/hibernate.
D3cold is the deepest power saving state for a PCIe device, where its main
power is removed. While it is in D3cold, you can't access the device at
all, not even its configuration space (which is still accessible in D3hot).
Therefore the PCI PM registers can not be used to transition into/out of
the D3cold state; that must be done by platform logic such as ACPI _PR3.
To support wakeup from D3cold, a system may provide auxiliary power, which
allows a device to request wakeup using a Beacon or the sideband WAKE#
signal. WAKE# is usually connected to platform logic such as ACPI GPE.
This is quite different from other power saving states, where devices
request wakeup via a PME message on the PCIe link.
Some devices, such as those in plug-in slots, have no direct platform
logic. For example, there is usually no ACPI _PR3 for them. D3cold
support for these devices can be done via the PCIe Downstream Port leading
to the device. When the PCIe port is powered on/off, the device is powered
on/off too. Wakeup events from the device will be notified to the
corresponding PCIe port.
For more information about PCIe D3cold and corresponding ACPI support,
please refer to:
- PCI Express Base Specification Revision 2.0
- Advanced Configuration and Power Interface Specification Revision 5.0
[bhelgaas: changelog]
Reviewed-by: Rafael J. Wysocki <rjw@sisk.pl>
Originally-by: Zheng Yan <zheng.z.yan@intel.com>
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2012-06-23 06:23:51 +04:00
|
|
|
/*
|
|
|
|
* Per PCI Express Base Specification Revision 2.0 section
|
|
|
|
* 5.3.3.2 Link Wakeup, platform support is needed for D3cold
|
|
|
|
* waking up to power on the main link even if there is PME
|
|
|
|
* support for D3cold
|
|
|
|
*/
|
|
|
|
if (dev->pme_interrupt && !dev->runtime_d3cold)
|
2010-02-18 01:44:09 +03:00
|
|
|
return 0;
|
|
|
|
|
2012-03-27 11:43:25 +04:00
|
|
|
if (!acpi_pm_device_run_wake(&dev->dev, enable))
|
2010-02-18 01:44:09 +03:00
|
|
|
return 0;
|
|
|
|
|
|
|
|
acpi_pci_propagate_run_wake(dev->bus, enable);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-07-07 05:32:02 +04:00
|
|
|
static struct pci_platform_pm_ops acpi_pci_platform_pm = {
|
|
|
|
.is_manageable = acpi_pci_power_manageable,
|
|
|
|
.set_state = acpi_pci_set_power_state,
|
|
|
|
.choose_state = acpi_pci_choose_state,
|
2008-07-07 05:34:48 +04:00
|
|
|
.sleep_wake = acpi_pci_sleep_wake,
|
2010-02-18 01:44:09 +03:00
|
|
|
.run_wake = acpi_pci_run_wake,
|
2008-07-07 05:32:02 +04:00
|
|
|
};
|
2005-03-19 08:16:18 +03:00
|
|
|
|
2013-04-12 09:44:21 +04:00
|
|
|
void acpi_pci_add_bus(struct pci_bus *bus)
|
|
|
|
{
|
2013-07-14 01:27:23 +04:00
|
|
|
if (acpi_pci_disabled || !bus->bridge)
|
2013-04-12 09:44:21 +04:00
|
|
|
return;
|
|
|
|
|
2013-07-14 01:27:23 +04:00
|
|
|
acpi_pci_slot_enumerate(bus);
|
|
|
|
acpiphp_enumerate_slots(bus);
|
2013-04-12 09:44:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
void acpi_pci_remove_bus(struct pci_bus *bus)
|
|
|
|
{
|
2013-07-14 01:27:23 +04:00
|
|
|
if (acpi_pci_disabled || !bus->bridge)
|
2013-04-12 09:44:21 +04:00
|
|
|
return;
|
|
|
|
|
2013-04-12 09:44:26 +04:00
|
|
|
acpiphp_remove_slots(bus);
|
2013-04-12 09:44:24 +04:00
|
|
|
acpi_pci_slot_remove(bus);
|
2013-04-12 09:44:21 +04:00
|
|
|
}
|
|
|
|
|
2005-03-19 02:53:36 +03:00
|
|
|
/* ACPI bus type */
|
2006-04-28 11:42:21 +04:00
|
|
|
static int acpi_pci_find_device(struct device *dev, acpi_handle *handle)
|
2005-03-19 02:53:36 +03:00
|
|
|
{
|
|
|
|
struct pci_dev * pci_dev;
|
2010-01-28 05:53:19 +03:00
|
|
|
u64 addr;
|
2005-03-19 02:53:36 +03:00
|
|
|
|
|
|
|
pci_dev = to_pci_dev(dev);
|
|
|
|
/* Please ref to ACPI spec for the syntax of _ADR */
|
|
|
|
addr = (PCI_SLOT(pci_dev->devfn) << 16) | PCI_FUNC(pci_dev->devfn);
|
|
|
|
*handle = acpi_get_child(DEVICE_ACPI_HANDLE(dev->parent), addr);
|
|
|
|
if (!*handle)
|
|
|
|
return -ENODEV;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-23 03:02:54 +04:00
|
|
|
static void pci_acpi_setup(struct device *dev)
|
2012-12-23 03:02:44 +04:00
|
|
|
{
|
|
|
|
struct pci_dev *pci_dev = to_pci_dev(dev);
|
2012-12-23 03:02:54 +04:00
|
|
|
acpi_handle handle = ACPI_HANDLE(dev);
|
|
|
|
struct acpi_device *adev;
|
|
|
|
|
|
|
|
if (acpi_bus_get_device(handle, &adev) || !adev->wakeup.flags.valid)
|
2012-12-23 03:02:44 +04:00
|
|
|
return;
|
|
|
|
|
|
|
|
device_set_wakeup_capable(dev, true);
|
|
|
|
acpi_pci_sleep_wake(pci_dev, false);
|
|
|
|
|
|
|
|
pci_acpi_add_pm_notifier(adev, pci_dev);
|
|
|
|
if (adev->wakeup.flags.run_wake)
|
|
|
|
device_set_run_wake(dev, true);
|
|
|
|
}
|
|
|
|
|
2012-12-23 03:02:54 +04:00
|
|
|
static void pci_acpi_cleanup(struct device *dev)
|
2012-12-23 03:02:44 +04:00
|
|
|
{
|
2012-12-23 03:02:54 +04:00
|
|
|
acpi_handle handle = ACPI_HANDLE(dev);
|
|
|
|
struct acpi_device *adev;
|
2012-12-23 03:02:44 +04:00
|
|
|
|
2012-12-23 03:02:54 +04:00
|
|
|
if (!acpi_bus_get_device(handle, &adev) && adev->wakeup.flags.valid) {
|
2012-12-23 03:02:44 +04:00
|
|
|
device_set_wakeup_capable(dev, false);
|
|
|
|
device_set_run_wake(dev, false);
|
|
|
|
pci_acpi_remove_pm_notifier(adev);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2013-03-04 01:35:20 +04:00
|
|
|
static bool pci_acpi_bus_match(struct device *dev)
|
|
|
|
{
|
|
|
|
return dev->bus == &pci_bus_type;
|
|
|
|
}
|
|
|
|
|
2006-04-28 11:42:21 +04:00
|
|
|
static struct acpi_bus_type acpi_pci_bus = {
|
2013-03-04 01:35:20 +04:00
|
|
|
.name = "PCI",
|
|
|
|
.match = pci_acpi_bus_match,
|
2006-04-28 11:42:21 +04:00
|
|
|
.find_device = acpi_pci_find_device,
|
2012-12-23 03:02:54 +04:00
|
|
|
.setup = pci_acpi_setup,
|
|
|
|
.cleanup = pci_acpi_cleanup,
|
2005-03-19 02:53:36 +03:00
|
|
|
};
|
|
|
|
|
2006-04-28 11:42:21 +04:00
|
|
|
static int __init acpi_pci_init(void)
|
2005-03-19 02:53:36 +03:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
2009-02-03 10:14:33 +03:00
|
|
|
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_MSI) {
|
2013-05-28 12:03:46 +04:00
|
|
|
pr_info("ACPI FADT declares the system doesn't support MSI, so disable it\n");
|
2007-04-25 07:05:12 +04:00
|
|
|
pci_no_msi();
|
|
|
|
}
|
2008-07-23 06:32:24 +04:00
|
|
|
|
2009-02-03 10:14:33 +03:00
|
|
|
if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_ASPM) {
|
2013-05-28 12:03:46 +04:00
|
|
|
pr_info("ACPI FADT declares the system doesn't support PCIe ASPM, so disable it\n");
|
2008-07-23 06:32:24 +04:00
|
|
|
pcie_no_aspm();
|
|
|
|
}
|
|
|
|
|
2006-04-28 11:42:21 +04:00
|
|
|
ret = register_acpi_bus_type(&acpi_pci_bus);
|
2005-03-19 02:53:36 +03:00
|
|
|
if (ret)
|
|
|
|
return 0;
|
2013-04-12 09:44:24 +04:00
|
|
|
|
2008-07-07 05:32:02 +04:00
|
|
|
pci_set_platform_pm(&acpi_pci_platform_pm);
|
2013-04-12 09:44:24 +04:00
|
|
|
acpi_pci_slot_init();
|
2013-04-12 09:44:26 +04:00
|
|
|
acpiphp_init();
|
2013-04-12 09:44:24 +04:00
|
|
|
|
2005-03-19 02:53:36 +03:00
|
|
|
return 0;
|
|
|
|
}
|
2006-04-28 11:42:21 +04:00
|
|
|
arch_initcall(acpi_pci_init);
|