2005-08-18 13:08:15 +04:00
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/*
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* linux/drivers/mfd/mcp-sa11x0.c
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*
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* Copyright (C) 2001-2005 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*
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* SA11x0 MCP (Multimedia Communications Port) driver.
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*
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* MCP read/write timeouts from Jordi Colomer, rehacked by rmk.
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*/
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#include <linux/module.h>
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2012-01-21 03:09:42 +04:00
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#include <linux/io.h>
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2005-08-18 13:08:15 +04:00
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/spinlock.h>
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2005-10-29 22:07:23 +04:00
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#include <linux/platform_device.h>
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2012-01-21 13:34:30 +04:00
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#include <linux/pm.h>
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2009-02-10 16:54:57 +03:00
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#include <linux/mfd/mcp.h>
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2005-08-18 13:08:15 +04:00
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2008-08-05 19:14:15 +04:00
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#include <mach/hardware.h>
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2005-08-18 13:08:15 +04:00
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#include <asm/mach-types.h>
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2012-08-24 17:17:38 +04:00
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#include <linux/platform_data/mfd-mcp-sa11x0.h>
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2005-08-18 13:08:15 +04:00
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2012-01-21 02:30:15 +04:00
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#define DRIVER_NAME "sa11x0-mcp"
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2005-08-18 13:08:15 +04:00
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struct mcp_sa11x0 {
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2012-01-21 03:09:42 +04:00
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void __iomem *base0;
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void __iomem *base1;
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u32 mccr0;
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u32 mccr1;
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2005-08-18 13:08:15 +04:00
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};
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2012-01-21 03:09:42 +04:00
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/* Register offsets */
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#define MCCR0(m) ((m)->base0 + 0x00)
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#define MCDR0(m) ((m)->base0 + 0x08)
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#define MCDR1(m) ((m)->base0 + 0x0c)
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#define MCDR2(m) ((m)->base0 + 0x10)
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#define MCSR(m) ((m)->base0 + 0x18)
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#define MCCR1(m) ((m)->base1 + 0x00)
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2005-08-18 13:08:15 +04:00
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#define priv(mcp) ((struct mcp_sa11x0 *)mcp_priv(mcp))
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static void
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mcp_sa11x0_set_telecom_divisor(struct mcp *mcp, unsigned int divisor)
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{
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2012-01-21 03:09:42 +04:00
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struct mcp_sa11x0 *m = priv(mcp);
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2005-08-18 13:08:15 +04:00
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divisor /= 32;
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2012-01-21 03:09:42 +04:00
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m->mccr0 &= ~0x00007f00;
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m->mccr0 |= divisor << 8;
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writel_relaxed(m->mccr0, MCCR0(m));
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2005-08-18 13:08:15 +04:00
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}
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static void
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mcp_sa11x0_set_audio_divisor(struct mcp *mcp, unsigned int divisor)
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{
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2012-01-21 03:09:42 +04:00
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struct mcp_sa11x0 *m = priv(mcp);
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2005-08-18 13:08:15 +04:00
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divisor /= 32;
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2012-01-21 03:09:42 +04:00
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m->mccr0 &= ~0x0000007f;
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m->mccr0 |= divisor;
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writel_relaxed(m->mccr0, MCCR0(m));
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2005-08-18 13:08:15 +04:00
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}
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/*
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* Write data to the device. The bit should be set after 3 subframe
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* times (each frame is 64 clocks). We wait a maximum of 6 subframes.
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* We really should try doing something more productive while we
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* wait.
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*/
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static void
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mcp_sa11x0_write(struct mcp *mcp, unsigned int reg, unsigned int val)
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{
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2012-01-21 03:09:42 +04:00
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struct mcp_sa11x0 *m = priv(mcp);
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2005-08-18 13:08:15 +04:00
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int ret = -ETIME;
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int i;
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2012-01-21 03:09:42 +04:00
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writel_relaxed(reg << 17 | MCDR2_Wr | (val & 0xffff), MCDR2(m));
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2005-08-18 13:08:15 +04:00
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for (i = 0; i < 2; i++) {
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udelay(mcp->rw_timeout);
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2012-01-21 03:09:42 +04:00
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if (readl_relaxed(MCSR(m)) & MCSR_CWC) {
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2005-08-18 13:08:15 +04:00
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ret = 0;
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break;
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}
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}
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if (ret < 0)
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printk(KERN_WARNING "mcp: write timed out\n");
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}
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/*
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* Read data from the device. The bit should be set after 3 subframe
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* times (each frame is 64 clocks). We wait a maximum of 6 subframes.
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* We really should try doing something more productive while we
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* wait.
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*/
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static unsigned int
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mcp_sa11x0_read(struct mcp *mcp, unsigned int reg)
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{
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2012-01-21 03:09:42 +04:00
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struct mcp_sa11x0 *m = priv(mcp);
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2005-08-18 13:08:15 +04:00
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int ret = -ETIME;
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int i;
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2012-01-21 03:09:42 +04:00
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writel_relaxed(reg << 17 | MCDR2_Rd, MCDR2(m));
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2005-08-18 13:08:15 +04:00
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for (i = 0; i < 2; i++) {
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udelay(mcp->rw_timeout);
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2012-01-21 03:09:42 +04:00
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if (readl_relaxed(MCSR(m)) & MCSR_CRC) {
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ret = readl_relaxed(MCDR2(m)) & 0xffff;
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2005-08-18 13:08:15 +04:00
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break;
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}
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}
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if (ret < 0)
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printk(KERN_WARNING "mcp: read timed out\n");
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return ret;
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}
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static void mcp_sa11x0_enable(struct mcp *mcp)
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{
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2012-01-21 03:09:42 +04:00
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struct mcp_sa11x0 *m = priv(mcp);
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writel(-1, MCSR(m));
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m->mccr0 |= MCCR0_MCE;
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writel_relaxed(m->mccr0, MCCR0(m));
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2005-08-18 13:08:15 +04:00
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}
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static void mcp_sa11x0_disable(struct mcp *mcp)
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{
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2012-01-21 03:09:42 +04:00
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struct mcp_sa11x0 *m = priv(mcp);
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m->mccr0 &= ~MCCR0_MCE;
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writel_relaxed(m->mccr0, MCCR0(m));
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2005-08-18 13:08:15 +04:00
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}
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/*
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* Our methods.
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*/
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static struct mcp_ops mcp_sa11x0 = {
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.set_telecom_divisor = mcp_sa11x0_set_telecom_divisor,
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.set_audio_divisor = mcp_sa11x0_set_audio_divisor,
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.reg_write = mcp_sa11x0_write,
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.reg_read = mcp_sa11x0_read,
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.enable = mcp_sa11x0_enable,
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.disable = mcp_sa11x0_disable,
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};
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2012-01-21 03:09:42 +04:00
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static int mcp_sa11x0_probe(struct platform_device *dev)
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2005-08-18 13:08:15 +04:00
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{
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2013-07-30 12:10:05 +04:00
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struct mcp_plat_data *data = dev_get_platdata(&dev->dev);
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2012-01-21 03:09:42 +04:00
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struct resource *mem0, *mem1;
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struct mcp_sa11x0 *m;
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2005-08-18 13:08:15 +04:00
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struct mcp *mcp;
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int ret;
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2005-08-18 13:10:46 +04:00
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if (!data)
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2005-08-18 13:08:15 +04:00
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return -ENODEV;
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2012-01-21 03:09:42 +04:00
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mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
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mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
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if (!mem0 || !mem1)
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return -ENXIO;
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if (!request_mem_region(mem0->start, resource_size(mem0),
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DRIVER_NAME)) {
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ret = -EBUSY;
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goto err_mem0;
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}
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2005-08-18 13:08:15 +04:00
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2012-01-21 03:09:42 +04:00
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if (!request_mem_region(mem1->start, resource_size(mem1),
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DRIVER_NAME)) {
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ret = -EBUSY;
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goto err_mem1;
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}
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mcp = mcp_host_alloc(&dev->dev, sizeof(struct mcp_sa11x0));
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2005-08-18 13:08:15 +04:00
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if (!mcp) {
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ret = -ENOMEM;
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2012-01-21 03:09:42 +04:00
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goto err_alloc;
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2005-08-18 13:08:15 +04:00
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}
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mcp->owner = THIS_MODULE;
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mcp->ops = &mcp_sa11x0;
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2005-08-18 13:10:46 +04:00
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mcp->sclk_rate = data->sclk_rate;
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2005-08-18 13:08:15 +04:00
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2012-01-21 03:09:42 +04:00
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m = priv(mcp);
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m->mccr0 = data->mccr0 | 0x7f7f;
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m->mccr1 = data->mccr1;
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m->base0 = ioremap(mem0->start, resource_size(mem0));
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m->base1 = ioremap(mem1->start, resource_size(mem1));
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if (!m->base0 || !m->base1) {
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ret = -ENOMEM;
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goto err_ioremap;
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}
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platform_set_drvdata(dev, mcp);
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2005-08-18 13:08:15 +04:00
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2005-08-18 13:10:46 +04:00
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/*
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* Initialise device. Note that we initially
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* set the sampling rate to minimum.
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*/
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2012-01-21 03:09:42 +04:00
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writel_relaxed(-1, MCSR(m));
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writel_relaxed(m->mccr1, MCCR1(m));
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writel_relaxed(m->mccr0, MCCR0(m));
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2005-08-18 13:08:15 +04:00
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/*
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* Calculate the read/write timeout (us) from the bit clock
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* rate. This is the period for 3 64-bit frames. Always
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* round this time up.
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*/
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mcp->rw_timeout = (64 * 3 * 1000000 + mcp->sclk_rate - 1) /
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mcp->sclk_rate;
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2012-01-21 02:13:52 +04:00
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ret = mcp_host_add(mcp, data->codec_pdata);
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2005-08-18 13:08:15 +04:00
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if (ret == 0)
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2012-01-21 03:09:42 +04:00
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return 0;
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2005-08-18 13:08:15 +04:00
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2012-01-21 03:09:42 +04:00
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err_ioremap:
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iounmap(m->base1);
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iounmap(m->base0);
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mcp_host_free(mcp);
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err_alloc:
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release_mem_region(mem1->start, resource_size(mem1));
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err_mem1:
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release_mem_region(mem0->start, resource_size(mem0));
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err_mem0:
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2005-08-18 13:08:15 +04:00
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return ret;
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}
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2012-01-20 21:37:21 +04:00
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static int mcp_sa11x0_remove(struct platform_device *dev)
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2005-08-18 13:08:15 +04:00
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{
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2012-01-20 21:37:21 +04:00
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struct mcp *mcp = platform_get_drvdata(dev);
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2012-01-21 03:09:42 +04:00
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struct mcp_sa11x0 *m = priv(mcp);
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struct resource *mem0, *mem1;
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2012-01-21 22:26:17 +04:00
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if (m->mccr0 & MCCR0_MCE)
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dev_warn(&dev->dev,
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"device left active (missing disable call?)\n");
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2012-01-21 03:09:42 +04:00
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mem0 = platform_get_resource(dev, IORESOURCE_MEM, 0);
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mem1 = platform_get_resource(dev, IORESOURCE_MEM, 1);
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2005-08-18 13:08:15 +04:00
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2012-01-21 02:51:07 +04:00
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mcp_host_del(mcp);
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2012-01-21 03:09:42 +04:00
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iounmap(m->base1);
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iounmap(m->base0);
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2012-01-21 02:51:07 +04:00
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mcp_host_free(mcp);
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2012-01-21 03:09:42 +04:00
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release_mem_region(mem1->start, resource_size(mem1));
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release_mem_region(mem0->start, resource_size(mem0));
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2005-08-18 13:08:15 +04:00
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return 0;
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}
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2012-01-21 13:34:30 +04:00
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#ifdef CONFIG_PM_SLEEP
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static int mcp_sa11x0_suspend(struct device *dev)
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2005-08-18 13:08:15 +04:00
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{
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2012-01-21 13:34:30 +04:00
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struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
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2005-08-18 13:08:15 +04:00
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2012-01-21 22:26:17 +04:00
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if (m->mccr0 & MCCR0_MCE)
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dev_warn(dev, "device left active (missing disable call?)\n");
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2012-01-21 03:09:42 +04:00
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writel(m->mccr0 & ~MCCR0_MCE, MCCR0(m));
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2005-10-28 20:52:56 +04:00
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2005-08-18 13:08:15 +04:00
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return 0;
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}
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2012-01-21 13:34:30 +04:00
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static int mcp_sa11x0_resume(struct device *dev)
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2005-08-18 13:08:15 +04:00
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{
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2012-01-21 13:34:30 +04:00
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struct mcp_sa11x0 *m = priv(dev_get_drvdata(dev));
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2005-08-18 13:08:15 +04:00
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2012-01-21 03:09:42 +04:00
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writel_relaxed(m->mccr1, MCCR1(m));
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writel_relaxed(m->mccr0, MCCR0(m));
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2005-10-28 20:52:56 +04:00
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2005-08-18 13:08:15 +04:00
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return 0;
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}
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2012-01-21 13:34:30 +04:00
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#endif
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static const struct dev_pm_ops mcp_sa11x0_pm_ops = {
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2012-01-21 22:03:00 +04:00
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#ifdef CONFIG_PM_SLEEP
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.suspend = mcp_sa11x0_suspend,
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.freeze = mcp_sa11x0_suspend,
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.poweroff = mcp_sa11x0_suspend,
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.resume_noirq = mcp_sa11x0_resume,
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.thaw_noirq = mcp_sa11x0_resume,
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.restore_noirq = mcp_sa11x0_resume,
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#endif
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2012-01-21 13:34:30 +04:00
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};
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2005-08-18 13:08:15 +04:00
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2005-11-10 01:32:44 +03:00
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static struct platform_driver mcp_sa11x0_driver = {
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2005-08-18 13:08:15 +04:00
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.probe = mcp_sa11x0_probe,
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.remove = mcp_sa11x0_remove,
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2005-11-10 01:32:44 +03:00
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.driver = {
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2012-01-21 02:30:15 +04:00
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.name = DRIVER_NAME,
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2012-01-21 13:34:30 +04:00
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.pm = &mcp_sa11x0_pm_ops,
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2005-11-10 01:32:44 +03:00
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},
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2005-08-18 13:08:15 +04:00
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};
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/*
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* This needs re-working
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*/
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2011-11-24 02:58:34 +04:00
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module_platform_driver(mcp_sa11x0_driver);
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2005-08-18 13:08:15 +04:00
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2012-01-21 02:30:15 +04:00
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MODULE_ALIAS("platform:" DRIVER_NAME);
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2005-08-18 13:08:15 +04:00
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MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
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MODULE_DESCRIPTION("SA11x0 multimedia communications port driver");
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MODULE_LICENSE("GPL");
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