2013-03-21 18:10:36 +04:00
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/*
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* Copyright (C) 2013 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-imx.h"
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enum imx6sl_pads {
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MX6SL_PAD_RESERVE0 = 0,
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MX6SL_PAD_RESERVE1 = 1,
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MX6SL_PAD_RESERVE2 = 2,
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MX6SL_PAD_RESERVE3 = 3,
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MX6SL_PAD_RESERVE4 = 4,
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MX6SL_PAD_RESERVE5 = 5,
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MX6SL_PAD_RESERVE6 = 6,
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MX6SL_PAD_RESERVE7 = 7,
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MX6SL_PAD_RESERVE8 = 8,
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MX6SL_PAD_RESERVE9 = 9,
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MX6SL_PAD_RESERVE10 = 10,
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MX6SL_PAD_RESERVE11 = 11,
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MX6SL_PAD_RESERVE12 = 12,
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MX6SL_PAD_RESERVE13 = 13,
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MX6SL_PAD_RESERVE14 = 14,
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MX6SL_PAD_RESERVE15 = 15,
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MX6SL_PAD_RESERVE16 = 16,
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MX6SL_PAD_RESERVE17 = 17,
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MX6SL_PAD_RESERVE18 = 18,
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MX6SL_PAD_AUD_MCLK = 19,
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MX6SL_PAD_AUD_RXC = 20,
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MX6SL_PAD_AUD_RXD = 21,
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MX6SL_PAD_AUD_RXFS = 22,
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MX6SL_PAD_AUD_TXC = 23,
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MX6SL_PAD_AUD_TXD = 24,
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MX6SL_PAD_AUD_TXFS = 25,
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MX6SL_PAD_ECSPI1_MISO = 26,
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MX6SL_PAD_ECSPI1_MOSI = 27,
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MX6SL_PAD_ECSPI1_SCLK = 28,
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MX6SL_PAD_ECSPI1_SS0 = 29,
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MX6SL_PAD_ECSPI2_MISO = 30,
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MX6SL_PAD_ECSPI2_MOSI = 31,
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MX6SL_PAD_ECSPI2_SCLK = 32,
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MX6SL_PAD_ECSPI2_SS0 = 33,
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MX6SL_PAD_EPDC_BDR0 = 34,
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MX6SL_PAD_EPDC_BDR1 = 35,
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MX6SL_PAD_EPDC_D0 = 36,
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MX6SL_PAD_EPDC_D1 = 37,
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MX6SL_PAD_EPDC_D10 = 38,
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MX6SL_PAD_EPDC_D11 = 39,
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MX6SL_PAD_EPDC_D12 = 40,
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MX6SL_PAD_EPDC_D13 = 41,
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MX6SL_PAD_EPDC_D14 = 42,
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MX6SL_PAD_EPDC_D15 = 43,
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MX6SL_PAD_EPDC_D2 = 44,
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MX6SL_PAD_EPDC_D3 = 45,
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MX6SL_PAD_EPDC_D4 = 46,
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MX6SL_PAD_EPDC_D5 = 47,
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MX6SL_PAD_EPDC_D6 = 48,
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MX6SL_PAD_EPDC_D7 = 49,
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MX6SL_PAD_EPDC_D8 = 50,
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MX6SL_PAD_EPDC_D9 = 51,
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MX6SL_PAD_EPDC_GDCLK = 52,
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MX6SL_PAD_EPDC_GDOE = 53,
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MX6SL_PAD_EPDC_GDRL = 54,
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MX6SL_PAD_EPDC_GDSP = 55,
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MX6SL_PAD_EPDC_PWRCOM = 56,
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MX6SL_PAD_EPDC_PWRCTRL0 = 57,
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MX6SL_PAD_EPDC_PWRCTRL1 = 58,
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MX6SL_PAD_EPDC_PWRCTRL2 = 59,
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MX6SL_PAD_EPDC_PWRCTRL3 = 60,
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MX6SL_PAD_EPDC_PWRINT = 61,
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MX6SL_PAD_EPDC_PWRSTAT = 62,
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MX6SL_PAD_EPDC_PWRWAKEUP = 63,
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MX6SL_PAD_EPDC_SDCE0 = 64,
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MX6SL_PAD_EPDC_SDCE1 = 65,
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MX6SL_PAD_EPDC_SDCE2 = 66,
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MX6SL_PAD_EPDC_SDCE3 = 67,
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MX6SL_PAD_EPDC_SDCLK = 68,
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MX6SL_PAD_EPDC_SDLE = 69,
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MX6SL_PAD_EPDC_SDOE = 70,
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MX6SL_PAD_EPDC_SDSHR = 71,
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MX6SL_PAD_EPDC_VCOM0 = 72,
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MX6SL_PAD_EPDC_VCOM1 = 73,
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MX6SL_PAD_FEC_CRS_DV = 74,
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MX6SL_PAD_FEC_MDC = 75,
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MX6SL_PAD_FEC_MDIO = 76,
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MX6SL_PAD_FEC_REF_CLK = 77,
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MX6SL_PAD_FEC_RX_ER = 78,
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MX6SL_PAD_FEC_RXD0 = 79,
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MX6SL_PAD_FEC_RXD1 = 80,
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MX6SL_PAD_FEC_TX_CLK = 81,
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MX6SL_PAD_FEC_TX_EN = 82,
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MX6SL_PAD_FEC_TXD0 = 83,
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MX6SL_PAD_FEC_TXD1 = 84,
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MX6SL_PAD_HSIC_DAT = 85,
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MX6SL_PAD_HSIC_STROBE = 86,
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MX6SL_PAD_I2C1_SCL = 87,
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MX6SL_PAD_I2C1_SDA = 88,
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MX6SL_PAD_I2C2_SCL = 89,
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MX6SL_PAD_I2C2_SDA = 90,
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MX6SL_PAD_KEY_COL0 = 91,
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MX6SL_PAD_KEY_COL1 = 92,
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MX6SL_PAD_KEY_COL2 = 93,
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MX6SL_PAD_KEY_COL3 = 94,
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MX6SL_PAD_KEY_COL4 = 95,
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MX6SL_PAD_KEY_COL5 = 96,
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MX6SL_PAD_KEY_COL6 = 97,
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MX6SL_PAD_KEY_COL7 = 98,
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MX6SL_PAD_KEY_ROW0 = 99,
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MX6SL_PAD_KEY_ROW1 = 100,
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MX6SL_PAD_KEY_ROW2 = 101,
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MX6SL_PAD_KEY_ROW3 = 102,
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MX6SL_PAD_KEY_ROW4 = 103,
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MX6SL_PAD_KEY_ROW5 = 104,
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MX6SL_PAD_KEY_ROW6 = 105,
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MX6SL_PAD_KEY_ROW7 = 106,
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MX6SL_PAD_LCD_CLK = 107,
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MX6SL_PAD_LCD_DAT0 = 108,
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MX6SL_PAD_LCD_DAT1 = 109,
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MX6SL_PAD_LCD_DAT10 = 110,
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MX6SL_PAD_LCD_DAT11 = 111,
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MX6SL_PAD_LCD_DAT12 = 112,
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MX6SL_PAD_LCD_DAT13 = 113,
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MX6SL_PAD_LCD_DAT14 = 114,
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MX6SL_PAD_LCD_DAT15 = 115,
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MX6SL_PAD_LCD_DAT16 = 116,
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MX6SL_PAD_LCD_DAT17 = 117,
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MX6SL_PAD_LCD_DAT18 = 118,
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MX6SL_PAD_LCD_DAT19 = 119,
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MX6SL_PAD_LCD_DAT2 = 120,
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MX6SL_PAD_LCD_DAT20 = 121,
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MX6SL_PAD_LCD_DAT21 = 122,
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MX6SL_PAD_LCD_DAT22 = 123,
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MX6SL_PAD_LCD_DAT23 = 124,
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MX6SL_PAD_LCD_DAT3 = 125,
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MX6SL_PAD_LCD_DAT4 = 126,
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MX6SL_PAD_LCD_DAT5 = 127,
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MX6SL_PAD_LCD_DAT6 = 128,
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MX6SL_PAD_LCD_DAT7 = 129,
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MX6SL_PAD_LCD_DAT8 = 130,
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MX6SL_PAD_LCD_DAT9 = 131,
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MX6SL_PAD_LCD_ENABLE = 132,
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MX6SL_PAD_LCD_HSYNC = 133,
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MX6SL_PAD_LCD_RESET = 134,
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MX6SL_PAD_LCD_VSYNC = 135,
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MX6SL_PAD_PWM1 = 136,
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MX6SL_PAD_REF_CLK_24M = 137,
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MX6SL_PAD_REF_CLK_32K = 138,
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MX6SL_PAD_SD1_CLK = 139,
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MX6SL_PAD_SD1_CMD = 140,
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MX6SL_PAD_SD1_DAT0 = 141,
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MX6SL_PAD_SD1_DAT1 = 142,
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MX6SL_PAD_SD1_DAT2 = 143,
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MX6SL_PAD_SD1_DAT3 = 144,
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MX6SL_PAD_SD1_DAT4 = 145,
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MX6SL_PAD_SD1_DAT5 = 146,
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MX6SL_PAD_SD1_DAT6 = 147,
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MX6SL_PAD_SD1_DAT7 = 148,
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MX6SL_PAD_SD2_CLK = 149,
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MX6SL_PAD_SD2_CMD = 150,
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MX6SL_PAD_SD2_DAT0 = 151,
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MX6SL_PAD_SD2_DAT1 = 152,
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MX6SL_PAD_SD2_DAT2 = 153,
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MX6SL_PAD_SD2_DAT3 = 154,
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MX6SL_PAD_SD2_DAT4 = 155,
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MX6SL_PAD_SD2_DAT5 = 156,
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MX6SL_PAD_SD2_DAT6 = 157,
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MX6SL_PAD_SD2_DAT7 = 158,
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MX6SL_PAD_SD2_RST = 159,
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MX6SL_PAD_SD3_CLK = 160,
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MX6SL_PAD_SD3_CMD = 161,
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MX6SL_PAD_SD3_DAT0 = 162,
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MX6SL_PAD_SD3_DAT1 = 163,
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MX6SL_PAD_SD3_DAT2 = 164,
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MX6SL_PAD_SD3_DAT3 = 165,
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MX6SL_PAD_UART1_RXD = 166,
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MX6SL_PAD_UART1_TXD = 167,
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MX6SL_PAD_WDOG_B = 168,
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};
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/* Pad names for the pinmux subsystem */
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static const struct pinctrl_pin_desc imx6sl_pinctrl_pads[] = {
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE0),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE1),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE2),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE3),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE4),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE5),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE6),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE7),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE8),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE9),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE10),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE11),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE12),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE13),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE14),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE15),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE16),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE17),
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IMX_PINCTRL_PIN(MX6SL_PAD_RESERVE18),
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IMX_PINCTRL_PIN(MX6SL_PAD_AUD_MCLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXC),
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IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXD),
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IMX_PINCTRL_PIN(MX6SL_PAD_AUD_RXFS),
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IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXC),
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IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXD),
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IMX_PINCTRL_PIN(MX6SL_PAD_AUD_TXFS),
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IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MISO),
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IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_MOSI),
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IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SCLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI1_SS0),
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IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MISO),
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IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_MOSI),
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IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SCLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_ECSPI2_SS0),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR0),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_BDR1),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D0),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D1),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D10),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D11),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D12),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D13),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D14),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D15),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D2),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D3),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D4),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D5),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D6),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D7),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D8),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_D9),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDCLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDOE),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDRL),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_GDSP),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCOM),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL0),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL1),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL2),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRCTRL3),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRINT),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRSTAT),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_PWRWAKEUP),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE0),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE1),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE2),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCE3),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDCLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDLE),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDOE),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_SDSHR),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM0),
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IMX_PINCTRL_PIN(MX6SL_PAD_EPDC_VCOM1),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_CRS_DV),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDC),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_MDIO),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_REF_CLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RX_ER),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD0),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_RXD1),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_CLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TX_EN),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD0),
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IMX_PINCTRL_PIN(MX6SL_PAD_FEC_TXD1),
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IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_DAT),
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IMX_PINCTRL_PIN(MX6SL_PAD_HSIC_STROBE),
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IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SCL),
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IMX_PINCTRL_PIN(MX6SL_PAD_I2C1_SDA),
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IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SCL),
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IMX_PINCTRL_PIN(MX6SL_PAD_I2C2_SDA),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL0),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL1),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL2),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL3),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL4),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL5),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL6),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_COL7),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW0),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW1),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW2),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW3),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW4),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW5),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW6),
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IMX_PINCTRL_PIN(MX6SL_PAD_KEY_ROW7),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_CLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT0),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT1),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT10),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT11),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT12),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT13),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT14),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT15),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT16),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT17),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT18),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT19),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT2),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT20),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT21),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT22),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT23),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT3),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT4),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT5),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT6),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT7),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT8),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_DAT9),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_ENABLE),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_HSYNC),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_RESET),
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IMX_PINCTRL_PIN(MX6SL_PAD_LCD_VSYNC),
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IMX_PINCTRL_PIN(MX6SL_PAD_PWM1),
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IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_24M),
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IMX_PINCTRL_PIN(MX6SL_PAD_REF_CLK_32K),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CLK),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_CMD),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT0),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT1),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT2),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT3),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT4),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT5),
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT6),
|
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IMX_PINCTRL_PIN(MX6SL_PAD_SD1_DAT7),
|
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IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CLK),
|
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|
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IMX_PINCTRL_PIN(MX6SL_PAD_SD2_CMD),
|
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IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT0),
|
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IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT1),
|
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|
IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT2),
|
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|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT4),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT5),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT6),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD2_DAT7),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD2_RST),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CLK),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD3_CMD),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT0),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT1),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT2),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_SD3_DAT3),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_UART1_RXD),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_UART1_TXD),
|
|
|
|
|
IMX_PINCTRL_PIN(MX6SL_PAD_WDOG_B),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct imx_pinctrl_soc_info imx6sl_pinctrl_info = {
|
|
|
|
|
.pins = imx6sl_pinctrl_pads,
|
|
|
|
|
.npins = ARRAY_SIZE(imx6sl_pinctrl_pads),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static struct of_device_id imx6sl_pinctrl_of_match[] = {
|
|
|
|
|
{ .compatible = "fsl,imx6sl-iomuxc", },
|
|
|
|
|
{ /* sentinel */ }
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int imx6sl_pinctrl_probe(struct platform_device *pdev)
|
|
|
|
|
{
|
|
|
|
|
return imx_pinctrl_probe(pdev, &imx6sl_pinctrl_info);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct platform_driver imx6sl_pinctrl_driver = {
|
|
|
|
|
.driver = {
|
|
|
|
|
.name = "imx6sl-pinctrl",
|
|
|
|
|
.owner = THIS_MODULE,
|
2013-09-28 16:08:48 +04:00
|
|
|
.of_match_table = imx6sl_pinctrl_of_match,
|
2013-03-21 18:10:36 +04:00
|
|
|
},
|
|
|
|
|
.probe = imx6sl_pinctrl_probe,
|
|
|
|
|
.remove = imx_pinctrl_remove,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static int __init imx6sl_pinctrl_init(void)
|
|
|
|
|
{
|
|
|
|
|
return platform_driver_register(&imx6sl_pinctrl_driver);
|
|
|
|
|
}
|
|
|
|
|
arch_initcall(imx6sl_pinctrl_init);
|
|
|
|
|
|
|
|
|
|
static void __exit imx6sl_pinctrl_exit(void)
|
|
|
|
|
{
|
|
|
|
|
platform_driver_unregister(&imx6sl_pinctrl_driver);
|
|
|
|
|
}
|
|
|
|
|
module_exit(imx6sl_pinctrl_exit);
|
|
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Shawn Guo <shawn.guo@linaro.org>");
|
|
|
|
|
MODULE_DESCRIPTION("Freescale imx6sl pinctrl driver");
|
|
|
|
|
MODULE_LICENSE("GPL v2");
|
