2011-11-01 14:37:05 +04:00
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/dts-v1/;
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2013-12-02 17:09:57 +04:00
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#include <dt-bindings/input/input.h>
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2012-10-18 02:38:21 +04:00
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#include "tegra20.dtsi"
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2011-11-01 14:37:05 +04:00
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/ {
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model = "Toshiba AC100 / Dynabook AZ";
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compatible = "compal,paz00", "nvidia,tegra20";
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2013-12-10 01:43:59 +04:00
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aliases {
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rtc0 = "/i2c@7000d000/tps6586x@34";
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rtc1 = "/rtc@7000e000";
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};
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2012-05-12 02:17:47 +04:00
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memory {
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2011-11-01 14:37:05 +04:00
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reg = <0x00000000 0x20000000>;
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};
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2013-11-26 04:53:16 +04:00
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host1x@50000000 {
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2013-12-22 00:38:13 +04:00
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dc@54200000 {
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rgb {
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status = "okay";
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nvidia,panel = <&panel>;
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};
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};
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2013-11-26 04:53:16 +04:00
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hdmi@54280000 {
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2013-01-03 01:53:22 +04:00
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status = "okay";
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vdd-supply = <&hdmi_vdd_reg>;
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pll-supply = <&hdmi_pll_reg>;
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nvidia,ddc-i2c-bus = <&hdmi_ddc>;
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2013-02-13 04:25:15 +04:00
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nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
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GPIO_ACTIVE_HIGH>;
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2013-01-03 01:53:22 +04:00
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};
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};
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2013-11-26 04:53:16 +04:00
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pinmux@70000014 {
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2012-03-16 02:27:36 +04:00
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pinctrl-names = "default";
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pinctrl-0 = <&state_default>;
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state_default: pinmux {
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ata {
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nvidia,pins = "ata", "atc", "atd", "ate",
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"dap2", "gmb", "gmc", "gmd", "spia",
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"spib", "spic", "spid", "spie";
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nvidia,function = "gmi";
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};
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atb {
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nvidia,pins = "atb", "gma", "gme";
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nvidia,function = "sdio4";
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};
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cdev1 {
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nvidia,pins = "cdev1";
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nvidia,function = "plla_out";
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};
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cdev2 {
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nvidia,pins = "cdev2";
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nvidia,function = "pllp_out4";
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};
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crtp {
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nvidia,pins = "crtp";
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nvidia,function = "crt";
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};
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csus {
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nvidia,pins = "csus";
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nvidia,function = "pllc_out1";
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};
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dap1 {
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nvidia,pins = "dap1";
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nvidia,function = "dap1";
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};
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dap3 {
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nvidia,pins = "dap3";
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nvidia,function = "dap3";
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};
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dap4 {
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nvidia,pins = "dap4";
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nvidia,function = "dap4";
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};
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ddc {
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nvidia,pins = "ddc";
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nvidia,function = "i2c2";
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};
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dta {
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nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
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nvidia,function = "rsvd1";
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};
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dtf {
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nvidia,pins = "dtf";
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nvidia,function = "i2c3";
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};
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gpu {
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nvidia,pins = "gpu", "sdb", "sdd";
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nvidia,function = "pwm";
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};
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gpu7 {
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nvidia,pins = "gpu7";
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nvidia,function = "rtck";
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};
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gpv {
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nvidia,pins = "gpv", "slxa", "slxk";
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nvidia,function = "pcie";
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};
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hdint {
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nvidia,pins = "hdint", "pta";
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nvidia,function = "hdmi";
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};
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i2cp {
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nvidia,pins = "i2cp";
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nvidia,function = "i2cp";
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};
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irrx {
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nvidia,pins = "irrx", "irtx";
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nvidia,function = "uarta";
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};
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kbca {
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nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
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nvidia,function = "kbc";
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};
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kbcb {
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nvidia,pins = "kbcb", "kbcd";
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nvidia,function = "sdio2";
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};
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lcsn {
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nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
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"ld3", "ld4", "ld5", "ld6", "ld7",
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"ld8", "ld9", "ld10", "ld11", "ld12",
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"ld13", "ld14", "ld15", "ld16", "ld17",
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"ldc", "ldi", "lhp0", "lhp1", "lhp2",
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"lhs", "lm0", "lm1", "lpp", "lpw0",
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"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
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"lsda", "lsdi", "lspi", "lvp0", "lvp1",
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"lvs";
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nvidia,function = "displaya";
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};
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owc {
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nvidia,pins = "owc";
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nvidia,function = "owr";
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};
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pmc {
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nvidia,pins = "pmc";
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nvidia,function = "pwr_on";
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};
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rm {
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nvidia,pins = "rm";
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nvidia,function = "i2c1";
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};
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sdc {
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nvidia,pins = "sdc";
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nvidia,function = "twc";
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};
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sdio1 {
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nvidia,pins = "sdio1";
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nvidia,function = "sdio1";
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};
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slxc {
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nvidia,pins = "slxc", "slxd";
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nvidia,function = "spi4";
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};
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spdi {
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nvidia,pins = "spdi", "spdo";
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nvidia,function = "rsvd2";
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};
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spif {
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nvidia,pins = "spif", "uac";
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nvidia,function = "rsvd4";
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};
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spig {
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nvidia,pins = "spig", "spih";
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nvidia,function = "spi2_alt";
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};
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uaa {
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nvidia,pins = "uaa", "uab", "uda";
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nvidia,function = "ulpi";
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};
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uad {
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nvidia,pins = "uad";
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nvidia,function = "spdif";
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};
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uca {
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nvidia,pins = "uca", "ucb";
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nvidia,function = "uartc";
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};
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conf_ata {
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nvidia,pins = "ata", "atb", "atc", "atd", "ate",
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2012-04-14 02:35:20 +04:00
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"cdev1", "cdev2", "dap1", "dap2", "dtf",
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"gma", "gmb", "gmc", "gmd", "gme",
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"gpu", "gpu7", "gpv", "i2cp", "pta",
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"rm", "sdio1", "slxk", "spdo", "uac",
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"uda";
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2013-12-05 14:44:08 +04:00
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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2012-03-16 02:27:36 +04:00
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};
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conf_ck32 {
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nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
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"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
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2013-12-05 14:44:08 +04:00
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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2012-03-16 02:27:36 +04:00
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};
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conf_crtp {
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nvidia,pins = "crtp", "dap3", "dap4", "dtb",
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"dtc", "dte", "slxa", "slxc", "slxd",
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"spdi";
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2013-12-05 14:44:08 +04:00
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nvidia,pull = <TEGRA_PIN_PULL_NONE>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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2012-03-16 02:27:36 +04:00
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};
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conf_csus {
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nvidia,pins = "csus", "spia", "spib", "spid",
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"spif";
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2013-12-05 14:44:08 +04:00
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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2012-03-16 02:27:36 +04:00
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};
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conf_ddc {
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nvidia,pins = "ddc", "irrx", "irtx", "kbca",
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"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
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"spic", "spig", "uaa", "uab";
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2013-12-05 14:44:08 +04:00
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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2012-03-16 02:27:36 +04:00
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};
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conf_dta {
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nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
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"spie", "spih", "uad", "uca", "ucb";
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2013-12-05 14:44:08 +04:00
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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2012-03-16 02:27:36 +04:00
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};
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conf_hdint {
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nvidia,pins = "hdint", "ld0", "ld1", "ld2",
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"ld3", "ld4", "ld5", "ld6", "ld7",
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"ld8", "ld9", "ld10", "ld11", "ld12",
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"ld13", "ld14", "ld15", "ld16", "ld17",
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"ldc", "ldi", "lhs", "lsc0", "lspi",
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"lvs", "pmc";
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2013-12-05 14:44:08 +04:00
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nvidia,tristate = <TEGRA_PIN_DISABLE>;
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2012-03-16 02:27:36 +04:00
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};
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conf_lc {
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nvidia,pins = "lc", "ls";
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2013-12-05 14:44:08 +04:00
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nvidia,pull = <TEGRA_PIN_PULL_UP>;
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2012-03-16 02:27:36 +04:00
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};
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conf_lcsn {
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nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
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"lm0", "lm1", "lpp", "lpw0", "lpw1",
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"lpw2", "lsc1", "lsck", "lsda", "lsdi",
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"lvp0", "lvp1", "sdb";
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2013-12-05 14:44:08 +04:00
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nvidia,tristate = <TEGRA_PIN_ENABLE>;
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2012-03-16 02:27:36 +04:00
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};
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conf_ld17_0 {
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nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
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"ld23_22";
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2013-12-05 14:44:08 +04:00
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nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
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2012-03-16 02:27:36 +04:00
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};
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};
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};
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2012-05-12 03:32:56 +04:00
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i2s@70002800 {
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status = "okay";
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2012-05-12 03:03:26 +04:00
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};
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serial@70006000 {
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2012-05-12 03:32:56 +04:00
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status = "okay";
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2012-05-12 03:03:26 +04:00
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};
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serial@70006200 {
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2012-05-12 03:32:56 +04:00
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status = "okay";
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2012-05-12 03:03:26 +04:00
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};
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2013-12-22 00:38:13 +04:00
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pwm: pwm@7000a000 {
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status = "okay";
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};
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lvds_ddc: i2c@7000c000 {
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2012-05-12 03:32:56 +04:00
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status = "okay";
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2011-11-01 14:37:05 +04:00
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clock-frequency = <400000>;
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2012-02-03 00:13:35 +04:00
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alc5632: alc5632@1e {
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compatible = "realtek,alc5632";
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reg = <0x1e>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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2011-11-01 14:37:05 +04:00
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};
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2013-01-03 01:53:22 +04:00
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hdmi_ddc: i2c@7000c400 {
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2012-05-12 03:32:56 +04:00
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status = "okay";
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2013-01-03 01:53:22 +04:00
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clock-frequency = <100000>;
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2011-11-01 14:37:05 +04:00
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};
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2013-11-26 04:53:16 +04:00
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nvec@7000c500 {
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2011-11-01 14:37:05 +04:00
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compatible = "nvidia,nvec";
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2012-05-12 02:28:59 +04:00
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reg = <0x7000c500 0x100>;
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2013-02-13 23:51:51 +04:00
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interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
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2012-05-12 03:12:52 +04:00
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#address-cells = <1>;
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#size-cells = <0>;
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2011-11-01 14:37:05 +04:00
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clock-frequency = <80000>;
|
2013-02-13 04:25:15 +04:00
|
|
|
request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
|
2011-11-01 14:37:05 +04:00
|
|
|
slave-addr = <138>;
|
2013-05-22 20:45:32 +04:00
|
|
|
clocks = <&tegra_car TEGRA20_CLK_I2C3>,
|
2014-07-25 22:40:02 +04:00
|
|
|
<&tegra_car TEGRA20_CLK_PLL_P_OUT3>;
|
2013-01-11 12:01:23 +04:00
|
|
|
clock-names = "div-clk", "fast-clk";
|
2013-11-07 01:01:16 +04:00
|
|
|
resets = <&tegra_car 67>;
|
|
|
|
|
reset-names = "i2c";
|
2011-11-01 14:37:05 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
i2c@7000d000 {
|
2012-05-12 03:32:56 +04:00
|
|
|
status = "okay";
|
2011-11-01 14:37:05 +04:00
|
|
|
clock-frequency = <400000>;
|
2012-01-31 22:53:21 +04:00
|
|
|
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
pmic: tps6586x@34 {
|
|
|
|
|
compatible = "ti,tps6586x";
|
|
|
|
|
reg = <0x34>;
|
2013-02-13 23:51:51 +04:00
|
|
|
interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
|
|
|
|
|
#gpio-cells = <2>;
|
|
|
|
|
gpio-controller;
|
|
|
|
|
|
|
|
|
|
sys-supply = <&p5valw_reg>;
|
|
|
|
|
vin-sm0-supply = <&sys_reg>;
|
|
|
|
|
vin-sm1-supply = <&sys_reg>;
|
|
|
|
|
vin-sm2-supply = <&sys_reg>;
|
|
|
|
|
vinldo01-supply = <&sm2_reg>;
|
|
|
|
|
vinldo23-supply = <&sm2_reg>;
|
|
|
|
|
vinldo4-supply = <&sm2_reg>;
|
|
|
|
|
vinldo678-supply = <&sm2_reg>;
|
|
|
|
|
vinldo9-supply = <&sm2_reg>;
|
|
|
|
|
|
|
|
|
|
regulators {
|
2012-09-21 03:04:06 +04:00
|
|
|
sys_reg: sys {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "vdd_sys";
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
sm0 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+1.2vs_sm0,vdd_core";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
sm1 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+1.0vs_sm1,vdd_cpu";
|
|
|
|
|
regulator-min-microvolt = <1000000>;
|
|
|
|
|
regulator-max-microvolt = <1000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
sm2_reg: sm2 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+3.7vs_sm2,vin_ldo*";
|
|
|
|
|
regulator-min-microvolt = <3700000>;
|
|
|
|
|
regulator-max-microvolt = <3700000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* LDO0 is not connected to anything */
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
ldo1 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+1.1vs_ldo1,avdd_pll*";
|
|
|
|
|
regulator-min-microvolt = <1100000>;
|
|
|
|
|
regulator-max-microvolt = <1100000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
ldo2 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+1.2vs_ldo2,vdd_rtc";
|
|
|
|
|
regulator-min-microvolt = <1200000>;
|
|
|
|
|
regulator-max-microvolt = <1200000>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
ldo3 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+3.3vs_ldo3,avdd_usb*";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
ldo4 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
ldo5 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+2.85vs_ldo5,vcore_mmc";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
ldo6 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
/*
|
|
|
|
|
* Research indicates this should be
|
|
|
|
|
* 1.8v; other boards that use this
|
|
|
|
|
* rail for the same purpose need it
|
|
|
|
|
* set to 1.8v. The schematic signal
|
|
|
|
|
* name is incorrect; perhaps copied
|
|
|
|
|
* from an incorrect NVIDIA reference.
|
|
|
|
|
*/
|
|
|
|
|
regulator-name = "+2.85vs_ldo6,avdd_vdac";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
2013-01-03 01:53:22 +04:00
|
|
|
hdmi_vdd_reg: ldo7 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+3.3vs_ldo7,avdd_hdmi";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
};
|
|
|
|
|
|
2013-01-03 01:53:22 +04:00
|
|
|
hdmi_pll_reg: ldo8 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
|
|
|
|
|
regulator-min-microvolt = <1800000>;
|
|
|
|
|
regulator-max-microvolt = <1800000>;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
ldo9 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
|
|
|
|
|
regulator-min-microvolt = <2850000>;
|
|
|
|
|
regulator-max-microvolt = <2850000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
|
2012-09-21 03:04:06 +04:00
|
|
|
ldo_rtc {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulator-name = "+3.3vs_rtc";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2012-01-31 22:53:21 +04:00
|
|
|
adt7461@4c {
|
|
|
|
|
compatible = "adi,adt7461";
|
|
|
|
|
reg = <0x4c>;
|
|
|
|
|
};
|
2011-11-01 14:37:05 +04:00
|
|
|
};
|
|
|
|
|
|
2013-11-26 04:53:16 +04:00
|
|
|
pmc@7000e400 {
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
nvidia,invert-interrupt;
|
2013-08-12 13:40:07 +04:00
|
|
|
nvidia,suspend-mode = <1>;
|
2013-04-03 15:31:52 +04:00
|
|
|
nvidia,cpu-pwr-good-time = <2000>;
|
|
|
|
|
nvidia,cpu-pwr-off-time = <0>;
|
|
|
|
|
nvidia,core-pwr-good-time = <3845 3845>;
|
|
|
|
|
nvidia,core-pwr-off-time = <0>;
|
|
|
|
|
nvidia,sys-clock-req-active-high;
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
};
|
|
|
|
|
|
2012-05-12 03:32:56 +04:00
|
|
|
usb@c5000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2013-05-16 18:12:57 +04:00
|
|
|
usb-phy@c5000000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2012-05-12 03:03:26 +04:00
|
|
|
usb@c5004000 {
|
2012-05-12 03:32:56 +04:00
|
|
|
status = "okay";
|
2013-02-13 04:25:15 +04:00
|
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
|
|
|
|
|
GPIO_ACTIVE_LOW>;
|
2011-11-01 14:37:05 +04:00
|
|
|
};
|
|
|
|
|
|
2013-05-16 18:12:56 +04:00
|
|
|
usb-phy@c5004000 {
|
2013-05-16 18:12:57 +04:00
|
|
|
status = "okay";
|
2013-02-13 04:25:15 +04:00
|
|
|
nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
|
|
|
|
|
GPIO_ACTIVE_LOW>;
|
2012-05-12 03:32:56 +04:00
|
|
|
};
|
|
|
|
|
|
2013-05-16 18:12:56 +04:00
|
|
|
usb@c5008000 {
|
|
|
|
|
status = "okay";
|
2013-01-24 14:16:46 +04:00
|
|
|
};
|
|
|
|
|
|
2013-05-16 18:12:57 +04:00
|
|
|
usb-phy@c5008000 {
|
|
|
|
|
status = "okay";
|
|
|
|
|
};
|
|
|
|
|
|
2011-11-01 14:37:05 +04:00
|
|
|
sdhci@c8000000 {
|
2012-05-12 03:32:56 +04:00
|
|
|
status = "okay";
|
2013-02-13 04:25:15 +04:00
|
|
|
cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
|
|
|
|
|
wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
|
2012-05-13 08:14:24 +04:00
|
|
|
bus-width = <4>;
|
2011-11-01 14:37:05 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
|
|
sdhci@c8000600 {
|
2012-05-12 03:32:56 +04:00
|
|
|
status = "okay";
|
2012-05-13 08:14:24 +04:00
|
|
|
bus-width = <8>;
|
2013-04-04 00:34:39 +04:00
|
|
|
non-removable;
|
2011-11-01 14:37:05 +04:00
|
|
|
};
|
2012-01-28 23:03:07 +04:00
|
|
|
|
2013-12-22 00:38:13 +04:00
|
|
|
backlight: backlight {
|
|
|
|
|
compatible = "pwm-backlight";
|
|
|
|
|
|
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
pwms = <&pwm 0 5000000>;
|
|
|
|
|
|
|
|
|
|
brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
|
|
|
|
|
default-brightness-level = <10>;
|
|
|
|
|
|
|
|
|
|
backlight-boot-off;
|
|
|
|
|
};
|
|
|
|
|
|
2013-04-03 15:31:27 +04:00
|
|
|
clocks {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
2013-11-26 04:53:16 +04:00
|
|
|
clk32k_in: clock@0 {
|
2013-04-03 15:31:27 +04:00
|
|
|
compatible = "fixed-clock";
|
|
|
|
|
reg=<0>;
|
|
|
|
|
#clock-cells = <0>;
|
|
|
|
|
clock-frequency = <32768>;
|
|
|
|
|
};
|
|
|
|
|
};
|
|
|
|
|
|
2012-01-28 23:03:07 +04:00
|
|
|
gpio-keys {
|
|
|
|
|
compatible = "gpio-keys";
|
|
|
|
|
|
|
|
|
|
power {
|
|
|
|
|
label = "Power";
|
2013-02-13 04:25:15 +04:00
|
|
|
gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
|
2013-12-02 17:09:57 +04:00
|
|
|
linux,code = <KEY_POWER>;
|
2012-01-28 23:03:07 +04:00
|
|
|
gpio-key,wakeup;
|
|
|
|
|
};
|
|
|
|
|
};
|
2012-01-28 23:03:08 +04:00
|
|
|
|
|
|
|
|
gpio-leds {
|
|
|
|
|
compatible = "gpio-leds";
|
|
|
|
|
|
|
|
|
|
wifi {
|
|
|
|
|
label = "wifi-led";
|
2013-02-13 04:25:15 +04:00
|
|
|
gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
|
2012-01-28 23:03:08 +04:00
|
|
|
linux,default-trigger = "rfkill0";
|
|
|
|
|
};
|
|
|
|
|
};
|
2012-04-13 01:46:49 +04:00
|
|
|
|
2013-12-22 00:38:13 +04:00
|
|
|
panel: panel {
|
|
|
|
|
compatible = "samsung,ltn101nt05", "simple-panel";
|
|
|
|
|
|
|
|
|
|
ddc-i2c-bus = <&lvds_ddc>;
|
|
|
|
|
power-supply = <&vdd_pnl_reg>;
|
|
|
|
|
enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
|
|
|
|
|
backlight = <&backlight>;
|
|
|
|
|
};
|
|
|
|
|
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
regulators {
|
|
|
|
|
compatible = "simple-bus";
|
|
|
|
|
#address-cells = <1>;
|
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
|
|
|
|
|
p5valw_reg: regulator@0 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <0>;
|
|
|
|
|
regulator-name = "+5valw";
|
|
|
|
|
regulator-min-microvolt = <5000000>;
|
|
|
|
|
regulator-max-microvolt = <5000000>;
|
|
|
|
|
regulator-always-on;
|
|
|
|
|
};
|
2013-12-22 00:38:13 +04:00
|
|
|
|
|
|
|
|
vdd_pnl_reg: regulator@1 {
|
|
|
|
|
compatible = "regulator-fixed";
|
|
|
|
|
reg = <1>;
|
|
|
|
|
regulator-name = "+3VS,vdd_pnl";
|
|
|
|
|
regulator-min-microvolt = <3300000>;
|
|
|
|
|
regulator-max-microvolt = <3300000>;
|
|
|
|
|
gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
|
|
|
|
|
enable-active-high;
|
|
|
|
|
};
|
ARM: dt: tegra: paz00: add regulators
The Toshiba AC100/PAZ00 uses a TPS6586x regulator. Instantiate this.
Three data sources were used for the data encoded here:
* The HW defaults, as extracted from real HW.
* The schematic, which specifies a voltage for each rail in the signal
names.
* The AC100 kernel used by the Ubuntu port:
repo git://gitorious.org/~marvin24/ac100/marvin24s-kernel.git
branch chromeos-ac100-3.0
file arch/arm/mach-tegra/board-paz00-power.c
For many rails, the constraints in that tree specified differing min
and max voltages. In all cases, the min value was ignored, since
there's no need currently to vary any of the voltages at run-time.
DVFS might change this in the future.
In most cases these sources all matched. Differences are:
sm0: HW defaults and schematic match at 1.2v. marvin24's kernel had a max
of 1.3v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
sm1: HW defaults and schematic match at 1.0v. marvin24's kernel had a max
of 1.125v, but this higher voltage was only applied to HW by DVFS code,
which isn't currently supported in mainline.
ldo3: The HW default is on. marvin24's kernel didn't specify always-on,
but since the board wasn't marked as having fully constrained regulators,
the rail was not turned off, so the difference had no effect. The rail
is needed for USB.
ldo6: The HW default is 2.85v. The schematics indicate 2.85v. However,
since this regulator is used for the same purpose as on other boards that
require 1.8v, this is set to 1.8v. Note that this regulator feeds the CRT
VDAC on Tegra, and so in practice is unlikely to be used, even though it
is actaully hooked up in HW.
Portions based on work by Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Marc Dietrich <marvin24@gmx.de> # v2
Acked-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-06-22 00:24:57 +04:00
|
|
|
};
|
|
|
|
|
|
2012-05-12 03:03:26 +04:00
|
|
|
sound {
|
|
|
|
|
compatible = "nvidia,tegra-audio-alc5632-paz00",
|
|
|
|
|
"nvidia,tegra-audio-alc5632";
|
|
|
|
|
|
|
|
|
|
nvidia,model = "Compal PAZ00";
|
|
|
|
|
|
|
|
|
|
nvidia,audio-routing =
|
|
|
|
|
"Int Spk", "SPKOUT",
|
|
|
|
|
"Int Spk", "SPKOUTN",
|
|
|
|
|
"Headset Mic", "MICBIAS1",
|
|
|
|
|
"MIC1", "Headset Mic",
|
|
|
|
|
"Headset Stereophone", "HPR",
|
|
|
|
|
"Headset Stereophone", "HPL",
|
|
|
|
|
"DMICDAT", "Digital Mic";
|
|
|
|
|
|
|
|
|
|
nvidia,audio-codec = <&alc5632>;
|
|
|
|
|
nvidia,i2s-controller = <&tegra_i2s1>;
|
2013-02-13 04:25:15 +04:00
|
|
|
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
|
|
|
|
|
GPIO_ACTIVE_HIGH>;
|
2013-03-27 02:45:52 +04:00
|
|
|
|
2013-05-22 20:45:32 +04:00
|
|
|
clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
|
2014-07-25 22:40:02 +04:00
|
|
|
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
|
|
|
|
|
<&tegra_car TEGRA20_CLK_CDEV1>;
|
2013-03-27 02:45:52 +04:00
|
|
|
clock-names = "pll_a", "pll_a_out0", "mclk";
|
2012-04-13 01:46:49 +04:00
|
|
|
};
|
2011-11-01 14:37:05 +04:00
|
|
|
};
|
