114 строки
3.1 KiB
C
114 строки
3.1 KiB
C
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/*
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* TI DaVinci Power and Sleep Controller (PSC)
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*
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* Copyright (C) 2006 Texas Instruments.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <asm/io.h>
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#include <asm/hardware.h>
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#include <asm/arch/psc.h>
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#define PTCMD __REG(0x01C41120)
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#define PDSTAT __REG(0x01C41200)
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#define PDCTL1 __REG(0x01C41304)
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#define EPCPR __REG(0x01C41070)
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#define PTSTAT __REG(0x01C41128)
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#define MDSTAT IO_ADDRESS(0x01C41800)
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#define MDCTL IO_ADDRESS(0x01C41A00)
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#define PINMUX0 __REG(0x01c40000)
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#define PINMUX1 __REG(0x01c40004)
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#define VDD3P3V_PWDN __REG(0x01C40048)
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static void davinci_psc_mux(unsigned int id)
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{
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switch (id) {
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case DAVINCI_LPSC_ATA:
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PINMUX0 |= (1 << 17) | (1 << 16);
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break;
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case DAVINCI_LPSC_MMC_SD:
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/* VDD power manupulations are done in U-Boot for CPMAC
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* so applies to MMC as well
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*/
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/*Set up the pull regiter for MMC */
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VDD3P3V_PWDN = 0x0;
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PINMUX1 &= (~(1 << 9));
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break;
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case DAVINCI_LPSC_I2C:
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PINMUX1 |= (1 << 7);
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break;
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case DAVINCI_LPSC_McBSP:
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PINMUX1 |= (1 << 10);
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break;
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default:
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break;
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}
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}
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/* Enable or disable a PSC domain */
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void davinci_psc_config(unsigned int domain, unsigned int id, char enable)
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{
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volatile unsigned int *mdstat = (unsigned int *)((int)MDSTAT + 4 * id);
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volatile unsigned int *mdctl = (unsigned int *)((int)MDCTL + 4 * id);
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if (id < 0)
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return;
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if (enable)
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*mdctl |= 0x00000003; /* Enable Module */
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else
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*mdctl &= 0xFFFFFFF2; /* Disable Module */
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if ((PDSTAT & 0x00000001) == 0) {
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PDCTL1 |= 0x1;
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PTCMD = (1 << domain);
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while ((((EPCPR >> domain) & 1) == 0));
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PDCTL1 |= 0x100;
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while (!(((PTSTAT >> domain) & 1) == 0));
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} else {
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PTCMD = (1 << domain);
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while (!(((PTSTAT >> domain) & 1) == 0));
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}
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if (enable)
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while (!((*mdstat & 0x0000001F) == 0x3));
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else
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while (!((*mdstat & 0x0000001F) == 0x2));
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if (enable)
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davinci_psc_mux(id);
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}
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void __init davinci_psc_init(void)
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{
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSMSTR, 1);
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_VPSSSLV, 1);
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPCC, 1);
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC0, 1);
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TPTC1, 1);
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_GPIO, 1);
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/* Turn on WatchDog timer LPSC. Needed for RESET to work */
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davinci_psc_config(DAVINCI_GPSC_ARMDOMAIN, DAVINCI_LPSC_TIMER2, 1);
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}
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