2012-05-16 10:45:54 +04:00
|
|
|
/*
|
|
|
|
* Device Tree Source for the EMEV2 SoC
|
|
|
|
*
|
|
|
|
* Copyright (C) 2012 Renesas Solutions Corp.
|
|
|
|
*
|
|
|
|
* This file is licensed under the terms of the GNU General Public License
|
|
|
|
* version 2. This program is licensed "as is" without any warranty of any
|
|
|
|
* kind, whether express or implied.
|
|
|
|
*/
|
|
|
|
|
|
|
|
/include/ "skeleton.dtsi"
|
|
|
|
|
|
|
|
/ {
|
|
|
|
compatible = "renesas,emev2";
|
|
|
|
interrupt-parent = <&gic>;
|
|
|
|
|
|
|
|
cpus {
|
2013-01-28 04:41:40 +04:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
|
|
|
|
2012-05-16 10:45:54 +04:00
|
|
|
cpu@0 {
|
2013-01-28 04:41:40 +04:00
|
|
|
device_type = "cpu";
|
2012-05-16 10:45:54 +04:00
|
|
|
compatible = "arm,cortex-a9";
|
2013-01-28 04:41:40 +04:00
|
|
|
reg = <0>;
|
2012-05-16 10:45:54 +04:00
|
|
|
};
|
|
|
|
cpu@1 {
|
2013-01-28 04:41:40 +04:00
|
|
|
device_type = "cpu";
|
2012-05-16 10:45:54 +04:00
|
|
|
compatible = "arm,cortex-a9";
|
2013-01-28 04:41:40 +04:00
|
|
|
reg = <1>;
|
2012-05-16 10:45:54 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
gic: interrupt-controller@e0020000 {
|
|
|
|
compatible = "arm,cortex-a9-gic";
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <3>;
|
|
|
|
reg = <0xe0028000 0x1000>,
|
|
|
|
<0xe0020000 0x0100>;
|
|
|
|
};
|
|
|
|
|
|
|
|
sti@e0180000 {
|
|
|
|
compatible = "renesas,em-sti";
|
|
|
|
reg = <0xe0180000 0x54>;
|
|
|
|
interrupts = <0 125 0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
uart@e1020000 {
|
|
|
|
compatible = "renesas,em-uart";
|
|
|
|
reg = <0xe1020000 0x38>;
|
|
|
|
interrupts = <0 8 0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
uart@e1030000 {
|
|
|
|
compatible = "renesas,em-uart";
|
|
|
|
reg = <0xe1030000 0x38>;
|
|
|
|
interrupts = <0 9 0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
uart@e1040000 {
|
|
|
|
compatible = "renesas,em-uart";
|
|
|
|
reg = <0xe1040000 0x38>;
|
|
|
|
interrupts = <0 10 0>;
|
|
|
|
};
|
|
|
|
|
|
|
|
uart@e1050000 {
|
|
|
|
compatible = "renesas,em-uart";
|
|
|
|
reg = <0xe1050000 0x38>;
|
|
|
|
interrupts = <0 11 0>;
|
|
|
|
};
|
|
|
|
};
|