2005-04-17 02:20:36 +04:00
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/* mca_53c9x.c: Driver for the SCSI adapter found on NCR 35xx
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* (and maybe some other) Microchannel machines
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*
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* Code taken mostly from Cyberstorm SCSI drivers
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* Copyright (C) 1996 Jesper Skov (jskov@cygnus.co.uk)
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*
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* Hacked to work with the NCR MCA stuff by Tymm Twillman (tymm@computer.org)
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*
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* The CyberStorm SCSI driver (and this driver) is based on David S. Miller's
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* ESP driver * for the Sparc computers.
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*
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* Special thanks to Ken Stewart at Symbios (LSI) for helping with info on
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* the 86C01. I was on the brink of going ga-ga...
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*
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* Also thanks to Jesper Skov for helping me with info on how the Amiga
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* does things...
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*/
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/*
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* This is currently only set up to use one 53c9x card at a time; it could be
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* changed fairly easily to detect/use more than one, but I'm not too sure how
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* many cards that use the 53c9x on MCA systems there are (if, in fact, there
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* are cards that use them, other than the one built into some NCR systems)...
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* If anyone requests this, I'll throw it in, otherwise it's not worth the
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* effort.
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*/
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/*
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* Info on the 86C01 MCA interface chip at the bottom, if you care enough to
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* look.
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/mca.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/blkdev.h>
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#include <linux/proc_fs.h>
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#include <linux/stat.h>
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#include <linux/mca-legacy.h>
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#include "scsi.h"
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#include <scsi/scsi_host.h>
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#include "NCR53C9x.h"
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#include <asm/dma.h>
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#include <asm/irq.h>
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#include <asm/mca_dma.h>
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#include <asm/pgtable.h>
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/*
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* From ibmmca.c (IBM scsi controller card driver) -- used for turning PS2 disk
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* activity LED on and off
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*/
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#define PS2_SYS_CTR 0x92
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/* Ports the ncr's 53c94 can be put at; indexed by pos register value */
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#define MCA_53C9X_IO_PORTS { \
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0x0000, 0x0240, 0x0340, 0x0400, \
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0x0420, 0x3240, 0x8240, 0xA240, \
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}
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/*
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* Supposedly there were some cards put together with the 'c9x and 86c01. If
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* they have different ID's from the ones on the 3500 series machines,
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* you can add them here and hopefully things will work out.
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*/
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#define MCA_53C9X_IDS { \
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0x7F4C, \
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0x0000, \
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}
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static int dma_bytes_sent(struct NCR_ESP *, int);
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static int dma_can_transfer(struct NCR_ESP *, Scsi_Cmnd *);
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static void dma_dump_state(struct NCR_ESP *);
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static void dma_init_read(struct NCR_ESP *, __u32, int);
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static void dma_init_write(struct NCR_ESP *, __u32, int);
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static void dma_ints_off(struct NCR_ESP *);
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static void dma_ints_on(struct NCR_ESP *);
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static int dma_irq_p(struct NCR_ESP *);
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static int dma_ports_p(struct NCR_ESP *);
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static void dma_setup(struct NCR_ESP *, __u32, int, int);
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static void dma_led_on(struct NCR_ESP *);
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static void dma_led_off(struct NCR_ESP *);
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/* This is where all commands are put before they are trasfered to the
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* 53c9x via PIO.
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*/
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static volatile unsigned char cmd_buffer[16];
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/*
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* We keep the structure that is used to access the registers on the 53c9x
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* here.
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*/
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static struct ESP_regs eregs;
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/***************************************************************** Detection */
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2005-10-31 20:31:40 +03:00
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static int mca_esp_detect(struct scsi_host_template *tpnt)
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2005-04-17 02:20:36 +04:00
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{
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struct NCR_ESP *esp;
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static int io_port_by_pos[] = MCA_53C9X_IO_PORTS;
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int mca_53c9x_ids[] = MCA_53C9X_IDS;
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int *id_to_check = mca_53c9x_ids;
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int slot;
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int pos[3];
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unsigned int tmp_io_addr;
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unsigned char tmp_byte;
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if (!MCA_bus)
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return 0;
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while (*id_to_check) {
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if ((slot = mca_find_adapter(*id_to_check, 0)) !=
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MCA_NOTFOUND)
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{
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2007-02-06 03:28:29 +03:00
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esp = esp_allocate(tpnt, NULL, 0);
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2005-04-17 02:20:36 +04:00
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pos[0] = mca_read_stored_pos(slot, 2);
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pos[1] = mca_read_stored_pos(slot, 3);
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pos[2] = mca_read_stored_pos(slot, 4);
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esp->eregs = &eregs;
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/*
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* IO port base is given in the first (non-ID) pos
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* register, like so:
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*
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* Bits 3 2 1 IO base
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* ----------------------------
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* 0 0 0 <disabled>
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* 0 0 1 0x0240
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* 0 1 0 0x0340
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* 0 1 1 0x0400
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* 1 0 0 0x0420
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* 1 0 1 0x3240
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* 1 1 0 0x8240
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* 1 1 1 0xA240
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*/
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tmp_io_addr =
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io_port_by_pos[(pos[0] & 0x0E) >> 1];
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esp->eregs->io_addr = tmp_io_addr + 0x10;
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if (esp->eregs->io_addr == 0x0000) {
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printk("Adapter is disabled.\n");
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break;
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}
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/*
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* IRQ is specified in bits 4 and 5:
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*
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* Bits 4 5 IRQ
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* -----------------------
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* 0 0 3
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* 0 1 5
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* 1 0 7
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* 1 1 9
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*/
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esp->irq = ((pos[0] & 0x30) >> 3) + 3;
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/*
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* DMA channel is in the low 3 bits of the second
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* POS register
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*/
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esp->dma = pos[1] & 7;
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esp->slot = slot;
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if (request_irq(esp->irq, esp_intr, 0,
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"NCR 53c9x SCSI", esp->ehost))
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{
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printk("Unable to request IRQ %d.\n", esp->irq);
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esp_deallocate(esp);
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scsi_unregister(esp->ehost);
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return 0;
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}
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if (request_dma(esp->dma, "NCR 53c9x SCSI")) {
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printk("Unable to request DMA channel %d.\n",
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esp->dma);
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free_irq(esp->irq, esp_intr);
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esp_deallocate(esp);
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scsi_unregister(esp->ehost);
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return 0;
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}
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request_region(tmp_io_addr, 32, "NCR 53c9x SCSI");
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/*
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* 86C01 handles DMA, IO mode, from address
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* (base + 0x0a)
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*/
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mca_disable_dma(esp->dma);
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mca_set_dma_io(esp->dma, tmp_io_addr + 0x0a);
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mca_enable_dma(esp->dma);
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/* Tell the 86C01 to give us interrupts */
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tmp_byte = inb(tmp_io_addr + 0x02) | 0x40;
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outb(tmp_byte, tmp_io_addr + 0x02);
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/*
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* Scsi ID -- general purpose register, hi
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* 2 bits; add 4 to this number to get the
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* ID
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*/
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esp->scsi_id = ((pos[2] & 0xC0) >> 6) + 4;
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/* Do command transfer with programmed I/O */
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esp->do_pio_cmds = 1;
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/* Required functions */
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esp->dma_bytes_sent = &dma_bytes_sent;
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esp->dma_can_transfer = &dma_can_transfer;
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esp->dma_dump_state = &dma_dump_state;
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esp->dma_init_read = &dma_init_read;
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esp->dma_init_write = &dma_init_write;
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esp->dma_ints_off = &dma_ints_off;
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esp->dma_ints_on = &dma_ints_on;
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esp->dma_irq_p = &dma_irq_p;
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esp->dma_ports_p = &dma_ports_p;
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esp->dma_setup = &dma_setup;
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/* Optional functions */
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esp->dma_barrier = NULL;
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esp->dma_drain = NULL;
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esp->dma_invalidate = NULL;
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esp->dma_irq_entry = NULL;
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esp->dma_irq_exit = NULL;
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esp->dma_led_on = dma_led_on;
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esp->dma_led_off = dma_led_off;
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esp->dma_poll = NULL;
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esp->dma_reset = NULL;
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/* Set the command buffer */
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esp->esp_command = (volatile unsigned char*)
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cmd_buffer;
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esp->esp_command_dvma = isa_virt_to_bus(cmd_buffer);
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/* SCSI chip speed */
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esp->cfreq = 25000000;
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/* Differential SCSI? I think not. */
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esp->diff = 0;
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esp_initialize(esp);
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printk(" Adapter found in slot %2d: io port 0x%x "
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"irq %d dma channel %d\n", slot + 1, tmp_io_addr,
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esp->irq, esp->dma);
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mca_set_adapter_name(slot, "NCR 53C9X SCSI Adapter");
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mca_mark_as_used(slot);
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break;
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}
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id_to_check++;
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}
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return esps_in_use;
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}
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/******************************************************************* Release */
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static int mca_esp_release(struct Scsi_Host *host)
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{
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struct NCR_ESP *esp = (struct NCR_ESP *)host->hostdata;
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unsigned char tmp_byte;
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esp_deallocate(esp);
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/*
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* Tell the 86C01 to stop sending interrupts
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*/
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tmp_byte = inb(esp->eregs->io_addr - 0x0E);
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tmp_byte &= ~0x40;
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outb(tmp_byte, esp->eregs->io_addr - 0x0E);
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free_irq(esp->irq, esp_intr);
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free_dma(esp->dma);
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mca_mark_as_unused(esp->slot);
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return 0;
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}
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/************************************************************* DMA Functions */
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static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
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{
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/* Ask the 53c9x. It knows. */
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return fifo_count;
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}
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static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
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{
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/*
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* The MCA dma channels can only do up to 128K bytes at a time.
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* (16 bit mode)
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*/
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unsigned long sz = sp->SCp.this_residual;
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if(sz > 0x20000)
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sz = 0x20000;
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return sz;
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}
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static void dma_dump_state(struct NCR_ESP *esp)
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{
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/*
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* Doesn't quite match up to the other drivers, but we do what we
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* can.
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*/
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ESPLOG(("esp%d: dma channel <%d>\n", esp->esp_id, esp->dma));
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ESPLOG(("bytes left to dma: %d\n", mca_get_dma_residue(esp->dma)));
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}
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static void dma_init_read(struct NCR_ESP *esp, __u32 addr, int length)
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{
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unsigned long flags;
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save_flags(flags);
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cli();
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mca_disable_dma(esp->dma);
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mca_set_dma_mode(esp->dma, MCA_DMA_MODE_XFER | MCA_DMA_MODE_16 |
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MCA_DMA_MODE_IO);
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mca_set_dma_addr(esp->dma, addr);
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mca_set_dma_count(esp->dma, length / 2); /* !!! */
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mca_enable_dma(esp->dma);
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restore_flags(flags);
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}
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static void dma_init_write(struct NCR_ESP *esp, __u32 addr, int length)
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{
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unsigned long flags;
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save_flags(flags);
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cli();
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mca_disable_dma(esp->dma);
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mca_set_dma_mode(esp->dma, MCA_DMA_MODE_XFER | MCA_DMA_MODE_WRITE |
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MCA_DMA_MODE_16 | MCA_DMA_MODE_IO);
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mca_set_dma_addr(esp->dma, addr);
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mca_set_dma_count(esp->dma, length / 2); /* !!! */
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mca_enable_dma(esp->dma);
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restore_flags(flags);
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}
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static void dma_ints_off(struct NCR_ESP *esp)
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{
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/*
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* Tell the 'C01 to shut up. All interrupts are routed through it.
|
|
|
|
*/
|
|
|
|
|
|
|
|
outb(inb(esp->eregs->io_addr - 0x0E) & ~0x40,
|
|
|
|
esp->eregs->io_addr - 0x0E);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void dma_ints_on(struct NCR_ESP *esp)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Ok. You can speak again.
|
|
|
|
*/
|
|
|
|
|
|
|
|
outb(inb(esp->eregs->io_addr - 0x0E) | 0x40,
|
|
|
|
esp->eregs->io_addr - 0x0E);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int dma_irq_p(struct NCR_ESP *esp)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* DaveM says that this should return a "yes" if there is an interrupt
|
|
|
|
* or a DMA error occurred. I copied the Amiga driver's semantics,
|
|
|
|
* though, because it seems to work and we can't really tell if
|
|
|
|
* a DMA error happened. This gives the "yes" if the scsi chip
|
|
|
|
* is sending an interrupt and no DMA activity is taking place
|
|
|
|
*/
|
|
|
|
|
|
|
|
return (!(inb(esp->eregs->io_addr - 0x04) & 1) &&
|
|
|
|
!(inb(esp->eregs->io_addr - 0x04) & 2) );
|
|
|
|
}
|
|
|
|
|
|
|
|
static int dma_ports_p(struct NCR_ESP *esp)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* Check to see if interrupts are enabled on the 'C01 (in case abort
|
|
|
|
* is entered multiple times, so we only do the abort once)
|
|
|
|
*/
|
|
|
|
|
|
|
|
return (inb(esp->eregs->io_addr - 0x0E) & 0x40) ? 1:0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
|
|
|
|
{
|
|
|
|
if(write){
|
|
|
|
dma_init_write(esp, addr, count);
|
|
|
|
} else {
|
|
|
|
dma_init_read(esp, addr, count);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* These will not play nicely with other disk controllers that try to use the
|
|
|
|
* disk active LED... but what can you do? Don't answer that.
|
|
|
|
*
|
|
|
|
* Stolen shamelessly from ibmmca.c -- IBM Microchannel SCSI adapter driver
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void dma_led_on(struct NCR_ESP *esp)
|
|
|
|
{
|
|
|
|
outb(inb(PS2_SYS_CTR) | 0xc0, PS2_SYS_CTR);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void dma_led_off(struct NCR_ESP *esp)
|
|
|
|
{
|
|
|
|
outb(inb(PS2_SYS_CTR) & 0x3f, PS2_SYS_CTR);
|
|
|
|
}
|
|
|
|
|
2005-10-31 20:31:40 +03:00
|
|
|
static struct scsi_host_template driver_template = {
|
2005-04-17 02:20:36 +04:00
|
|
|
.proc_name = "mca_53c9x",
|
|
|
|
.name = "NCR 53c9x SCSI",
|
|
|
|
.detect = mca_esp_detect,
|
|
|
|
.slave_alloc = esp_slave_alloc,
|
|
|
|
.slave_destroy = esp_slave_destroy,
|
|
|
|
.release = mca_esp_release,
|
|
|
|
.queuecommand = esp_queue,
|
|
|
|
.eh_abort_handler = esp_abort,
|
|
|
|
.eh_bus_reset_handler = esp_reset,
|
|
|
|
.can_queue = 7,
|
|
|
|
.sg_tablesize = SG_ALL,
|
|
|
|
.cmd_per_lun = 1,
|
|
|
|
.unchecked_isa_dma = 1,
|
|
|
|
.use_clustering = DISABLE_CLUSTERING
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
|
|
#include "scsi_module.c"
|
|
|
|
|
|
|
|
/*
|
|
|
|
* OK, here's the goods I promised. The NCR 86C01 is an MCA interface chip
|
|
|
|
* that handles enabling/diabling IRQ, dma interfacing, IO port selection
|
|
|
|
* and other fun stuff. It takes up 16 addresses, and the chip it is
|
|
|
|
* connnected to gets the following 16. Registers are as follows:
|
|
|
|
*
|
|
|
|
* Offsets 0-1 : Card ID
|
|
|
|
*
|
|
|
|
* Offset 2 : Mode enable register --
|
|
|
|
* Bit 7 : Data Word width (1 = 16, 0 = 8)
|
|
|
|
* Bit 6 : IRQ enable (1 = enabled)
|
|
|
|
* Bits 5,4 : IRQ select
|
|
|
|
* 0 0 : IRQ 3
|
|
|
|
* 0 1 : IRQ 5
|
|
|
|
* 1 0 : IRQ 7
|
|
|
|
* 1 1 : IRQ 9
|
|
|
|
* Bits 3-1 : Base Address
|
|
|
|
* 0 0 0 : <disabled>
|
|
|
|
* 0 0 1 : 0x0240
|
|
|
|
* 0 1 0 : 0x0340
|
|
|
|
* 0 1 1 : 0x0400
|
|
|
|
* 1 0 0 : 0x0420
|
|
|
|
* 1 0 1 : 0x3240
|
|
|
|
* 1 1 0 : 0x8240
|
|
|
|
* 1 1 1 : 0xA240
|
|
|
|
* Bit 0 : Card enable (1 = enabled)
|
|
|
|
*
|
|
|
|
* Offset 3 : DMA control register --
|
|
|
|
* Bit 7 : DMA enable (1 = enabled)
|
|
|
|
* Bits 6,5 : Preemt Count Select (transfers to complete after
|
|
|
|
* 'C01 has been preempted on MCA bus)
|
|
|
|
* 0 0 : 0
|
|
|
|
* 0 1 : 1
|
|
|
|
* 1 0 : 3
|
|
|
|
* 1 1 : 7
|
|
|
|
* (all these wacky numbers; I'm sure there's a reason somewhere)
|
|
|
|
* Bit 4 : Fairness enable (1 = fair bus priority)
|
|
|
|
* Bits 3-0 : Arbitration level (0-15 consecutive)
|
|
|
|
*
|
|
|
|
* Offset 4 : General purpose register
|
|
|
|
* Bits 7-3 : User definable (here, 7,6 are SCSI ID)
|
|
|
|
* Bits 2-0 : reserved
|
|
|
|
*
|
|
|
|
* Offset 10 : DMA decode register (used for IO based DMA; also can do
|
|
|
|
* PIO through this port)
|
|
|
|
*
|
|
|
|
* Offset 12 : Status
|
|
|
|
* Bits 7-2 : reserved
|
|
|
|
* Bit 1 : DMA pending (1 = pending)
|
|
|
|
* Bit 0 : IRQ pending (0 = pending)
|
|
|
|
*
|
|
|
|
* Exciting, huh?
|
|
|
|
*
|
|
|
|
*/
|