2009-05-28 21:56:16 +04:00
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/*
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* OMAP2 Power Management Routines
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*
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* Copyright (C) 2005 Texas Instruments, Inc.
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* Copyright (C) 2006-2008 Nokia Corporation
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*
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* Written by:
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* Richard Woodruff <r-woodruff2@ti.com>
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* Tony Lindgren
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* Juha Yrjola
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* Amit Kucheria <amit.kucheria@nokia.com>
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* Igor Stoppa <igor.stoppa@nokia.com>
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*
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* Based on pm.c for omap1
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/suspend.h>
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#include <linux/sched.h>
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#include <linux/proc_fs.h>
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#include <linux/interrupt.h>
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#include <linux/sysfs.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/time.h>
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#include <linux/gpio.h>
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OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-25 02:49:05 +03:00
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#include <linux/console.h>
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2009-05-28 21:56:16 +04:00
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#include <asm/mach/time.h>
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#include <asm/mach/irq.h>
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#include <asm/mach-types.h>
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#include <mach/irqs.h>
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2009-10-20 20:40:47 +04:00
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#include <plat/clock.h>
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#include <plat/sram.h>
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#include <plat/dma.h>
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#include <plat/board.h>
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2009-05-28 21:56:16 +04:00
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2010-12-22 01:30:55 +03:00
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#include "prm2xxx_3xxx.h"
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2009-05-28 21:56:16 +04:00
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#include "prm-regbits-24xx.h"
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2010-12-22 01:30:55 +03:00
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#include "cm2xxx_3xxx.h"
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2009-05-28 21:56:16 +04:00
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#include "cm-regbits-24xx.h"
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#include "sdrc.h"
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#include "pm.h"
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2010-10-08 21:40:20 +04:00
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#include "control.h"
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2009-05-28 21:56:16 +04:00
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2010-12-22 07:05:16 +03:00
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#include "powerdomain.h"
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2010-12-22 07:05:15 +03:00
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#include "clockdomain.h"
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2009-05-28 21:56:16 +04:00
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2010-12-09 01:40:40 +03:00
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#ifdef CONFIG_SUSPEND
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static suspend_state_t suspend_state = PM_SUSPEND_ON;
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static inline bool is_suspending(void)
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{
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return (suspend_state != PM_SUSPEND_ON);
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}
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#else
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static inline bool is_suspending(void)
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{
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return false;
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}
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#endif
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2009-05-28 21:56:16 +04:00
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static void (*omap2_sram_idle)(void);
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static void (*omap2_sram_suspend)(u32 dllctrl, void __iomem *sdrc_dlla_ctrl,
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void __iomem *sdrc_power);
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OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 06:13:01 +03:00
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static struct powerdomain *mpu_pwrdm, *core_pwrdm;
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static struct clockdomain *dsp_clkdm, *mpu_clkdm, *wkup_clkdm, *gfx_clkdm;
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2009-05-28 21:56:16 +04:00
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static struct clk *osc_ck, *emul_ck;
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static int omap2_fclks_active(void)
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{
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u32 f1, f2;
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2010-12-22 07:05:14 +03:00
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f1 = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
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f2 = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 21:51:40 +03:00
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/* Ignore UART clocks. These are handled by UART core (serial.c) */
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2010-05-19 04:40:23 +04:00
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f1 &= ~(OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_UART2_MASK);
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f2 &= ~OMAP24XX_EN_UART3_MASK;
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 21:51:40 +03:00
|
|
|
|
2009-05-28 21:56:16 +04:00
|
|
|
if (f1 | f2)
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|
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|
return 1;
|
|
|
|
return 0;
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|
}
|
|
|
|
|
|
|
|
static void omap2_enter_full_retention(void)
|
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|
|
{
|
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|
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u32 l;
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|
|
struct timespec ts_preidle, ts_postidle, ts_idle;
|
|
|
|
|
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|
|
/* There is 1 reference hold for all children of the oscillator
|
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|
|
* clock, the following will remove it. If no one else uses the
|
|
|
|
* oscillator itself it will be disabled if/when we enter retention
|
|
|
|
* mode.
|
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|
|
*/
|
|
|
|
clk_disable(osc_ck);
|
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|
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|
|
|
|
/* Clear old wake-up events */
|
|
|
|
/* REVISIT: These write to reserved bits? */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
|
|
|
|
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
|
|
|
|
omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Set MPU powerdomain's next power state to RETENTION;
|
|
|
|
* preserve logic state during retention
|
|
|
|
*/
|
|
|
|
pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET);
|
|
|
|
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
|
|
|
|
|
|
|
|
/* Workaround to kill USB */
|
|
|
|
l = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0) | OMAP24XX_USBSTANDBYCTRL;
|
|
|
|
omap_ctrl_writel(l, OMAP2_CONTROL_DEVCONF0);
|
|
|
|
|
2010-12-22 07:05:16 +03:00
|
|
|
omap2_gpio_prepare_for_idle(0);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
if (omap2_pm_debug) {
|
|
|
|
omap2_pm_dump(0, 0, 0);
|
|
|
|
getnstimeofday(&ts_preidle);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* One last check for pending IRQs to avoid extra latency due
|
|
|
|
* to sleeping unnecessarily. */
|
2009-02-04 02:49:04 +03:00
|
|
|
if (omap_irq_pending())
|
2009-05-28 21:56:16 +04:00
|
|
|
goto no_sleep;
|
|
|
|
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-25 02:49:05 +03:00
|
|
|
/* Block console output in case it is on one of the OMAP UARTs */
|
2010-12-09 01:40:40 +03:00
|
|
|
if (!is_suspending())
|
2011-01-26 02:07:35 +03:00
|
|
|
if (!console_trylock())
|
2010-12-09 01:40:40 +03:00
|
|
|
goto no_sleep;
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-25 02:49:05 +03:00
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 21:51:40 +03:00
|
|
|
omap_uart_prepare_idle(0);
|
|
|
|
omap_uart_prepare_idle(1);
|
|
|
|
omap_uart_prepare_idle(2);
|
|
|
|
|
2009-05-28 21:56:16 +04:00
|
|
|
/* Jump to SRAM suspend code */
|
|
|
|
omap2_sram_suspend(sdrc_read_reg(SDRC_DLLA_CTRL),
|
|
|
|
OMAP_SDRC_REGADDR(SDRC_DLLA_CTRL),
|
|
|
|
OMAP_SDRC_REGADDR(SDRC_POWER));
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 21:51:40 +03:00
|
|
|
omap_uart_resume_idle(2);
|
|
|
|
omap_uart_resume_idle(1);
|
|
|
|
omap_uart_resume_idle(0);
|
|
|
|
|
2010-12-09 01:40:40 +03:00
|
|
|
if (!is_suspending())
|
2011-01-26 02:07:35 +03:00
|
|
|
console_unlock();
|
OMAP2+: PM/serial: hold console semaphore while OMAP UARTs are disabled
The console semaphore must be held while the OMAP UART devices are
disabled, lest a console write cause an ARM abort (and a kernel crash)
when the underlying console device is inaccessible. These crashes
only occur when the console is on one of the OMAP internal serial
ports.
While this problem has been latent in the PM idle loop for some time,
the crash was not triggerable with an unmodified kernel until commit
6f251e9db1093c187addc309b5f2f7fe3efd2995 ("OMAP: UART: omap_device
conversions, remove implicit 8520 assumptions"). After this patch, a
console write often occurs after the console UART has been disabled in
the idle loop, crashing the system. Several users have encountered
this bug:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38396.html
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36602.html
The same commit also introduced new code that disabled the UARTs
during init, in omap_serial_init_port(). The kernel will also crash
in this code when earlyconsole and extra debugging is enabled:
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg36411.html
The minimal fix for the -rc series is to hold the console semaphore
while the OMAP UARTs are disabled. This is a somewhat overbroad fix,
since the console may not be located on an OMAP UART, as is the case
with the GPMC UART on Zoom3. While it is technically possible to
determine which devices the console or earlyconsole is actually
running on, it is not a trivial problem to solve, and the code to do
so is not really appropriate for the -rc series.
The right long-term fix is to ensure that no code outside of the OMAP
serial driver can disable an OMAP UART. As I understand it, code to
implement this is under development by TI.
This patch is a collaboration between Paul Walmsley <paul@pwsan.com>
and Tony Lindgren <tony@atomide.com>. Thanks to Ming Lei
<tom.leiming@gmail.com> and Pramod <pramod.gurav@ti.com> for their
feedback on earlier versions of this patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Ming Lei <tom.leiming@gmail.com>
Cc: Pramod <pramod.gurav@ti.com>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
2010-11-25 02:49:05 +03:00
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 21:51:40 +03:00
|
|
|
no_sleep:
|
2009-05-28 21:56:16 +04:00
|
|
|
if (omap2_pm_debug) {
|
|
|
|
unsigned long long tmp;
|
|
|
|
|
|
|
|
getnstimeofday(&ts_postidle);
|
|
|
|
ts_idle = timespec_sub(ts_postidle, ts_preidle);
|
|
|
|
tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
|
|
|
|
omap2_pm_dump(0, 1, tmp);
|
|
|
|
}
|
2009-01-27 22:09:24 +03:00
|
|
|
omap2_gpio_resume_after_idle();
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
clk_enable(osc_ck);
|
|
|
|
|
|
|
|
/* clear CORE wake-up events */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
|
|
|
|
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* wakeup domain events - bit 1: GPT1, bit5 GPIO */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_clear_mod_reg_bits(0x4 | 0x1, WKUP_MOD, PM_WKST);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* MPU domain wake events */
|
2010-12-22 07:05:14 +03:00
|
|
|
l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
|
2009-05-28 21:56:16 +04:00
|
|
|
if (l & 0x01)
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(0x01, OCP_MOD,
|
2009-05-28 21:56:16 +04:00
|
|
|
OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
|
|
|
|
if (l & 0x20)
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(0x20, OCP_MOD,
|
2009-05-28 21:56:16 +04:00
|
|
|
OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
|
|
|
|
|
|
|
|
/* Mask future PRCM-to-MPU interrupts */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(0x0, OCP_MOD, OMAP2_PRCM_IRQSTATUS_MPU_OFFSET);
|
2009-05-28 21:56:16 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int omap2_i2c_active(void)
|
|
|
|
{
|
|
|
|
u32 l;
|
|
|
|
|
2010-12-22 07:05:14 +03:00
|
|
|
l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
|
2010-05-20 22:31:04 +04:00
|
|
|
return l & (OMAP2420_EN_I2C2_MASK | OMAP2420_EN_I2C1_MASK);
|
2009-05-28 21:56:16 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int sti_console_enabled;
|
|
|
|
|
|
|
|
static int omap2_allow_mpu_retention(void)
|
|
|
|
{
|
|
|
|
u32 l;
|
|
|
|
|
|
|
|
/* Check for MMC, UART2, UART1, McSPI2, McSPI1 and DSS1. */
|
2010-12-22 07:05:14 +03:00
|
|
|
l = omap2_cm_read_mod_reg(CORE_MOD, CM_FCLKEN1);
|
2010-05-19 04:40:23 +04:00
|
|
|
if (l & (OMAP2420_EN_MMC_MASK | OMAP24XX_EN_UART2_MASK |
|
|
|
|
OMAP24XX_EN_UART1_MASK | OMAP24XX_EN_MCSPI2_MASK |
|
|
|
|
OMAP24XX_EN_MCSPI1_MASK | OMAP24XX_EN_DSS1_MASK))
|
2009-05-28 21:56:16 +04:00
|
|
|
return 0;
|
|
|
|
/* Check for UART3. */
|
2010-12-22 07:05:14 +03:00
|
|
|
l = omap2_cm_read_mod_reg(CORE_MOD, OMAP24XX_CM_FCLKEN2);
|
2010-05-19 04:40:23 +04:00
|
|
|
if (l & OMAP24XX_EN_UART3_MASK)
|
2009-05-28 21:56:16 +04:00
|
|
|
return 0;
|
|
|
|
if (sti_console_enabled)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap2_enter_mpu_retention(void)
|
|
|
|
{
|
|
|
|
int only_idle = 0;
|
|
|
|
struct timespec ts_preidle, ts_postidle, ts_idle;
|
|
|
|
|
|
|
|
/* Putting MPU into the WFI state while a transfer is active
|
|
|
|
* seems to cause the I2C block to timeout. Why? Good question. */
|
|
|
|
if (omap2_i2c_active())
|
|
|
|
return;
|
|
|
|
|
|
|
|
/* The peripherals seem not to be able to wake up the MPU when
|
|
|
|
* it is in retention mode. */
|
|
|
|
if (omap2_allow_mpu_retention()) {
|
|
|
|
/* REVISIT: These write to reserved bits? */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, PM_WKST1);
|
|
|
|
omap2_prm_write_mod_reg(0xffffffff, CORE_MOD, OMAP24XX_PM_WKST2);
|
|
|
|
omap2_prm_write_mod_reg(0xffffffff, WKUP_MOD, PM_WKST);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* Try to enter MPU retention */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg((0x01 << OMAP_POWERSTATE_SHIFT) |
|
2010-05-19 04:40:23 +04:00
|
|
|
OMAP_LOGICRETSTATE_MASK,
|
2010-01-27 06:12:51 +03:00
|
|
|
MPU_MOD, OMAP2_PM_PWSTCTRL);
|
2009-05-28 21:56:16 +04:00
|
|
|
} else {
|
|
|
|
/* Block MPU retention */
|
|
|
|
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(OMAP_LOGICRETSTATE_MASK, MPU_MOD,
|
2010-01-27 06:12:51 +03:00
|
|
|
OMAP2_PM_PWSTCTRL);
|
2009-05-28 21:56:16 +04:00
|
|
|
only_idle = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (omap2_pm_debug) {
|
|
|
|
omap2_pm_dump(only_idle ? 2 : 1, 0, 0);
|
|
|
|
getnstimeofday(&ts_preidle);
|
|
|
|
}
|
|
|
|
|
|
|
|
omap2_sram_idle();
|
|
|
|
|
|
|
|
if (omap2_pm_debug) {
|
|
|
|
unsigned long long tmp;
|
|
|
|
|
|
|
|
getnstimeofday(&ts_postidle);
|
|
|
|
ts_idle = timespec_sub(ts_postidle, ts_preidle);
|
|
|
|
tmp = timespec_to_ns(&ts_idle) * NSEC_PER_USEC;
|
|
|
|
omap2_pm_dump(only_idle ? 2 : 1, 1, tmp);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap2_can_sleep(void)
|
|
|
|
{
|
|
|
|
if (omap2_fclks_active())
|
|
|
|
return 0;
|
2010-10-08 21:23:32 +04:00
|
|
|
if (!omap_uart_can_sleep())
|
|
|
|
return 0;
|
2009-05-28 21:56:16 +04:00
|
|
|
if (osc_ck->usecount > 1)
|
|
|
|
return 0;
|
|
|
|
if (omap_dma_running())
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void omap2_pm_idle(void)
|
|
|
|
{
|
|
|
|
local_irq_disable();
|
|
|
|
local_fiq_disable();
|
|
|
|
|
|
|
|
if (!omap2_can_sleep()) {
|
2009-02-04 02:49:04 +03:00
|
|
|
if (omap_irq_pending())
|
2009-05-28 21:56:16 +04:00
|
|
|
goto out;
|
|
|
|
omap2_enter_mpu_retention();
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
|
2009-02-04 02:49:04 +03:00
|
|
|
if (omap_irq_pending())
|
2009-05-28 21:56:16 +04:00
|
|
|
goto out;
|
|
|
|
|
|
|
|
omap2_enter_full_retention();
|
|
|
|
|
|
|
|
out:
|
|
|
|
local_fiq_enable();
|
|
|
|
local_irq_enable();
|
|
|
|
}
|
|
|
|
|
2010-12-23 02:04:17 +03:00
|
|
|
#ifdef CONFIG_SUSPEND
|
2010-12-09 01:40:40 +03:00
|
|
|
static int omap2_pm_begin(suspend_state_t state)
|
|
|
|
{
|
2009-05-28 21:56:16 +04:00
|
|
|
disable_hlt();
|
2010-12-09 20:39:58 +03:00
|
|
|
suspend_state = state;
|
2009-05-28 21:56:16 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap2_pm_suspend(void)
|
|
|
|
{
|
|
|
|
u32 wken_wkup, mir1;
|
|
|
|
|
2010-12-22 07:05:14 +03:00
|
|
|
wken_wkup = omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
|
2010-05-19 04:40:23 +04:00
|
|
|
wken_wkup &= ~OMAP24XX_EN_GPT1_MASK;
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* Mask GPT1 */
|
|
|
|
mir1 = omap_readl(0x480fe0a4);
|
|
|
|
omap_writel(1 << 5, 0x480fe0ac);
|
|
|
|
|
OMAP3: PM: UART: disable clocks when idle and off-mode support
This patch allows the UART clocks to be disabled when the OMAP UARTs
are inactive, thus permitting the chip to hit retention in idle.
After the expiration of an activity timer, each UART is allowed to
disable its clocks so the system can enter retention. The activity
timer is (re)activated on any UART interrupt, UART wake event or any
IO pad wakeup. The actual disable of the UART clocks is done in the
'prepare_idle' hook called from the OMAP idle loop.
While the activity timer is active, the smart-idle mode of the UART is
also disabled. This is due to a "feature" of the UART module that
after a UART wakeup, the smart-idle mode may be entered before the
UART has communicated the interrupt, or upon TX, an idle mode may be
entered before the TX FIFOs are emptied.
Upon suspend, the 'prepare_suspend' hook cancels any pending activity
timers and allows the clocks to be disabled immediately.
In addition, upon disabling clocks the UART state is saved in case
of an off-mode transition while clocks are off.
Special thanks to Tero Kristo for the initial ideas and first versions
of UART idle support, and to Jouni Hogander for extra testing and
bugfixes.
Tested on OMAP3 (Beagle, RX51, SDP, EVM) and OMAP2 (n810)
Cc: Tero Kristo <tero.kristo@nokia.com>
Cc: Jouni Hogander <jouni.hogander@nokia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
2009-02-04 21:51:40 +03:00
|
|
|
omap_uart_prepare_suspend();
|
2009-05-28 21:56:16 +04:00
|
|
|
omap2_enter_full_retention();
|
|
|
|
|
|
|
|
omap_writel(mir1, 0x480fe0a4);
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(wken_wkup, WKUP_MOD, PM_WKEN);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int omap2_pm_enter(suspend_state_t state)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
switch (state) {
|
|
|
|
case PM_SUSPEND_STANDBY:
|
|
|
|
case PM_SUSPEND_MEM:
|
|
|
|
ret = omap2_pm_suspend();
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2010-12-09 01:40:40 +03:00
|
|
|
static void omap2_pm_end(void)
|
|
|
|
{
|
|
|
|
suspend_state = PM_SUSPEND_ON;
|
2010-12-09 20:39:58 +03:00
|
|
|
enable_hlt();
|
2010-12-09 01:40:40 +03:00
|
|
|
}
|
|
|
|
|
2010-11-16 16:14:02 +03:00
|
|
|
static const struct platform_suspend_ops omap_pm_ops = {
|
2010-12-09 01:40:40 +03:00
|
|
|
.begin = omap2_pm_begin,
|
2009-05-28 21:56:16 +04:00
|
|
|
.enter = omap2_pm_enter,
|
2010-12-09 01:40:40 +03:00
|
|
|
.end = omap2_pm_end,
|
2009-05-28 21:56:16 +04:00
|
|
|
.valid = suspend_valid_only_mem,
|
|
|
|
};
|
2010-12-23 02:04:17 +03:00
|
|
|
#else
|
|
|
|
static const struct platform_suspend_ops __initdata omap_pm_ops;
|
|
|
|
#endif /* CONFIG_SUSPEND */
|
2009-05-28 21:56:16 +04:00
|
|
|
|
OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 06:13:01 +03:00
|
|
|
/* XXX This function should be shareable between OMAP2xxx and OMAP3 */
|
|
|
|
static int __init clkdms_setup(struct clockdomain *clkdm, void *unused)
|
2009-05-28 21:56:16 +04:00
|
|
|
{
|
OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 06:13:01 +03:00
|
|
|
clkdm_clear_all_wkdeps(clkdm);
|
|
|
|
clkdm_clear_all_sleepdeps(clkdm);
|
|
|
|
|
|
|
|
if (clkdm->flags & CLKDM_CAN_ENABLE_AUTO)
|
|
|
|
omap2_clkdm_allow_idle(clkdm);
|
|
|
|
else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
|
|
|
|
atomic_read(&clkdm->usecount) == 0)
|
|
|
|
omap2_clkdm_sleep(clkdm);
|
2009-05-28 21:56:16 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __init prcm_setup_regs(void)
|
|
|
|
{
|
|
|
|
int i, num_mem_banks;
|
|
|
|
struct powerdomain *pwrdm;
|
|
|
|
|
|
|
|
/* Enable autoidle */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(OMAP24XX_AUTOIDLE_MASK, OCP_MOD,
|
2009-05-28 21:56:16 +04:00
|
|
|
OMAP2_PRCM_SYSCONFIG_OFFSET);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set CORE powerdomain memory banks to retain their contents
|
|
|
|
* during RETENTION
|
|
|
|
*/
|
|
|
|
num_mem_banks = pwrdm_get_mem_bank_count(core_pwrdm);
|
|
|
|
for (i = 0; i < num_mem_banks; i++)
|
|
|
|
pwrdm_set_mem_retst(core_pwrdm, i, PWRDM_POWER_RET);
|
|
|
|
|
|
|
|
/* Set CORE powerdomain's next power state to RETENTION */
|
|
|
|
pwrdm_set_next_pwrst(core_pwrdm, PWRDM_POWER_RET);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set MPU powerdomain's next power state to RETENTION;
|
|
|
|
* preserve logic state during retention
|
|
|
|
*/
|
|
|
|
pwrdm_set_logic_retst(mpu_pwrdm, PWRDM_POWER_RET);
|
|
|
|
pwrdm_set_next_pwrst(mpu_pwrdm, PWRDM_POWER_RET);
|
|
|
|
|
|
|
|
/* Force-power down DSP, GFX powerdomains */
|
|
|
|
|
|
|
|
pwrdm = clkdm_get_pwrdm(dsp_clkdm);
|
|
|
|
pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF);
|
|
|
|
omap2_clkdm_sleep(dsp_clkdm);
|
|
|
|
|
|
|
|
pwrdm = clkdm_get_pwrdm(gfx_clkdm);
|
|
|
|
pwrdm_set_next_pwrst(pwrdm, PWRDM_POWER_OFF);
|
|
|
|
omap2_clkdm_sleep(gfx_clkdm);
|
|
|
|
|
OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 06:13:01 +03:00
|
|
|
/*
|
|
|
|
* Clear clockdomain wakeup dependencies and enable
|
|
|
|
* hardware-supervised idle for all clkdms
|
|
|
|
*/
|
|
|
|
clkdm_for_each(clkdms_setup, NULL);
|
|
|
|
clkdm_add_wkdep(mpu_clkdm, wkup_clkdm);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* Enable clock autoidle for all domains */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_cm_write_mod_reg(OMAP24XX_AUTO_CAM_MASK |
|
|
|
|
OMAP24XX_AUTO_MAILBOXES_MASK |
|
|
|
|
OMAP24XX_AUTO_WDT4_MASK |
|
|
|
|
OMAP2420_AUTO_WDT3_MASK |
|
|
|
|
OMAP24XX_AUTO_MSPRO_MASK |
|
|
|
|
OMAP2420_AUTO_MMC_MASK |
|
|
|
|
OMAP24XX_AUTO_FAC_MASK |
|
|
|
|
OMAP2420_AUTO_EAC_MASK |
|
|
|
|
OMAP24XX_AUTO_HDQ_MASK |
|
|
|
|
OMAP24XX_AUTO_UART2_MASK |
|
|
|
|
OMAP24XX_AUTO_UART1_MASK |
|
|
|
|
OMAP24XX_AUTO_I2C2_MASK |
|
|
|
|
OMAP24XX_AUTO_I2C1_MASK |
|
|
|
|
OMAP24XX_AUTO_MCSPI2_MASK |
|
|
|
|
OMAP24XX_AUTO_MCSPI1_MASK |
|
|
|
|
OMAP24XX_AUTO_MCBSP2_MASK |
|
|
|
|
OMAP24XX_AUTO_MCBSP1_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT12_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT11_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT10_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT9_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT8_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT7_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT6_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT5_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT4_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT3_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT2_MASK |
|
|
|
|
OMAP2420_AUTO_VLYNQ_MASK |
|
|
|
|
OMAP24XX_AUTO_DSS_MASK,
|
|
|
|
CORE_MOD, CM_AUTOIDLE1);
|
|
|
|
omap2_cm_write_mod_reg(OMAP24XX_AUTO_UART3_MASK |
|
|
|
|
OMAP24XX_AUTO_SSI_MASK |
|
|
|
|
OMAP24XX_AUTO_USB_MASK,
|
|
|
|
CORE_MOD, CM_AUTOIDLE2);
|
|
|
|
omap2_cm_write_mod_reg(OMAP24XX_AUTO_SDRC_MASK |
|
|
|
|
OMAP24XX_AUTO_GPMC_MASK |
|
|
|
|
OMAP24XX_AUTO_SDMA_MASK,
|
|
|
|
CORE_MOD, CM_AUTOIDLE3);
|
|
|
|
omap2_cm_write_mod_reg(OMAP24XX_AUTO_PKA_MASK |
|
|
|
|
OMAP24XX_AUTO_AES_MASK |
|
|
|
|
OMAP24XX_AUTO_RNG_MASK |
|
|
|
|
OMAP24XX_AUTO_SHA_MASK |
|
|
|
|
OMAP24XX_AUTO_DES_MASK,
|
|
|
|
CORE_MOD, OMAP24XX_CM_AUTOIDLE4);
|
|
|
|
|
|
|
|
omap2_cm_write_mod_reg(OMAP2420_AUTO_DSP_IPI_MASK, OMAP24XX_DSP_MOD,
|
|
|
|
CM_AUTOIDLE);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* Put DPLL and both APLLs into autoidle mode */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_cm_write_mod_reg((0x03 << OMAP24XX_AUTO_DPLL_SHIFT) |
|
|
|
|
(0x03 << OMAP24XX_AUTO_96M_SHIFT) |
|
|
|
|
(0x03 << OMAP24XX_AUTO_54M_SHIFT),
|
|
|
|
PLL_MOD, CM_AUTOIDLE);
|
|
|
|
|
|
|
|
omap2_cm_write_mod_reg(OMAP24XX_AUTO_OMAPCTRL_MASK |
|
|
|
|
OMAP24XX_AUTO_WDT1_MASK |
|
|
|
|
OMAP24XX_AUTO_MPU_WDT_MASK |
|
|
|
|
OMAP24XX_AUTO_GPIOS_MASK |
|
|
|
|
OMAP24XX_AUTO_32KSYNC_MASK |
|
|
|
|
OMAP24XX_AUTO_GPT1_MASK,
|
|
|
|
WKUP_MOD, CM_AUTOIDLE);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* REVISIT: Configure number of 32 kHz clock cycles for sys_clk
|
|
|
|
* stabilisation */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(15 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
|
|
|
|
OMAP2_PRCM_CLKSSETUP_OFFSET);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* Configure automatic voltage transition */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(2 << OMAP_SETUP_TIME_SHIFT, OMAP24XX_GR_MOD,
|
|
|
|
OMAP2_PRCM_VOLTSETUP_OFFSET);
|
|
|
|
omap2_prm_write_mod_reg(OMAP24XX_AUTO_EXTVOLT_MASK |
|
|
|
|
(0x1 << OMAP24XX_SETOFF_LEVEL_SHIFT) |
|
|
|
|
OMAP24XX_MEMRETCTRL_MASK |
|
|
|
|
(0x1 << OMAP24XX_SETRET_LEVEL_SHIFT) |
|
|
|
|
(0x0 << OMAP24XX_VOLT_LEVEL_SHIFT),
|
|
|
|
OMAP24XX_GR_MOD, OMAP2_PRCM_VOLTCTRL_OFFSET);
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
/* Enable wake-up events */
|
2010-12-22 07:05:14 +03:00
|
|
|
omap2_prm_write_mod_reg(OMAP24XX_EN_GPIOS_MASK | OMAP24XX_EN_GPT1_MASK,
|
|
|
|
WKUP_MOD, PM_WKEN);
|
2009-05-28 21:56:16 +04:00
|
|
|
}
|
|
|
|
|
2009-06-10 20:02:25 +04:00
|
|
|
static int __init omap2_pm_init(void)
|
2009-05-28 21:56:16 +04:00
|
|
|
{
|
|
|
|
u32 l;
|
|
|
|
|
|
|
|
if (!cpu_is_omap24xx())
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
printk(KERN_INFO "Power Management for OMAP2 initializing\n");
|
2010-12-22 07:05:14 +03:00
|
|
|
l = omap2_prm_read_mod_reg(OCP_MOD, OMAP2_PRCM_REVISION_OFFSET);
|
2009-05-28 21:56:16 +04:00
|
|
|
printk(KERN_INFO "PRCM revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
|
|
|
|
|
OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 06:13:01 +03:00
|
|
|
/* Look up important powerdomains */
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
mpu_pwrdm = pwrdm_lookup("mpu_pwrdm");
|
|
|
|
if (!mpu_pwrdm)
|
|
|
|
pr_err("PM: mpu_pwrdm not found\n");
|
|
|
|
|
|
|
|
core_pwrdm = pwrdm_lookup("core_pwrdm");
|
|
|
|
if (!core_pwrdm)
|
|
|
|
pr_err("PM: core_pwrdm not found\n");
|
|
|
|
|
OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 06:13:01 +03:00
|
|
|
/* Look up important clockdomains */
|
|
|
|
|
|
|
|
mpu_clkdm = clkdm_lookup("mpu_clkdm");
|
|
|
|
if (!mpu_clkdm)
|
|
|
|
pr_err("PM: mpu_clkdm not found\n");
|
|
|
|
|
|
|
|
wkup_clkdm = clkdm_lookup("wkup_clkdm");
|
|
|
|
if (!wkup_clkdm)
|
|
|
|
pr_err("PM: wkup_clkdm not found\n");
|
|
|
|
|
2009-05-28 21:56:16 +04:00
|
|
|
dsp_clkdm = clkdm_lookup("dsp_clkdm");
|
|
|
|
if (!dsp_clkdm)
|
OMAP clockdomains: add usecounting for wakeup and sleep dependencies
Add usecounting for wakeup and sleep dependencies. In the current
situation, if several functions add dependencies on the same
clockdomains, when the first dependency removal function is called,
the dependency will be incorrectly removed from the hardware.
Add clkdm_clear_all_wkdeps() and clkdm_clear_all_sleepdeps(), which
provide a fast and usecounting-consistent way to clear all hardware
clockdomain dependencies, since accesses to these registers can be
quite slow. pm{2,3}4xx.c has been updated to use these new functions.
The original version of this patch did not touch these files, which
previously wrote directly to the wkdep registers, and thus confused
the usecounting code. This problem was found by Kevin Hilman
<khilman@deeprootsystems.com>.
N.B.: This patch introduces one significant functional difference over
the previous pm34xx.c code: sleepdeps are now cleared during
clockdomain initialization, whereas previously they were left
untouched. This has been tested by Kevin and confirmed to work.
The original version of this patch also did not take into
consideration that some clockdomains do not have sleep or wakeup
dependency sources, which caused NULL pointer dereferences. This
problem was debugged and fixed by Kevin Hilman
<khilman@deeprootsystems.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Jouni Högander <jouni.hogander@nokia.com>
2010-01-27 06:13:01 +03:00
|
|
|
pr_err("PM: dsp_clkdm not found\n");
|
2009-05-28 21:56:16 +04:00
|
|
|
|
|
|
|
gfx_clkdm = clkdm_lookup("gfx_clkdm");
|
|
|
|
if (!gfx_clkdm)
|
|
|
|
pr_err("PM: gfx_clkdm not found\n");
|
|
|
|
|
|
|
|
|
|
|
|
osc_ck = clk_get(NULL, "osc_ck");
|
|
|
|
if (IS_ERR(osc_ck)) {
|
|
|
|
printk(KERN_ERR "could not get osc_ck\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (cpu_is_omap242x()) {
|
|
|
|
emul_ck = clk_get(NULL, "emul_ck");
|
|
|
|
if (IS_ERR(emul_ck)) {
|
|
|
|
printk(KERN_ERR "could not get emul_ck\n");
|
|
|
|
clk_put(osc_ck);
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
prcm_setup_regs();
|
|
|
|
|
|
|
|
/* Hack to prevent MPU retention when STI console is enabled. */
|
|
|
|
{
|
|
|
|
const struct omap_sti_console_config *sti;
|
|
|
|
|
|
|
|
sti = omap_get_config(OMAP_TAG_STI_CONSOLE,
|
|
|
|
struct omap_sti_console_config);
|
|
|
|
if (sti != NULL && sti->enable)
|
|
|
|
sti_console_enabled = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* We copy the assembler sleep/wakeup routines to SRAM.
|
|
|
|
* These routines need to be in SRAM as that's the only
|
|
|
|
* memory the MPU can see when it wakes up.
|
|
|
|
*/
|
|
|
|
if (cpu_is_omap24xx()) {
|
|
|
|
omap2_sram_idle = omap_sram_push(omap24xx_idle_loop_suspend,
|
|
|
|
omap24xx_idle_loop_suspend_sz);
|
|
|
|
|
|
|
|
omap2_sram_suspend = omap_sram_push(omap24xx_cpu_suspend,
|
|
|
|
omap24xx_cpu_suspend_sz);
|
|
|
|
}
|
|
|
|
|
|
|
|
suspend_set_ops(&omap_pm_ops);
|
|
|
|
pm_idle = omap2_pm_idle;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
late_initcall(omap2_pm_init);
|