2023-01-03 23:36:50 +03:00
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// SPDX-License-Identifier: GPL-2.0-only
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/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P. */
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#include <linux/bits.h>
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#include <linux/err.h>
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#include <linux/hwmon.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#define OFS_FAN_INST 0 /* Is 0 because plreg base will be set at INST */
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#define OFS_FAN_FAIL 2 /* Is 2 bytes after base */
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#define OFS_SEVSTAT 0 /* Is 0 because fn2 base will be set at SEVSTAT */
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#define POWER_BIT 24
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struct gxp_fan_ctrl_drvdata {
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void __iomem *base;
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void __iomem *plreg;
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void __iomem *fn2;
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};
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static bool fan_installed(struct device *dev, int fan)
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{
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struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
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u8 val;
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val = readb(drvdata->plreg + OFS_FAN_INST);
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return !!(val & BIT(fan));
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}
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static long fan_failed(struct device *dev, int fan)
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{
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struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
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u8 val;
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val = readb(drvdata->plreg + OFS_FAN_FAIL);
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return !!(val & BIT(fan));
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}
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static long fan_enabled(struct device *dev, int fan)
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{
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struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
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u32 val;
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/*
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* Check the power status as if the platform is off the value
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* reported for the PWM will be incorrect. Report fan as
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* disabled.
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*/
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val = readl(drvdata->fn2 + OFS_SEVSTAT);
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return !!((val & BIT(POWER_BIT)) && fan_installed(dev, fan));
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}
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static int gxp_pwm_write(struct device *dev, u32 attr, int channel, long val)
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{
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struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
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switch (attr) {
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case hwmon_pwm_input:
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if (val > 255 || val < 0)
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return -EINVAL;
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writeb(val, drvdata->base + channel);
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static int gxp_fan_ctrl_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long val)
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{
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switch (type) {
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case hwmon_pwm:
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return gxp_pwm_write(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int gxp_fan_read(struct device *dev, u32 attr, int channel, long *val)
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{
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switch (attr) {
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case hwmon_fan_enable:
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*val = fan_enabled(dev, channel);
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return 0;
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case hwmon_fan_fault:
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*val = fan_failed(dev, channel);
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return 0;
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default:
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return -EOPNOTSUPP;
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}
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}
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static int gxp_pwm_read(struct device *dev, u32 attr, int channel, long *val)
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{
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struct gxp_fan_ctrl_drvdata *drvdata = dev_get_drvdata(dev);
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u32 reg;
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/*
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* Check the power status of the platform. If the platform is off
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* the value reported for the PWM will be incorrect. In this case
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* report a PWM of zero.
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*/
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reg = readl(drvdata->fn2 + OFS_SEVSTAT);
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if (reg & BIT(POWER_BIT))
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*val = fan_installed(dev, channel) ? readb(drvdata->base + channel) : 0;
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else
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*val = 0;
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return 0;
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}
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static int gxp_fan_ctrl_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *val)
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{
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switch (type) {
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case hwmon_fan:
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return gxp_fan_read(dev, attr, channel, val);
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case hwmon_pwm:
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return gxp_pwm_read(dev, attr, channel, val);
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default:
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return -EOPNOTSUPP;
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}
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}
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static umode_t gxp_fan_ctrl_is_visible(const void *_data,
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enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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umode_t mode = 0;
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switch (type) {
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case hwmon_fan:
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switch (attr) {
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case hwmon_fan_enable:
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case hwmon_fan_fault:
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mode = 0444;
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break;
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default:
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break;
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}
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break;
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case hwmon_pwm:
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switch (attr) {
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case hwmon_pwm_input:
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mode = 0644;
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break;
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default:
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break;
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}
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break;
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default:
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break;
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}
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return mode;
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}
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static const struct hwmon_ops gxp_fan_ctrl_ops = {
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.is_visible = gxp_fan_ctrl_is_visible,
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.read = gxp_fan_ctrl_read,
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.write = gxp_fan_ctrl_write,
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};
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static const struct hwmon_channel_info *gxp_fan_ctrl_info[] = {
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HWMON_CHANNEL_INFO(fan,
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HWMON_F_FAULT | HWMON_F_ENABLE,
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HWMON_F_FAULT | HWMON_F_ENABLE,
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HWMON_F_FAULT | HWMON_F_ENABLE,
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HWMON_F_FAULT | HWMON_F_ENABLE,
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HWMON_F_FAULT | HWMON_F_ENABLE,
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HWMON_F_FAULT | HWMON_F_ENABLE,
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HWMON_F_FAULT | HWMON_F_ENABLE,
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HWMON_F_FAULT | HWMON_F_ENABLE),
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HWMON_CHANNEL_INFO(pwm,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT,
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HWMON_PWM_INPUT),
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NULL
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};
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static const struct hwmon_chip_info gxp_fan_ctrl_chip_info = {
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.ops = &gxp_fan_ctrl_ops,
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.info = gxp_fan_ctrl_info,
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};
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static int gxp_fan_ctrl_probe(struct platform_device *pdev)
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{
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struct gxp_fan_ctrl_drvdata *drvdata;
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struct device *dev = &pdev->dev;
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struct device *hwmon_dev;
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drvdata = devm_kzalloc(dev, sizeof(struct gxp_fan_ctrl_drvdata),
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GFP_KERNEL);
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if (!drvdata)
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return -ENOMEM;
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2023-02-08 10:46:06 +03:00
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drvdata->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
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2023-01-03 23:36:50 +03:00
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if (IS_ERR(drvdata->base))
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return dev_err_probe(dev, PTR_ERR(drvdata->base),
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"failed to map base\n");
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drvdata->plreg = devm_platform_ioremap_resource_byname(pdev,
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"pl");
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if (IS_ERR(drvdata->plreg))
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return dev_err_probe(dev, PTR_ERR(drvdata->plreg),
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"failed to map plreg\n");
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drvdata->fn2 = devm_platform_ioremap_resource_byname(pdev,
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"fn2");
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if (IS_ERR(drvdata->fn2))
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return dev_err_probe(dev, PTR_ERR(drvdata->fn2),
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"failed to map fn2\n");
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hwmon_dev = devm_hwmon_device_register_with_info(&pdev->dev,
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"hpe_gxp_fan_ctrl",
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drvdata,
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&gxp_fan_ctrl_chip_info,
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NULL);
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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static const struct of_device_id gxp_fan_ctrl_of_match[] = {
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{ .compatible = "hpe,gxp-fan-ctrl", },
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{},
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};
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MODULE_DEVICE_TABLE(of, gxp_fan_ctrl_of_match);
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static struct platform_driver gxp_fan_ctrl_driver = {
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.probe = gxp_fan_ctrl_probe,
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.driver = {
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.name = "gxp-fan-ctrl",
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.of_match_table = gxp_fan_ctrl_of_match,
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},
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};
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module_platform_driver(gxp_fan_ctrl_driver);
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MODULE_AUTHOR("Nick Hawkins <nick.hawkins@hpe.com>");
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MODULE_DESCRIPTION("HPE GXP fan controller");
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MODULE_LICENSE("GPL");
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