251 строка
5.8 KiB
C
251 строка
5.8 KiB
C
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// SPDX-License-Identifier: GPL-2.0
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/* HWMON driver for Aquantia PHY
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*
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* Author: Nikita Yushchenko <nikita.yoush@cogentembedded.com>
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* Author: Andrew Lunn <andrew@lunn.ch>
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* Author: Heiner Kallweit <hkallweit1@gmail.com>
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*/
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#include <linux/phy.h>
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#include <linux/device.h>
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#include <linux/ctype.h>
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#include <linux/hwmon.h>
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#include "aquantia.h"
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/* Vendor specific 1, MDIO_MMD_VEND2 */
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#define VEND1_THERMAL_PROV_HIGH_TEMP_FAIL 0xc421
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#define VEND1_THERMAL_PROV_LOW_TEMP_FAIL 0xc422
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#define VEND1_THERMAL_PROV_HIGH_TEMP_WARN 0xc423
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#define VEND1_THERMAL_PROV_LOW_TEMP_WARN 0xc424
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#define VEND1_THERMAL_STAT1 0xc820
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#define VEND1_THERMAL_STAT2 0xc821
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#define VEND1_THERMAL_STAT2_VALID BIT(0)
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#define VEND1_GENERAL_STAT1 0xc830
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#define VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL BIT(14)
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#define VEND1_GENERAL_STAT1_LOW_TEMP_FAIL BIT(13)
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#define VEND1_GENERAL_STAT1_HIGH_TEMP_WARN BIT(12)
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#define VEND1_GENERAL_STAT1_LOW_TEMP_WARN BIT(11)
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#if IS_REACHABLE(CONFIG_HWMON)
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static umode_t aqr_hwmon_is_visible(const void *data,
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enum hwmon_sensor_types type,
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u32 attr, int channel)
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{
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if (type != hwmon_temp)
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return 0;
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switch (attr) {
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case hwmon_temp_input:
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case hwmon_temp_min_alarm:
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case hwmon_temp_max_alarm:
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case hwmon_temp_lcrit_alarm:
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case hwmon_temp_crit_alarm:
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return 0444;
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case hwmon_temp_min:
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case hwmon_temp_max:
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case hwmon_temp_lcrit:
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case hwmon_temp_crit:
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return 0644;
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default:
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return 0;
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}
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}
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static int aqr_hwmon_get(struct phy_device *phydev, int reg, long *value)
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{
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int temp = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg);
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if (temp < 0)
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return temp;
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/* 16 bit value is 2's complement with LSB = 1/256th degree Celsius */
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*value = (s16)temp * 1000 / 256;
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return 0;
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}
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static int aqr_hwmon_set(struct phy_device *phydev, int reg, long value)
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{
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int temp;
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if (value >= 128000 || value < -128000)
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return -ERANGE;
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temp = value * 256 / 1000;
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/* temp is in s16 range and we're interested in lower 16 bits only */
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return phy_write_mmd(phydev, MDIO_MMD_VEND1, reg, (u16)temp);
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}
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static int aqr_hwmon_test_bit(struct phy_device *phydev, int reg, int bit)
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{
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int val = phy_read_mmd(phydev, MDIO_MMD_VEND1, reg);
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if (val < 0)
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return val;
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return !!(val & bit);
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}
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static int aqr_hwmon_status1(struct phy_device *phydev, int bit, long *value)
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{
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int val = aqr_hwmon_test_bit(phydev, VEND1_GENERAL_STAT1, bit);
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if (val < 0)
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return val;
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*value = val;
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return 0;
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}
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static int aqr_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long *value)
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{
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struct phy_device *phydev = dev_get_drvdata(dev);
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int reg;
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if (type != hwmon_temp)
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return -EOPNOTSUPP;
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switch (attr) {
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case hwmon_temp_input:
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reg = aqr_hwmon_test_bit(phydev, VEND1_THERMAL_STAT2,
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VEND1_THERMAL_STAT2_VALID);
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if (reg < 0)
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return reg;
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if (!reg)
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return -EBUSY;
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return aqr_hwmon_get(phydev, VEND1_THERMAL_STAT1, value);
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case hwmon_temp_lcrit:
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return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_LOW_TEMP_FAIL,
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value);
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case hwmon_temp_min:
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return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_LOW_TEMP_WARN,
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value);
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case hwmon_temp_max:
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return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_WARN,
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value);
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case hwmon_temp_crit:
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return aqr_hwmon_get(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_FAIL,
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value);
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case hwmon_temp_lcrit_alarm:
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return aqr_hwmon_status1(phydev,
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VEND1_GENERAL_STAT1_LOW_TEMP_FAIL,
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value);
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case hwmon_temp_min_alarm:
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return aqr_hwmon_status1(phydev,
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VEND1_GENERAL_STAT1_LOW_TEMP_WARN,
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value);
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case hwmon_temp_max_alarm:
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return aqr_hwmon_status1(phydev,
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VEND1_GENERAL_STAT1_HIGH_TEMP_WARN,
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value);
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case hwmon_temp_crit_alarm:
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return aqr_hwmon_status1(phydev,
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VEND1_GENERAL_STAT1_HIGH_TEMP_FAIL,
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value);
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default:
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return -EOPNOTSUPP;
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}
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}
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static int aqr_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
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u32 attr, int channel, long value)
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{
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struct phy_device *phydev = dev_get_drvdata(dev);
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if (type != hwmon_temp)
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return -EOPNOTSUPP;
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switch (attr) {
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case hwmon_temp_lcrit:
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return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_LOW_TEMP_FAIL,
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value);
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case hwmon_temp_min:
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return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_LOW_TEMP_WARN,
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value);
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case hwmon_temp_max:
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return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_WARN,
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value);
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case hwmon_temp_crit:
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return aqr_hwmon_set(phydev, VEND1_THERMAL_PROV_HIGH_TEMP_FAIL,
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value);
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default:
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return -EOPNOTSUPP;
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}
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}
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static const struct hwmon_ops aqr_hwmon_ops = {
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.is_visible = aqr_hwmon_is_visible,
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.read = aqr_hwmon_read,
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.write = aqr_hwmon_write,
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};
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static u32 aqr_hwmon_chip_config[] = {
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HWMON_C_REGISTER_TZ,
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0,
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};
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static const struct hwmon_channel_info aqr_hwmon_chip = {
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.type = hwmon_chip,
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.config = aqr_hwmon_chip_config,
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};
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static u32 aqr_hwmon_temp_config[] = {
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HWMON_T_INPUT |
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HWMON_T_MAX | HWMON_T_MIN |
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HWMON_T_MAX_ALARM | HWMON_T_MIN_ALARM |
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HWMON_T_CRIT | HWMON_T_LCRIT |
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HWMON_T_CRIT_ALARM | HWMON_T_LCRIT_ALARM,
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0,
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};
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static const struct hwmon_channel_info aqr_hwmon_temp = {
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.type = hwmon_temp,
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.config = aqr_hwmon_temp_config,
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};
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static const struct hwmon_channel_info *aqr_hwmon_info[] = {
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&aqr_hwmon_chip,
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&aqr_hwmon_temp,
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NULL,
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};
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static const struct hwmon_chip_info aqr_hwmon_chip_info = {
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.ops = &aqr_hwmon_ops,
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.info = aqr_hwmon_info,
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};
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int aqr_hwmon_probe(struct phy_device *phydev)
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{
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struct device *dev = &phydev->mdio.dev;
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struct device *hwmon_dev;
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char *hwmon_name;
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int i, j;
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hwmon_name = devm_kstrdup(dev, dev_name(dev), GFP_KERNEL);
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if (!hwmon_name)
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return -ENOMEM;
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for (i = j = 0; hwmon_name[i]; i++) {
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if (isalnum(hwmon_name[i])) {
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if (i != j)
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hwmon_name[j] = hwmon_name[i];
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j++;
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}
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}
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hwmon_name[j] = '\0';
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hwmon_dev = devm_hwmon_device_register_with_info(dev, hwmon_name,
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phydev, &aqr_hwmon_chip_info, NULL);
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return PTR_ERR_OR_ZERO(hwmon_dev);
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}
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#endif
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