52 строки
1.4 KiB
C
52 строки
1.4 KiB
C
|
/* SPDX-License-Identifier: GPL-2.0+ */
|
||
|
/*
|
||
|
* Copyright (c) 2018 Bitmain Ltd.
|
||
|
* Copyright (c) 2019 Linaro Ltd.
|
||
|
*/
|
||
|
|
||
|
#ifndef _DT_BINDINGS_BM1880_RESET_H
|
||
|
#define _DT_BINDINGS_BM1880_RESET_H
|
||
|
|
||
|
#define BM1880_RST_MAIN_AP 0
|
||
|
#define BM1880_RST_SECOND_AP 1
|
||
|
#define BM1880_RST_DDR 2
|
||
|
#define BM1880_RST_VIDEO 3
|
||
|
#define BM1880_RST_JPEG 4
|
||
|
#define BM1880_RST_VPP 5
|
||
|
#define BM1880_RST_GDMA 6
|
||
|
#define BM1880_RST_AXI_SRAM 7
|
||
|
#define BM1880_RST_TPU 8
|
||
|
#define BM1880_RST_USB 9
|
||
|
#define BM1880_RST_ETH0 10
|
||
|
#define BM1880_RST_ETH1 11
|
||
|
#define BM1880_RST_NAND 12
|
||
|
#define BM1880_RST_EMMC 13
|
||
|
#define BM1880_RST_SD 14
|
||
|
#define BM1880_RST_SDMA 15
|
||
|
#define BM1880_RST_I2S0 16
|
||
|
#define BM1880_RST_I2S1 17
|
||
|
#define BM1880_RST_UART0_1_CLK 18
|
||
|
#define BM1880_RST_UART0_1_ACLK 19
|
||
|
#define BM1880_RST_UART2_3_CLK 20
|
||
|
#define BM1880_RST_UART2_3_ACLK 21
|
||
|
#define BM1880_RST_MINER 22
|
||
|
#define BM1880_RST_I2C0 23
|
||
|
#define BM1880_RST_I2C1 24
|
||
|
#define BM1880_RST_I2C2 25
|
||
|
#define BM1880_RST_I2C3 26
|
||
|
#define BM1880_RST_I2C4 27
|
||
|
#define BM1880_RST_PWM0 28
|
||
|
#define BM1880_RST_PWM1 29
|
||
|
#define BM1880_RST_PWM2 30
|
||
|
#define BM1880_RST_PWM3 31
|
||
|
#define BM1880_RST_SPI 32
|
||
|
#define BM1880_RST_GPIO0 33
|
||
|
#define BM1880_RST_GPIO1 34
|
||
|
#define BM1880_RST_GPIO2 35
|
||
|
#define BM1880_RST_EFUSE 36
|
||
|
#define BM1880_RST_WDT 37
|
||
|
#define BM1880_RST_AHB_ROM 38
|
||
|
#define BM1880_RST_SPIC 39
|
||
|
|
||
|
#endif /* _DT_BINDINGS_BM1880_RESET_H */
|