2019-05-20 10:19:02 +03:00
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// SPDX-License-Identifier: GPL-2.0-or-later
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2005-04-17 02:20:36 +04:00
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/*
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VES1820 - Single Chip Cable Channel Receiver driver module
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Copyright (C) 1999 Convergence Integrated Media GmbH <ralph@convergence.de>
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*/
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#include <linux/delay.h>
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#include <linux/errno.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <asm/div64.h>
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2017-12-28 21:03:51 +03:00
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#include <media/dvb_frontend.h>
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2005-04-17 02:20:36 +04:00
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#include "ves1820.h"
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struct ves1820_state {
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struct i2c_adapter* i2c;
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/* configuration settings */
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const struct ves1820_config* config;
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struct dvb_frontend frontend;
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/* private demodulator data */
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u8 reg0;
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u8 pwm;
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};
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static int verbose;
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static u8 ves1820_inittab[] = {
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2007-10-31 07:34:25 +03:00
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0x69, 0x6A, 0x93, 0x1A, 0x12, 0x46, 0x26, 0x1A,
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2005-04-17 02:20:36 +04:00
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0x43, 0x6A, 0xAA, 0xAA, 0x1E, 0x85, 0x43, 0x20,
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0xE0, 0x00, 0xA1, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00,
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0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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0x00, 0x00, 0x00, 0x00, 0x40
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};
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static int ves1820_writereg(struct ves1820_state *state, u8 reg, u8 data)
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{
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u8 buf[] = { 0x00, reg, data };
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struct i2c_msg msg = {.addr = state->config->demod_address,.flags = 0,.buf = buf,.len = 3 };
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int ret;
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ret = i2c_transfer(state->i2c, &msg, 1);
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if (ret != 1)
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[media] dvb-frontends: don't break long lines
Due to the 80-cols restrictions, and latter due to checkpatch
warnings, several strings were broken into multiple lines. This
is not considered a good practice anymore, as it makes harder
to grep for strings at the source code.
As we're right now fixing other drivers due to KERN_CONT, we need
to be able to identify what printk strings don't end with a "\n".
It is a way easier to detect those if we don't break long lines.
So, join those continuation lines.
The patch was generated via the script below, and manually
adjusted if needed.
</script>
use Text::Tabs;
while (<>) {
if ($next ne "") {
$c=$_;
if ($c =~ /^\s+\"(.*)/) {
$c2=$1;
$next =~ s/\"\n$//;
$n = expand($next);
$funpos = index($n, '(');
$pos = index($c2, '",');
if ($funpos && $pos > 0) {
$s1 = substr $c2, 0, $pos + 2;
$s2 = ' ' x ($funpos + 1) . substr $c2, $pos + 2;
$s2 =~ s/^\s+//;
$s2 = ' ' x ($funpos + 1) . $s2 if ($s2 ne "");
print unexpand("$next$s1\n");
print unexpand("$s2\n") if ($s2 ne "");
} else {
print "$next$c2\n";
}
$next="";
next;
} else {
print $next;
}
$next="";
} else {
if (m/\"$/) {
if (!m/\\n\"$/) {
$next=$_;
next;
}
}
}
print $_;
}
</script>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2016-10-18 22:44:22 +03:00
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printk("ves1820: %s(): writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
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__func__, reg, data, ret);
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2005-04-17 02:20:36 +04:00
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return (ret != 1) ? -EREMOTEIO : 0;
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}
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static u8 ves1820_readreg(struct ves1820_state *state, u8 reg)
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{
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u8 b0[] = { 0x00, reg };
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u8 b1[] = { 0 };
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struct i2c_msg msg[] = {
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{.addr = state->config->demod_address,.flags = 0,.buf = b0,.len = 2},
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{.addr = state->config->demod_address,.flags = I2C_M_RD,.buf = b1,.len = 1}
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};
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int ret;
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ret = i2c_transfer(state->i2c, msg, 2);
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if (ret != 2)
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[media] dvb-frontends: don't break long lines
Due to the 80-cols restrictions, and latter due to checkpatch
warnings, several strings were broken into multiple lines. This
is not considered a good practice anymore, as it makes harder
to grep for strings at the source code.
As we're right now fixing other drivers due to KERN_CONT, we need
to be able to identify what printk strings don't end with a "\n".
It is a way easier to detect those if we don't break long lines.
So, join those continuation lines.
The patch was generated via the script below, and manually
adjusted if needed.
</script>
use Text::Tabs;
while (<>) {
if ($next ne "") {
$c=$_;
if ($c =~ /^\s+\"(.*)/) {
$c2=$1;
$next =~ s/\"\n$//;
$n = expand($next);
$funpos = index($n, '(');
$pos = index($c2, '",');
if ($funpos && $pos > 0) {
$s1 = substr $c2, 0, $pos + 2;
$s2 = ' ' x ($funpos + 1) . substr $c2, $pos + 2;
$s2 =~ s/^\s+//;
$s2 = ' ' x ($funpos + 1) . $s2 if ($s2 ne "");
print unexpand("$next$s1\n");
print unexpand("$s2\n") if ($s2 ne "");
} else {
print "$next$c2\n";
}
$next="";
next;
} else {
print $next;
}
$next="";
} else {
if (m/\"$/) {
if (!m/\\n\"$/) {
$next=$_;
next;
}
}
}
print $_;
}
</script>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
2016-10-18 22:44:22 +03:00
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printk("ves1820: %s(): readreg error (reg == 0x%02x, ret == %i)\n",
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__func__, reg, ret);
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2005-04-17 02:20:36 +04:00
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return b1[0];
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}
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2015-06-07 20:53:52 +03:00
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static int ves1820_setup_reg0(struct ves1820_state *state,
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u8 reg0, enum fe_spectral_inversion inversion)
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2005-04-17 02:20:36 +04:00
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{
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reg0 |= state->reg0 & 0x62;
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if (INVERSION_ON == inversion) {
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if (!state->config->invert) reg0 |= 0x20;
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else reg0 &= ~0x20;
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} else if (INVERSION_OFF == inversion) {
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if (!state->config->invert) reg0 &= ~0x20;
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else reg0 |= 0x20;
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}
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ves1820_writereg(state, 0x00, reg0 & 0xfe);
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ves1820_writereg(state, 0x00, reg0 | 0x01);
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state->reg0 = reg0;
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return 0;
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}
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static int ves1820_set_symbolrate(struct ves1820_state *state, u32 symbolrate)
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{
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s32 BDR;
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s32 BDRI;
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s16 SFIL = 0;
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u16 NDEC = 0;
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u32 ratio;
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u32 fin;
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u32 tmp;
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u64 fptmp;
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u64 fpxin;
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if (symbolrate > state->config->xin / 2)
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symbolrate = state->config->xin / 2;
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if (symbolrate < 500000)
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symbolrate = 500000;
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if (symbolrate < state->config->xin / 16)
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NDEC = 1;
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if (symbolrate < state->config->xin / 32)
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NDEC = 2;
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if (symbolrate < state->config->xin / 64)
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NDEC = 3;
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/* yeuch! */
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2018-02-06 19:47:09 +03:00
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fpxin = state->config->xin * 10ULL;
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2005-04-17 02:20:36 +04:00
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fptmp = fpxin; do_div(fptmp, 123);
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2005-12-01 11:51:55 +03:00
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if (symbolrate < fptmp)
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2005-04-17 02:20:36 +04:00
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SFIL = 1;
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fptmp = fpxin; do_div(fptmp, 160);
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2005-12-01 11:51:55 +03:00
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if (symbolrate < fptmp)
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2005-04-17 02:20:36 +04:00
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SFIL = 0;
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fptmp = fpxin; do_div(fptmp, 246);
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2005-12-01 11:51:55 +03:00
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if (symbolrate < fptmp)
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2005-04-17 02:20:36 +04:00
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SFIL = 1;
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fptmp = fpxin; do_div(fptmp, 320);
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2005-12-01 11:51:55 +03:00
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if (symbolrate < fptmp)
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2005-04-17 02:20:36 +04:00
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SFIL = 0;
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fptmp = fpxin; do_div(fptmp, 492);
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2005-12-01 11:51:55 +03:00
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if (symbolrate < fptmp)
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2005-04-17 02:20:36 +04:00
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SFIL = 1;
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fptmp = fpxin; do_div(fptmp, 640);
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2005-12-01 11:51:55 +03:00
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if (symbolrate < fptmp)
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2005-04-17 02:20:36 +04:00
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SFIL = 0;
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fptmp = fpxin; do_div(fptmp, 984);
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2005-12-01 11:51:55 +03:00
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if (symbolrate < fptmp)
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2005-04-17 02:20:36 +04:00
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SFIL = 1;
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fin = state->config->xin >> 4;
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symbolrate <<= NDEC;
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ratio = (symbolrate << 4) / fin;
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tmp = ((symbolrate << 4) % fin) << 8;
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ratio = (ratio << 8) + tmp / fin;
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tmp = (tmp % fin) << 8;
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2009-08-01 23:48:41 +04:00
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ratio = (ratio << 8) + DIV_ROUND_CLOSEST(tmp, fin);
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2005-04-17 02:20:36 +04:00
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BDR = ratio;
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BDRI = (((state->config->xin << 5) / symbolrate) + 1) / 2;
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if (BDRI > 0xFF)
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BDRI = 0xFF;
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SFIL = (SFIL << 4) | ves1820_inittab[0x0E];
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NDEC = (NDEC << 6) | ves1820_inittab[0x03];
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ves1820_writereg(state, 0x03, NDEC);
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ves1820_writereg(state, 0x0a, BDR & 0xff);
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ves1820_writereg(state, 0x0b, (BDR >> 8) & 0xff);
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ves1820_writereg(state, 0x0c, (BDR >> 16) & 0x3f);
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ves1820_writereg(state, 0x0d, BDRI);
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ves1820_writereg(state, 0x0e, SFIL);
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return 0;
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}
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static int ves1820_init(struct dvb_frontend* fe)
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{
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2005-05-17 08:54:31 +04:00
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struct ves1820_state* state = fe->demodulator_priv;
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2005-04-17 02:20:36 +04:00
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int i;
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ves1820_writereg(state, 0, 0);
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2005-09-10 00:02:34 +04:00
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for (i = 0; i < sizeof(ves1820_inittab); i++)
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ves1820_writereg(state, i, ves1820_inittab[i]);
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if (state->config->selagc)
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ves1820_writereg(state, 2, ves1820_inittab[2] | 0x08);
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2005-04-17 02:20:36 +04:00
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ves1820_writereg(state, 0x34, state->pwm);
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return 0;
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}
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2011-12-26 22:09:31 +04:00
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static int ves1820_set_parameters(struct dvb_frontend *fe)
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2005-04-17 02:20:36 +04:00
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{
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2011-12-26 22:09:31 +04:00
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struct dtv_frontend_properties *p = &fe->dtv_property_cache;
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2005-05-17 08:54:31 +04:00
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struct ves1820_state* state = fe->demodulator_priv;
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2005-04-17 02:20:36 +04:00
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static const u8 reg0x00[] = { 0x00, 0x04, 0x08, 0x0c, 0x10 };
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static const u8 reg0x01[] = { 140, 140, 106, 100, 92 };
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static const u8 reg0x05[] = { 135, 100, 70, 54, 38 };
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static const u8 reg0x08[] = { 162, 116, 67, 52, 35 };
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static const u8 reg0x09[] = { 145, 150, 106, 126, 107 };
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2011-12-26 22:09:31 +04:00
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int real_qam = p->modulation - QAM_16;
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2005-04-17 02:20:36 +04:00
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if (real_qam < 0 || real_qam > 4)
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return -EINVAL;
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2006-05-14 12:01:31 +04:00
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if (fe->ops.tuner_ops.set_params) {
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2011-12-24 19:24:33 +04:00
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fe->ops.tuner_ops.set_params(fe);
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2006-05-14 12:01:31 +04:00
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if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
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2006-04-19 00:47:10 +04:00
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}
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2011-12-26 22:09:31 +04:00
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ves1820_set_symbolrate(state, p->symbol_rate);
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2005-04-17 02:20:36 +04:00
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ves1820_writereg(state, 0x34, state->pwm);
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ves1820_writereg(state, 0x01, reg0x01[real_qam]);
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ves1820_writereg(state, 0x05, reg0x05[real_qam]);
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ves1820_writereg(state, 0x08, reg0x08[real_qam]);
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ves1820_writereg(state, 0x09, reg0x09[real_qam]);
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ves1820_setup_reg0(state, reg0x00[real_qam], p->inversion);
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2005-09-10 00:02:34 +04:00
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ves1820_writereg(state, 2, ves1820_inittab[2] | (state->config->selagc ? 0x08 : 0));
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2005-04-17 02:20:36 +04:00
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return 0;
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}
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2015-06-07 20:53:52 +03:00
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static int ves1820_read_status(struct dvb_frontend *fe,
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enum fe_status *status)
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2005-04-17 02:20:36 +04:00
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{
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2005-05-17 08:54:31 +04:00
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struct ves1820_state* state = fe->demodulator_priv;
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2005-04-17 02:20:36 +04:00
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int sync;
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*status = 0;
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sync = ves1820_readreg(state, 0x11);
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if (sync & 1)
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*status |= FE_HAS_SIGNAL;
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if (sync & 2)
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*status |= FE_HAS_CARRIER;
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if (sync & 2) /* XXX FIXME! */
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*status |= FE_HAS_VITERBI;
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if (sync & 4)
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*status |= FE_HAS_SYNC;
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if (sync & 8)
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*status |= FE_HAS_LOCK;
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return 0;
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}
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static int ves1820_read_ber(struct dvb_frontend* fe, u32* ber)
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{
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2005-05-17 08:54:31 +04:00
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struct ves1820_state* state = fe->demodulator_priv;
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2005-04-17 02:20:36 +04:00
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u32 _ber = ves1820_readreg(state, 0x14) |
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(ves1820_readreg(state, 0x15) << 8) |
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((ves1820_readreg(state, 0x16) & 0x0f) << 16);
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*ber = 10 * _ber;
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return 0;
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}
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static int ves1820_read_signal_strength(struct dvb_frontend* fe, u16* strength)
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{
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2005-05-17 08:54:31 +04:00
|
|
|
struct ves1820_state* state = fe->demodulator_priv;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
u8 gain = ves1820_readreg(state, 0x17);
|
|
|
|
*strength = (gain << 8) | gain;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ves1820_read_snr(struct dvb_frontend* fe, u16* snr)
|
|
|
|
{
|
2005-05-17 08:54:31 +04:00
|
|
|
struct ves1820_state* state = fe->demodulator_priv;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
u8 quality = ~ves1820_readreg(state, 0x18);
|
|
|
|
*snr = (quality << 8) | quality;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ves1820_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
|
|
|
|
{
|
2005-05-17 08:54:31 +04:00
|
|
|
struct ves1820_state* state = fe->demodulator_priv;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
*ucblocks = ves1820_readreg(state, 0x13) & 0x7f;
|
|
|
|
if (*ucblocks == 0x7f)
|
|
|
|
*ucblocks = 0xffffffff;
|
|
|
|
|
|
|
|
/* reset uncorrected block counter */
|
|
|
|
ves1820_writereg(state, 0x10, ves1820_inittab[0x10] & 0xdf);
|
|
|
|
ves1820_writereg(state, 0x10, ves1820_inittab[0x10]);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-02-04 17:58:30 +03:00
|
|
|
static int ves1820_get_frontend(struct dvb_frontend *fe,
|
|
|
|
struct dtv_frontend_properties *p)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2005-05-17 08:54:31 +04:00
|
|
|
struct ves1820_state* state = fe->demodulator_priv;
|
2005-04-17 02:20:36 +04:00
|
|
|
int sync;
|
|
|
|
s8 afc = 0;
|
|
|
|
|
|
|
|
sync = ves1820_readreg(state, 0x11);
|
|
|
|
afc = ves1820_readreg(state, 0x19);
|
|
|
|
if (verbose) {
|
|
|
|
/* AFC only valid when carrier has been recovered */
|
|
|
|
printk(sync & 2 ? "ves1820: AFC (%d) %dHz\n" :
|
2011-12-26 22:09:31 +04:00
|
|
|
"ves1820: [AFC (%d) %dHz]\n", afc, -((s32) p->symbol_rate * afc) >> 10);
|
2005-04-17 02:20:36 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
if (!state->config->invert) {
|
|
|
|
p->inversion = (state->reg0 & 0x20) ? INVERSION_ON : INVERSION_OFF;
|
|
|
|
} else {
|
|
|
|
p->inversion = (!(state->reg0 & 0x20)) ? INVERSION_ON : INVERSION_OFF;
|
|
|
|
}
|
|
|
|
|
2011-12-26 22:09:31 +04:00
|
|
|
p->modulation = ((state->reg0 >> 2) & 7) + QAM_16;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2011-12-26 22:09:31 +04:00
|
|
|
p->fec_inner = FEC_NONE;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
p->frequency = ((p->frequency + 31250) / 62500) * 62500;
|
|
|
|
if (sync & 2)
|
2011-12-26 22:09:31 +04:00
|
|
|
p->frequency -= ((s32) p->symbol_rate * afc) >> 10;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ves1820_sleep(struct dvb_frontend* fe)
|
|
|
|
{
|
2005-05-17 08:54:31 +04:00
|
|
|
struct ves1820_state* state = fe->demodulator_priv;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
ves1820_writereg(state, 0x1b, 0x02); /* pdown ADC */
|
|
|
|
ves1820_writereg(state, 0x00, 0x80); /* standby */
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int ves1820_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
|
|
|
|
{
|
|
|
|
|
|
|
|
fesettings->min_delay_ms = 200;
|
|
|
|
fesettings->step_size = 0;
|
|
|
|
fesettings->max_drift = 0;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void ves1820_release(struct dvb_frontend* fe)
|
|
|
|
{
|
2005-05-17 08:54:31 +04:00
|
|
|
struct ves1820_state* state = fe->demodulator_priv;
|
2005-04-17 02:20:36 +04:00
|
|
|
kfree(state);
|
|
|
|
}
|
|
|
|
|
2016-08-10 00:32:21 +03:00
|
|
|
static const struct dvb_frontend_ops ves1820_ops;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
struct dvb_frontend* ves1820_attach(const struct ves1820_config* config,
|
|
|
|
struct i2c_adapter* i2c,
|
|
|
|
u8 pwm)
|
|
|
|
{
|
|
|
|
struct ves1820_state* state = NULL;
|
|
|
|
|
|
|
|
/* allocate memory for the internal state */
|
2009-08-11 05:51:01 +04:00
|
|
|
state = kzalloc(sizeof(struct ves1820_state), GFP_KERNEL);
|
2005-04-17 02:20:36 +04:00
|
|
|
if (state == NULL)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
/* setup the state */
|
|
|
|
state->reg0 = ves1820_inittab[0];
|
|
|
|
state->config = config;
|
|
|
|
state->i2c = i2c;
|
|
|
|
state->pwm = pwm;
|
|
|
|
|
|
|
|
/* check if the demod is there */
|
|
|
|
if ((ves1820_readreg(state, 0x1a) & 0xf0) != 0x70)
|
|
|
|
goto error;
|
|
|
|
|
|
|
|
if (verbose)
|
|
|
|
printk("ves1820: pwm=0x%02x\n", state->pwm);
|
|
|
|
|
|
|
|
/* create dvb_frontend */
|
2006-05-14 12:01:31 +04:00
|
|
|
memcpy(&state->frontend.ops, &ves1820_ops, sizeof(struct dvb_frontend_ops));
|
|
|
|
state->frontend.ops.info.symbol_rate_min = (state->config->xin / 2) / 64; /* SACLK/64 == (XIN/2)/64 */
|
|
|
|
state->frontend.ops.info.symbol_rate_max = (state->config->xin / 2) / 4; /* SACLK/4 */
|
2005-04-17 02:20:36 +04:00
|
|
|
state->frontend.demodulator_priv = state;
|
2006-05-14 12:01:31 +04:00
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
return &state->frontend;
|
|
|
|
|
|
|
|
error:
|
|
|
|
kfree(state);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2016-08-10 00:32:21 +03:00
|
|
|
static const struct dvb_frontend_ops ves1820_ops = {
|
2011-12-26 22:09:31 +04:00
|
|
|
.delsys = { SYS_DVBC_ANNEX_A },
|
2005-04-17 02:20:36 +04:00
|
|
|
.info = {
|
|
|
|
.name = "VLSI VES1820 DVB-C",
|
2018-07-06 01:59:36 +03:00
|
|
|
.frequency_min_hz = 47 * MHz,
|
|
|
|
.frequency_max_hz = 862 * MHz,
|
|
|
|
.frequency_stepsize_hz = 62500,
|
2005-04-17 02:20:36 +04:00
|
|
|
.caps = FE_CAN_QAM_16 |
|
|
|
|
FE_CAN_QAM_32 |
|
|
|
|
FE_CAN_QAM_64 |
|
|
|
|
FE_CAN_QAM_128 |
|
|
|
|
FE_CAN_QAM_256 |
|
|
|
|
FE_CAN_FEC_AUTO
|
|
|
|
},
|
|
|
|
|
|
|
|
.release = ves1820_release,
|
|
|
|
|
|
|
|
.init = ves1820_init,
|
|
|
|
.sleep = ves1820_sleep,
|
|
|
|
|
2011-12-26 22:09:31 +04:00
|
|
|
.set_frontend = ves1820_set_parameters,
|
|
|
|
.get_frontend = ves1820_get_frontend,
|
2005-04-17 02:20:36 +04:00
|
|
|
.get_tune_settings = ves1820_get_tune_settings,
|
|
|
|
|
|
|
|
.read_status = ves1820_read_status,
|
|
|
|
.read_ber = ves1820_read_ber,
|
|
|
|
.read_signal_strength = ves1820_read_signal_strength,
|
|
|
|
.read_snr = ves1820_read_snr,
|
|
|
|
.read_ucblocks = ves1820_read_ucblocks,
|
|
|
|
};
|
|
|
|
|
|
|
|
module_param(verbose, int, 0644);
|
|
|
|
MODULE_PARM_DESC(verbose, "print AFC offset after tuning for debugging the PWM setting");
|
|
|
|
|
|
|
|
MODULE_DESCRIPTION("VLSI VES1820 DVB-C Demodulator driver");
|
|
|
|
MODULE_AUTHOR("Ralph Metzler, Holger Waechtler");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
|
|
|
|
EXPORT_SYMBOL(ves1820_attach);
|