2005-06-24 09:01:16 +04:00
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/*
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* linux/arch/xtensa/kernel/irq.c
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*
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* Xtensa built-in interrupt controller and some generic functions copied
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* from i386.
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*
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2006-12-10 13:18:47 +03:00
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* Copyright (C) 2002 - 2006 Tensilica, Inc.
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2005-06-24 09:01:16 +04:00
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* Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
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*
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*
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* Chris Zankel <chris@zankel.net>
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* Kevin Chea
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*
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*/
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#include <linux/module.h>
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#include <linux/seq_file.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/kernel_stat.h>
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#include <asm/uaccess.h>
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#include <asm/platform.h>
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static unsigned int cached_irq_mask;
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atomic_t irq_err_count;
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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* each architecture has to answer this themselves.
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*/
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void ack_bad_irq(unsigned int irq)
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{
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printk("unexpected IRQ trap at vector %02x\n", irq);
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}
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/*
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* do_IRQ handles all normal device IRQ's (the special
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* SMP cross-CPU interrupts have their own specific
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* handlers).
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*/
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2006-12-10 13:18:47 +03:00
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asmlinkage void do_IRQ(int irq, struct pt_regs *regs)
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2005-06-24 09:01:16 +04:00
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{
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2006-12-10 13:18:47 +03:00
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struct pt_regs *old_regs = set_irq_regs(regs);
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struct irq_desc *desc = irq_desc + irq;
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if (irq >= NR_IRQS) {
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printk(KERN_EMERG "%s: cannot handle IRQ %d\n",
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2008-07-30 23:48:54 +04:00
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__func__, irq);
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2006-12-10 13:18:47 +03:00
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}
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2005-06-24 09:01:16 +04:00
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irq_enter();
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#ifdef CONFIG_DEBUG_STACKOVERFLOW
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/* Debugging check for stack overflow: is there less than 1KB free? */
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{
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unsigned long sp;
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__asm__ __volatile__ ("mov %0, a1\n" : "=a" (sp));
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sp &= THREAD_SIZE - 1;
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if (unlikely(sp < (sizeof(thread_info) + 1024)))
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printk("Stack overflow in do_IRQ: %ld\n",
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sp - sizeof(struct thread_info));
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}
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#endif
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2006-12-10 13:18:47 +03:00
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desc->handle_irq(irq, desc);
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2005-06-24 09:01:16 +04:00
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irq_exit();
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2006-12-10 13:18:47 +03:00
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set_irq_regs(old_regs);
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2005-06-24 09:01:16 +04:00
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}
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/*
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* Generic, controller-independent functions:
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*/
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int show_interrupts(struct seq_file *p, void *v)
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{
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int i = *(loff_t *) v, j;
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struct irqaction * action;
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unsigned long flags;
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if (i == 0) {
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seq_printf(p, " ");
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2006-03-23 14:01:05 +03:00
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for_each_online_cpu(j)
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seq_printf(p, "CPU%d ",j);
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2005-06-24 09:01:16 +04:00
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seq_putc(p, '\n');
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}
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if (i < NR_IRQS) {
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spin_lock_irqsave(&irq_desc[i].lock, flags);
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action = irq_desc[i].action;
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if (!action)
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goto skip;
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seq_printf(p, "%3d: ",i);
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#ifndef CONFIG_SMP
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seq_printf(p, "%10u ", kstat_irqs(i));
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#else
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2006-03-23 14:01:05 +03:00
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for_each_online_cpu(j)
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2009-01-11 11:29:15 +03:00
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seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
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2005-06-24 09:01:16 +04:00
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#endif
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[PATCH] genirq: rename desc->handler to desc->chip
This patch-queue improves the generic IRQ layer to be truly generic, by adding
various abstractions and features to it, without impacting existing
functionality.
While the queue can be best described as "fix and improve everything in the
generic IRQ layer that we could think of", and thus it consists of many
smaller features and lots of cleanups, the one feature that stands out most is
the new 'irq chip' abstraction.
The irq-chip abstraction is about describing and coding and IRQ controller
driver by mapping its raw hardware capabilities [and quirks, if needed] in a
straightforward way, without having to think about "IRQ flow"
(level/edge/etc.) type of details.
This stands in contrast with the current 'irq-type' model of genirq
architectures, which 'mixes' raw hardware capabilities with 'flow' details.
The patchset supports both types of irq controller designs at once, and
converts i386 and x86_64 to the new irq-chip design.
As a bonus side-effect of the irq-chip approach, chained interrupt controllers
(master/slave PIC constructs, etc.) are now supported by design as well.
The end result of this patchset intends to be simpler architecture-level code
and more consolidation between architectures.
We reused many bits of code and many concepts from Russell King's ARM IRQ
layer, the merging of which was one of the motivations for this patchset.
This patch:
rename desc->handler to desc->chip.
Originally i did not want to do this, because it's a big patch. But having
both "desc->handler", "desc->handle_irq" and "action->handler" caused a
large degree of confusion and made the code appear alot less clean than it
truly is.
I have also attempted a dual approach as well by introducing a
desc->chip alias - but that just wasnt robust enough and broke
frequently.
So lets get over with this quickly. The conversion was done automatically
via scripts and converts all the code in the kernel.
This renaming patch is the first one amongst the patches, so that the
remaining patches can stay flexible and can be merged and split up
without having some big monolithic patch act as a merge barrier.
[akpm@osdl.org: build fix]
[akpm@osdl.org: another build fix]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2006-06-29 13:24:36 +04:00
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seq_printf(p, " %14s", irq_desc[i].chip->typename);
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2005-06-24 09:01:16 +04:00
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seq_printf(p, " %s", action->name);
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for (action=action->next; action; action = action->next)
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seq_printf(p, ", %s", action->name);
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seq_putc(p, '\n');
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skip:
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spin_unlock_irqrestore(&irq_desc[i].lock, flags);
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} else if (i == NR_IRQS) {
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seq_printf(p, "NMI: ");
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2006-03-23 14:01:05 +03:00
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for_each_online_cpu(j)
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seq_printf(p, "%10u ", nmi_count(j));
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2005-06-24 09:01:16 +04:00
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seq_putc(p, '\n');
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seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
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}
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return 0;
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}
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2006-12-10 13:18:47 +03:00
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static void xtensa_irq_mask(unsigned int irq)
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2005-06-24 09:01:16 +04:00
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{
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cached_irq_mask &= ~(1 << irq);
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set_sr (cached_irq_mask, INTENABLE);
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}
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2006-12-10 13:18:47 +03:00
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static void xtensa_irq_unmask(unsigned int irq)
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2005-06-24 09:01:16 +04:00
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{
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cached_irq_mask |= 1 << irq;
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set_sr (cached_irq_mask, INTENABLE);
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}
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2006-12-10 13:18:47 +03:00
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static void xtensa_irq_ack(unsigned int irq)
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2005-06-24 09:01:16 +04:00
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{
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2006-12-10 13:18:47 +03:00
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set_sr(1 << irq, INTCLEAR);
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2005-06-24 09:01:16 +04:00
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}
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2006-12-10 13:18:47 +03:00
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static int xtensa_irq_retrigger(unsigned int irq)
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2005-06-24 09:01:16 +04:00
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{
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2006-12-10 13:18:47 +03:00
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set_sr (1 << irq, INTSET);
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return 1;
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2005-06-24 09:01:16 +04:00
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}
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2006-12-10 13:18:47 +03:00
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static struct irq_chip xtensa_irq_chip = {
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.name = "xtensa",
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.mask = xtensa_irq_mask,
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.unmask = xtensa_irq_unmask,
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.ack = xtensa_irq_ack,
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.retrigger = xtensa_irq_retrigger,
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};
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2005-06-24 09:01:16 +04:00
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void __init init_IRQ(void)
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{
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2006-12-10 13:18:47 +03:00
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int index;
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2005-06-24 09:01:16 +04:00
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2006-12-10 13:18:47 +03:00
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for (index = 0; index < XTENSA_NR_IRQS; index++) {
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int mask = 1 << index;
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2005-06-24 09:01:16 +04:00
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2006-12-10 13:18:47 +03:00
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if (mask & XCHAL_INTTYPE_MASK_SOFTWARE)
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_simple_irq);
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2005-06-24 09:01:16 +04:00
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2006-12-10 13:18:47 +03:00
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else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE)
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_edge_irq);
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else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL)
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_level_irq);
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else if (mask & XCHAL_INTTYPE_MASK_TIMER)
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_edge_irq);
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else /* XCHAL_INTTYPE_MASK_WRITE_ERROR */
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/* XCHAL_INTTYPE_MASK_NMI */
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set_irq_chip_and_handler(index, &xtensa_irq_chip,
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handle_level_irq);
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}
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cached_irq_mask = 0;
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2005-06-24 09:01:16 +04:00
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}
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