2017-01-09 18:55:19 +03:00
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/*
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* Shared Memory Communications over RDMA (SMC-R) and RoCE
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*
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* Work Requests exploiting Infiniband API
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*
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* Work requests (WR) of type ib_post_send or ib_post_recv respectively
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* are submitted to either RC SQ or RC RQ respectively
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* (reliably connected send/receive queue)
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* and become work queue entries (WQEs).
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* While an SQ WR/WQE is pending, we track it until transmission completion.
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* Through a send or receive completion queue (CQ) respectively,
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* we get completion queue entries (CQEs) [aka work completions (WCs)].
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* Since the CQ callback is called from IRQ context, we split work by using
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* bottom halves implemented by tasklets.
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*
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* SMC uses this to exchange LLC (link layer control)
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* and CDC (connection data control) messages.
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*
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* Copyright IBM Corp. 2016
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*
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* Author(s): Steffen Maier <maier@linux.vnet.ibm.com>
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*/
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#include <linux/atomic.h>
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#include <linux/hashtable.h>
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#include <linux/wait.h>
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#include <rdma/ib_verbs.h>
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#include <asm/div64.h>
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#include "smc.h"
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#include "smc_wr.h"
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#define SMC_WR_MAX_POLL_CQE 10 /* max. # of compl. queue elements in 1 poll */
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#define SMC_WR_RX_HASH_BITS 4
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static DEFINE_HASHTABLE(smc_wr_rx_hash, SMC_WR_RX_HASH_BITS);
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static DEFINE_SPINLOCK(smc_wr_rx_hash_lock);
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struct smc_wr_tx_pend { /* control data for a pending send request */
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u64 wr_id; /* work request id sent */
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smc_wr_tx_handler handler;
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enum ib_wc_status wc_status; /* CQE status */
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struct smc_link *link;
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u32 idx;
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struct smc_wr_tx_pend_priv priv;
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};
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/******************************** send queue *********************************/
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/*------------------------------- completion --------------------------------*/
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static inline int smc_wr_tx_find_pending_index(struct smc_link *link, u64 wr_id)
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{
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u32 i;
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for (i = 0; i < link->wr_tx_cnt; i++) {
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if (link->wr_tx_pends[i].wr_id == wr_id)
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return i;
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}
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return link->wr_tx_cnt;
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}
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static inline void smc_wr_tx_process_cqe(struct ib_wc *wc)
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{
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struct smc_wr_tx_pend pnd_snd;
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struct smc_link *link;
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u32 pnd_snd_idx;
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int i;
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link = wc->qp->qp_context;
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pnd_snd_idx = smc_wr_tx_find_pending_index(link, wc->wr_id);
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if (pnd_snd_idx == link->wr_tx_cnt)
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return;
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link->wr_tx_pends[pnd_snd_idx].wc_status = wc->status;
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memcpy(&pnd_snd, &link->wr_tx_pends[pnd_snd_idx], sizeof(pnd_snd));
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/* clear the full struct smc_wr_tx_pend including .priv */
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memset(&link->wr_tx_pends[pnd_snd_idx], 0,
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sizeof(link->wr_tx_pends[pnd_snd_idx]));
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memset(&link->wr_tx_bufs[pnd_snd_idx], 0,
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sizeof(link->wr_tx_bufs[pnd_snd_idx]));
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if (!test_and_clear_bit(pnd_snd_idx, link->wr_tx_mask))
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return;
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if (wc->status) {
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2017-01-09 18:55:25 +03:00
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struct smc_link_group *lgr;
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2017-01-09 18:55:19 +03:00
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for_each_set_bit(i, link->wr_tx_mask, link->wr_tx_cnt) {
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/* clear full struct smc_wr_tx_pend including .priv */
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memset(&link->wr_tx_pends[i], 0,
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sizeof(link->wr_tx_pends[i]));
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memset(&link->wr_tx_bufs[i], 0,
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sizeof(link->wr_tx_bufs[i]));
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clear_bit(i, link->wr_tx_mask);
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}
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2017-01-09 18:55:25 +03:00
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/* terminate connections of this link group abnormally */
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lgr = container_of(link, struct smc_link_group,
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lnk[SMC_SINGLE_LINK]);
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smc_lgr_terminate(lgr);
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2017-01-09 18:55:19 +03:00
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}
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if (pnd_snd.handler)
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pnd_snd.handler(&pnd_snd.priv, link, wc->status);
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wake_up(&link->wr_tx_wait);
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}
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static void smc_wr_tx_tasklet_fn(unsigned long data)
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{
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struct smc_ib_device *dev = (struct smc_ib_device *)data;
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struct ib_wc wc[SMC_WR_MAX_POLL_CQE];
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int i = 0, rc;
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int polled = 0;
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again:
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polled++;
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do {
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rc = ib_poll_cq(dev->roce_cq_send, SMC_WR_MAX_POLL_CQE, wc);
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if (polled == 1) {
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ib_req_notify_cq(dev->roce_cq_send,
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IB_CQ_NEXT_COMP |
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IB_CQ_REPORT_MISSED_EVENTS);
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}
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if (!rc)
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break;
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for (i = 0; i < rc; i++)
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smc_wr_tx_process_cqe(&wc[i]);
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} while (rc > 0);
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if (polled == 1)
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goto again;
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}
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void smc_wr_tx_cq_handler(struct ib_cq *ib_cq, void *cq_context)
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{
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struct smc_ib_device *dev = (struct smc_ib_device *)cq_context;
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tasklet_schedule(&dev->send_tasklet);
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}
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/*---------------------------- request submission ---------------------------*/
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static inline int smc_wr_tx_get_free_slot_index(struct smc_link *link, u32 *idx)
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{
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*idx = link->wr_tx_cnt;
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for_each_clear_bit(*idx, link->wr_tx_mask, link->wr_tx_cnt) {
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if (!test_and_set_bit(*idx, link->wr_tx_mask))
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return 0;
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}
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*idx = link->wr_tx_cnt;
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return -EBUSY;
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}
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/**
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* smc_wr_tx_get_free_slot() - returns buffer for message assembly,
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* and sets info for pending transmit tracking
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* @link: Pointer to smc_link used to later send the message.
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* @handler: Send completion handler function pointer.
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* @wr_buf: Out value returns pointer to message buffer.
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* @wr_pend_priv: Out value returns pointer serving as handler context.
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*
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* Return: 0 on success, or -errno on error.
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*/
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int smc_wr_tx_get_free_slot(struct smc_link *link,
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smc_wr_tx_handler handler,
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struct smc_wr_buf **wr_buf,
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struct smc_wr_tx_pend_priv **wr_pend_priv)
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{
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struct smc_wr_tx_pend *wr_pend;
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struct ib_send_wr *wr_ib;
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u64 wr_id;
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u32 idx;
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int rc;
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*wr_buf = NULL;
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*wr_pend_priv = NULL;
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if (in_softirq()) {
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rc = smc_wr_tx_get_free_slot_index(link, &idx);
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if (rc)
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return rc;
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} else {
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rc = wait_event_interruptible_timeout(
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link->wr_tx_wait,
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(smc_wr_tx_get_free_slot_index(link, &idx) != -EBUSY),
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SMC_WR_TX_WAIT_FREE_SLOT_TIME);
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if (!rc) {
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2017-01-09 18:55:25 +03:00
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/* timeout - terminate connections */
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struct smc_link_group *lgr;
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lgr = container_of(link, struct smc_link_group,
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lnk[SMC_SINGLE_LINK]);
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smc_lgr_terminate(lgr);
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2017-01-09 18:55:19 +03:00
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return -EPIPE;
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}
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if (rc == -ERESTARTSYS)
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return -EINTR;
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if (idx == link->wr_tx_cnt)
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return -EPIPE;
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}
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wr_id = smc_wr_tx_get_next_wr_id(link);
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wr_pend = &link->wr_tx_pends[idx];
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wr_pend->wr_id = wr_id;
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wr_pend->handler = handler;
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wr_pend->link = link;
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wr_pend->idx = idx;
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wr_ib = &link->wr_tx_ibs[idx];
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wr_ib->wr_id = wr_id;
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*wr_buf = &link->wr_tx_bufs[idx];
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*wr_pend_priv = &wr_pend->priv;
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return 0;
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}
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int smc_wr_tx_put_slot(struct smc_link *link,
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struct smc_wr_tx_pend_priv *wr_pend_priv)
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{
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struct smc_wr_tx_pend *pend;
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pend = container_of(wr_pend_priv, struct smc_wr_tx_pend, priv);
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if (pend->idx < link->wr_tx_cnt) {
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/* clear the full struct smc_wr_tx_pend including .priv */
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memset(&link->wr_tx_pends[pend->idx], 0,
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sizeof(link->wr_tx_pends[pend->idx]));
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memset(&link->wr_tx_bufs[pend->idx], 0,
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sizeof(link->wr_tx_bufs[pend->idx]));
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test_and_clear_bit(pend->idx, link->wr_tx_mask);
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return 1;
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}
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return 0;
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}
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/* Send prepared WR slot via ib_post_send.
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* @priv: pointer to smc_wr_tx_pend_priv identifying prepared message buffer
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*/
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int smc_wr_tx_send(struct smc_link *link, struct smc_wr_tx_pend_priv *priv)
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{
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struct ib_send_wr *failed_wr = NULL;
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struct smc_wr_tx_pend *pend;
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int rc;
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ib_req_notify_cq(link->smcibdev->roce_cq_send,
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IB_CQ_SOLICITED_MASK | IB_CQ_REPORT_MISSED_EVENTS);
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pend = container_of(priv, struct smc_wr_tx_pend, priv);
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rc = ib_post_send(link->roce_qp, &link->wr_tx_ibs[pend->idx],
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&failed_wr);
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if (rc)
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smc_wr_tx_put_slot(link, priv);
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return rc;
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}
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2017-01-09 18:55:22 +03:00
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void smc_wr_tx_dismiss_slots(struct smc_link *link, u8 wr_rx_hdr_type,
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smc_wr_tx_filter filter,
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smc_wr_tx_dismisser dismisser,
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unsigned long data)
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{
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struct smc_wr_tx_pend_priv *tx_pend;
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struct smc_wr_rx_hdr *wr_rx;
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int i;
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for_each_set_bit(i, link->wr_tx_mask, link->wr_tx_cnt) {
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wr_rx = (struct smc_wr_rx_hdr *)&link->wr_rx_bufs[i];
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if (wr_rx->type != wr_rx_hdr_type)
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continue;
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tx_pend = &link->wr_tx_pends[i].priv;
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if (filter(tx_pend, data))
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dismisser(tx_pend);
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}
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}
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2017-01-09 18:55:25 +03:00
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bool smc_wr_tx_has_pending(struct smc_link *link, u8 wr_rx_hdr_type,
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smc_wr_tx_filter filter, unsigned long data)
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{
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struct smc_wr_tx_pend_priv *tx_pend;
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struct smc_wr_rx_hdr *wr_rx;
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int i;
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for_each_set_bit(i, link->wr_tx_mask, link->wr_tx_cnt) {
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wr_rx = (struct smc_wr_rx_hdr *)&link->wr_rx_bufs[i];
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if (wr_rx->type != wr_rx_hdr_type)
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continue;
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tx_pend = &link->wr_tx_pends[i].priv;
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if (filter(tx_pend, data))
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return true;
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}
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return false;
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}
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2017-01-09 18:55:19 +03:00
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/****************************** receive queue ********************************/
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int smc_wr_rx_register_handler(struct smc_wr_rx_handler *handler)
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{
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struct smc_wr_rx_handler *h_iter;
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int rc = 0;
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spin_lock(&smc_wr_rx_hash_lock);
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hash_for_each_possible(smc_wr_rx_hash, h_iter, list, handler->type) {
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if (h_iter->type == handler->type) {
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rc = -EEXIST;
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goto out_unlock;
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}
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}
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hash_add(smc_wr_rx_hash, &handler->list, handler->type);
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out_unlock:
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spin_unlock(&smc_wr_rx_hash_lock);
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return rc;
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}
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/* Demultiplex a received work request based on the message type to its handler.
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* Relies on smc_wr_rx_hash having been completely filled before any IB WRs,
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* and not being modified any more afterwards so we don't need to lock it.
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*/
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static inline void smc_wr_rx_demultiplex(struct ib_wc *wc)
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{
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struct smc_link *link = (struct smc_link *)wc->qp->qp_context;
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struct smc_wr_rx_handler *handler;
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struct smc_wr_rx_hdr *wr_rx;
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u64 temp_wr_id;
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u32 index;
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if (wc->byte_len < sizeof(*wr_rx))
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return; /* short message */
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temp_wr_id = wc->wr_id;
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index = do_div(temp_wr_id, link->wr_rx_cnt);
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wr_rx = (struct smc_wr_rx_hdr *)&link->wr_rx_bufs[index];
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hash_for_each_possible(smc_wr_rx_hash, handler, list, wr_rx->type) {
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if (handler->type == wr_rx->type)
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handler->handler(wc, wr_rx);
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}
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}
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static inline void smc_wr_rx_process_cqes(struct ib_wc wc[], int num)
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{
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struct smc_link *link;
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int i;
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for (i = 0; i < num; i++) {
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link = wc[i].qp->qp_context;
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if (wc[i].status == IB_WC_SUCCESS) {
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smc_wr_rx_demultiplex(&wc[i]);
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smc_wr_rx_post(link); /* refill WR RX */
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|
|
|
} else {
|
2017-01-09 18:55:25 +03:00
|
|
|
struct smc_link_group *lgr;
|
|
|
|
|
2017-01-09 18:55:19 +03:00
|
|
|
/* handle status errors */
|
|
|
|
switch (wc[i].status) {
|
|
|
|
case IB_WC_RETRY_EXC_ERR:
|
|
|
|
case IB_WC_RNR_RETRY_EXC_ERR:
|
|
|
|
case IB_WC_WR_FLUSH_ERR:
|
2017-01-09 18:55:25 +03:00
|
|
|
/* terminate connections of this link group
|
|
|
|
* abnormally
|
|
|
|
*/
|
|
|
|
lgr = container_of(link, struct smc_link_group,
|
|
|
|
lnk[SMC_SINGLE_LINK]);
|
|
|
|
smc_lgr_terminate(lgr);
|
2017-01-09 18:55:19 +03:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
smc_wr_rx_post(link); /* refill WR RX */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void smc_wr_rx_tasklet_fn(unsigned long data)
|
|
|
|
{
|
|
|
|
struct smc_ib_device *dev = (struct smc_ib_device *)data;
|
|
|
|
struct ib_wc wc[SMC_WR_MAX_POLL_CQE];
|
|
|
|
int polled = 0;
|
|
|
|
int rc;
|
|
|
|
|
|
|
|
again:
|
|
|
|
polled++;
|
|
|
|
do {
|
|
|
|
memset(&wc, 0, sizeof(wc));
|
|
|
|
rc = ib_poll_cq(dev->roce_cq_recv, SMC_WR_MAX_POLL_CQE, wc);
|
|
|
|
if (polled == 1) {
|
|
|
|
ib_req_notify_cq(dev->roce_cq_recv,
|
|
|
|
IB_CQ_SOLICITED_MASK
|
|
|
|
| IB_CQ_REPORT_MISSED_EVENTS);
|
|
|
|
}
|
|
|
|
if (!rc)
|
|
|
|
break;
|
|
|
|
smc_wr_rx_process_cqes(&wc[0], rc);
|
|
|
|
} while (rc > 0);
|
|
|
|
if (polled == 1)
|
|
|
|
goto again;
|
|
|
|
}
|
|
|
|
|
|
|
|
void smc_wr_rx_cq_handler(struct ib_cq *ib_cq, void *cq_context)
|
|
|
|
{
|
|
|
|
struct smc_ib_device *dev = (struct smc_ib_device *)cq_context;
|
|
|
|
|
|
|
|
tasklet_schedule(&dev->recv_tasklet);
|
|
|
|
}
|
|
|
|
|
|
|
|
int smc_wr_rx_post_init(struct smc_link *link)
|
|
|
|
{
|
|
|
|
u32 i;
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
for (i = 0; i < link->wr_rx_cnt; i++)
|
|
|
|
rc = smc_wr_rx_post(link);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
/***************************** init, exit, misc ******************************/
|
|
|
|
|
|
|
|
void smc_wr_remember_qp_attr(struct smc_link *lnk)
|
|
|
|
{
|
|
|
|
struct ib_qp_attr *attr = &lnk->qp_attr;
|
|
|
|
struct ib_qp_init_attr init_attr;
|
|
|
|
|
|
|
|
memset(attr, 0, sizeof(*attr));
|
|
|
|
memset(&init_attr, 0, sizeof(init_attr));
|
|
|
|
ib_query_qp(lnk->roce_qp, attr,
|
|
|
|
IB_QP_STATE |
|
|
|
|
IB_QP_CUR_STATE |
|
|
|
|
IB_QP_PKEY_INDEX |
|
|
|
|
IB_QP_PORT |
|
|
|
|
IB_QP_QKEY |
|
|
|
|
IB_QP_AV |
|
|
|
|
IB_QP_PATH_MTU |
|
|
|
|
IB_QP_TIMEOUT |
|
|
|
|
IB_QP_RETRY_CNT |
|
|
|
|
IB_QP_RNR_RETRY |
|
|
|
|
IB_QP_RQ_PSN |
|
|
|
|
IB_QP_ALT_PATH |
|
|
|
|
IB_QP_MIN_RNR_TIMER |
|
|
|
|
IB_QP_SQ_PSN |
|
|
|
|
IB_QP_PATH_MIG_STATE |
|
|
|
|
IB_QP_CAP |
|
|
|
|
IB_QP_DEST_QPN,
|
|
|
|
&init_attr);
|
|
|
|
|
|
|
|
lnk->wr_tx_cnt = min_t(size_t, SMC_WR_BUF_CNT,
|
|
|
|
lnk->qp_attr.cap.max_send_wr);
|
|
|
|
lnk->wr_rx_cnt = min_t(size_t, SMC_WR_BUF_CNT * 3,
|
|
|
|
lnk->qp_attr.cap.max_recv_wr);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void smc_wr_init_sge(struct smc_link *lnk)
|
|
|
|
{
|
|
|
|
u32 i;
|
|
|
|
|
|
|
|
for (i = 0; i < lnk->wr_tx_cnt; i++) {
|
|
|
|
lnk->wr_tx_sges[i].addr =
|
|
|
|
lnk->wr_tx_dma_addr + i * SMC_WR_BUF_SIZE;
|
|
|
|
lnk->wr_tx_sges[i].length = SMC_WR_TX_SIZE;
|
2017-01-09 18:55:20 +03:00
|
|
|
lnk->wr_tx_sges[i].lkey = lnk->roce_pd->local_dma_lkey;
|
2017-01-09 18:55:19 +03:00
|
|
|
lnk->wr_tx_ibs[i].next = NULL;
|
|
|
|
lnk->wr_tx_ibs[i].sg_list = &lnk->wr_tx_sges[i];
|
|
|
|
lnk->wr_tx_ibs[i].num_sge = 1;
|
|
|
|
lnk->wr_tx_ibs[i].opcode = IB_WR_SEND;
|
|
|
|
lnk->wr_tx_ibs[i].send_flags =
|
|
|
|
IB_SEND_SIGNALED | IB_SEND_SOLICITED | IB_SEND_INLINE;
|
|
|
|
}
|
|
|
|
for (i = 0; i < lnk->wr_rx_cnt; i++) {
|
|
|
|
lnk->wr_rx_sges[i].addr =
|
|
|
|
lnk->wr_rx_dma_addr + i * SMC_WR_BUF_SIZE;
|
|
|
|
lnk->wr_rx_sges[i].length = SMC_WR_BUF_SIZE;
|
2017-01-09 18:55:20 +03:00
|
|
|
lnk->wr_rx_sges[i].lkey = lnk->roce_pd->local_dma_lkey;
|
2017-01-09 18:55:19 +03:00
|
|
|
lnk->wr_rx_ibs[i].next = NULL;
|
|
|
|
lnk->wr_rx_ibs[i].sg_list = &lnk->wr_rx_sges[i];
|
|
|
|
lnk->wr_rx_ibs[i].num_sge = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void smc_wr_free_link(struct smc_link *lnk)
|
|
|
|
{
|
|
|
|
struct ib_device *ibdev;
|
|
|
|
|
|
|
|
memset(lnk->wr_tx_mask, 0,
|
|
|
|
BITS_TO_LONGS(SMC_WR_BUF_CNT) * sizeof(*lnk->wr_tx_mask));
|
|
|
|
|
|
|
|
if (!lnk->smcibdev)
|
|
|
|
return;
|
|
|
|
ibdev = lnk->smcibdev->ibdev;
|
|
|
|
|
|
|
|
if (lnk->wr_rx_dma_addr) {
|
|
|
|
ib_dma_unmap_single(ibdev, lnk->wr_rx_dma_addr,
|
|
|
|
SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
lnk->wr_rx_dma_addr = 0;
|
|
|
|
}
|
|
|
|
if (lnk->wr_tx_dma_addr) {
|
|
|
|
ib_dma_unmap_single(ibdev, lnk->wr_tx_dma_addr,
|
|
|
|
SMC_WR_BUF_SIZE * lnk->wr_tx_cnt,
|
|
|
|
DMA_TO_DEVICE);
|
|
|
|
lnk->wr_tx_dma_addr = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void smc_wr_free_link_mem(struct smc_link *lnk)
|
|
|
|
{
|
|
|
|
kfree(lnk->wr_tx_pends);
|
|
|
|
lnk->wr_tx_pends = NULL;
|
|
|
|
kfree(lnk->wr_tx_mask);
|
|
|
|
lnk->wr_tx_mask = NULL;
|
|
|
|
kfree(lnk->wr_tx_sges);
|
|
|
|
lnk->wr_tx_sges = NULL;
|
|
|
|
kfree(lnk->wr_rx_sges);
|
|
|
|
lnk->wr_rx_sges = NULL;
|
|
|
|
kfree(lnk->wr_rx_ibs);
|
|
|
|
lnk->wr_rx_ibs = NULL;
|
|
|
|
kfree(lnk->wr_tx_ibs);
|
|
|
|
lnk->wr_tx_ibs = NULL;
|
|
|
|
kfree(lnk->wr_tx_bufs);
|
|
|
|
lnk->wr_tx_bufs = NULL;
|
|
|
|
kfree(lnk->wr_rx_bufs);
|
|
|
|
lnk->wr_rx_bufs = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
int smc_wr_alloc_link_mem(struct smc_link *link)
|
|
|
|
{
|
|
|
|
/* allocate link related memory */
|
|
|
|
link->wr_tx_bufs = kcalloc(SMC_WR_BUF_CNT, SMC_WR_BUF_SIZE, GFP_KERNEL);
|
|
|
|
if (!link->wr_tx_bufs)
|
|
|
|
goto no_mem;
|
|
|
|
link->wr_rx_bufs = kcalloc(SMC_WR_BUF_CNT * 3, SMC_WR_BUF_SIZE,
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!link->wr_rx_bufs)
|
|
|
|
goto no_mem_wr_tx_bufs;
|
|
|
|
link->wr_tx_ibs = kcalloc(SMC_WR_BUF_CNT, sizeof(link->wr_tx_ibs[0]),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!link->wr_tx_ibs)
|
|
|
|
goto no_mem_wr_rx_bufs;
|
|
|
|
link->wr_rx_ibs = kcalloc(SMC_WR_BUF_CNT * 3,
|
|
|
|
sizeof(link->wr_rx_ibs[0]),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!link->wr_rx_ibs)
|
|
|
|
goto no_mem_wr_tx_ibs;
|
|
|
|
link->wr_tx_sges = kcalloc(SMC_WR_BUF_CNT, sizeof(link->wr_tx_sges[0]),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!link->wr_tx_sges)
|
|
|
|
goto no_mem_wr_rx_ibs;
|
|
|
|
link->wr_rx_sges = kcalloc(SMC_WR_BUF_CNT * 3,
|
|
|
|
sizeof(link->wr_rx_sges[0]),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!link->wr_rx_sges)
|
|
|
|
goto no_mem_wr_tx_sges;
|
|
|
|
link->wr_tx_mask = kzalloc(
|
|
|
|
BITS_TO_LONGS(SMC_WR_BUF_CNT) * sizeof(*link->wr_tx_mask),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!link->wr_tx_mask)
|
|
|
|
goto no_mem_wr_rx_sges;
|
|
|
|
link->wr_tx_pends = kcalloc(SMC_WR_BUF_CNT,
|
|
|
|
sizeof(link->wr_tx_pends[0]),
|
|
|
|
GFP_KERNEL);
|
|
|
|
if (!link->wr_tx_pends)
|
|
|
|
goto no_mem_wr_tx_mask;
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
no_mem_wr_tx_mask:
|
|
|
|
kfree(link->wr_tx_mask);
|
|
|
|
no_mem_wr_rx_sges:
|
|
|
|
kfree(link->wr_rx_sges);
|
|
|
|
no_mem_wr_tx_sges:
|
|
|
|
kfree(link->wr_tx_sges);
|
|
|
|
no_mem_wr_rx_ibs:
|
|
|
|
kfree(link->wr_rx_ibs);
|
|
|
|
no_mem_wr_tx_ibs:
|
|
|
|
kfree(link->wr_tx_ibs);
|
|
|
|
no_mem_wr_rx_bufs:
|
|
|
|
kfree(link->wr_rx_bufs);
|
|
|
|
no_mem_wr_tx_bufs:
|
|
|
|
kfree(link->wr_tx_bufs);
|
|
|
|
no_mem:
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
void smc_wr_remove_dev(struct smc_ib_device *smcibdev)
|
|
|
|
{
|
|
|
|
tasklet_kill(&smcibdev->recv_tasklet);
|
|
|
|
tasklet_kill(&smcibdev->send_tasklet);
|
|
|
|
}
|
|
|
|
|
|
|
|
void smc_wr_add_dev(struct smc_ib_device *smcibdev)
|
|
|
|
{
|
|
|
|
tasklet_init(&smcibdev->recv_tasklet, smc_wr_rx_tasklet_fn,
|
|
|
|
(unsigned long)smcibdev);
|
|
|
|
tasklet_init(&smcibdev->send_tasklet, smc_wr_tx_tasklet_fn,
|
|
|
|
(unsigned long)smcibdev);
|
|
|
|
}
|
|
|
|
|
|
|
|
int smc_wr_create_link(struct smc_link *lnk)
|
|
|
|
{
|
|
|
|
struct ib_device *ibdev = lnk->smcibdev->ibdev;
|
|
|
|
int rc = 0;
|
|
|
|
|
|
|
|
smc_wr_tx_set_wr_id(&lnk->wr_tx_id, 0);
|
|
|
|
lnk->wr_rx_id = 0;
|
|
|
|
lnk->wr_rx_dma_addr = ib_dma_map_single(
|
|
|
|
ibdev, lnk->wr_rx_bufs, SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
if (ib_dma_mapping_error(ibdev, lnk->wr_rx_dma_addr)) {
|
|
|
|
lnk->wr_rx_dma_addr = 0;
|
|
|
|
rc = -EIO;
|
|
|
|
goto out;
|
|
|
|
}
|
|
|
|
lnk->wr_tx_dma_addr = ib_dma_map_single(
|
|
|
|
ibdev, lnk->wr_tx_bufs, SMC_WR_BUF_SIZE * lnk->wr_tx_cnt,
|
|
|
|
DMA_TO_DEVICE);
|
|
|
|
if (ib_dma_mapping_error(ibdev, lnk->wr_tx_dma_addr)) {
|
|
|
|
rc = -EIO;
|
|
|
|
goto dma_unmap;
|
|
|
|
}
|
|
|
|
smc_wr_init_sge(lnk);
|
|
|
|
memset(lnk->wr_tx_mask, 0,
|
|
|
|
BITS_TO_LONGS(SMC_WR_BUF_CNT) * sizeof(*lnk->wr_tx_mask));
|
|
|
|
return rc;
|
|
|
|
|
|
|
|
dma_unmap:
|
|
|
|
ib_dma_unmap_single(ibdev, lnk->wr_rx_dma_addr,
|
|
|
|
SMC_WR_BUF_SIZE * lnk->wr_rx_cnt,
|
|
|
|
DMA_FROM_DEVICE);
|
|
|
|
lnk->wr_rx_dma_addr = 0;
|
|
|
|
out:
|
|
|
|
return rc;
|
|
|
|
}
|