2012-02-26 15:12:43 +04:00
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/*
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* at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
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*
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* Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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*
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* Licensed under GPLv2 only.
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*/
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2013-05-14 21:21:50 +04:00
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#include "skeleton.dtsi"
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2013-04-24 04:34:25 +04:00
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#include <dt-bindings/pinctrl/at91.h>
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2013-04-24 04:34:25 +04:00
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#include <dt-bindings/interrupt-controller/irq.h>
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2013-04-24 04:34:25 +04:00
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#include <dt-bindings/gpio/gpio.h>
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2014-06-23 08:03:37 +04:00
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#include <dt-bindings/clock/at91.h>
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2012-02-26 15:12:43 +04:00
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/ {
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model = "Atmel AT91SAM9263 family SoC";
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compatible = "atmel,at91sam9263";
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interrupt-parent = <&aic>;
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aliases {
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serial0 = &dbgu;
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serial1 = &usart0;
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serial2 = &usart1;
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serial3 = &usart2;
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gpio0 = &pioA;
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gpio1 = &pioB;
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gpio2 = &pioC;
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gpio3 = &pioD;
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gpio4 = &pioE;
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tcb0 = &tcb0;
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2012-09-12 10:42:16 +04:00
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i2c0 = &i2c0;
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2012-11-07 07:41:41 +04:00
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ssc0 = &ssc0;
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ssc1 = &ssc1;
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2013-12-19 07:59:17 +04:00
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pwm0 = &pwm0;
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2012-02-26 15:12:43 +04:00
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};
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2014-06-23 08:03:37 +04:00
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2012-02-26 15:12:43 +04:00
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cpus {
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2013-04-18 21:31:35 +04:00
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#address-cells = <0>;
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#size-cells = <0>;
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cpu {
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compatible = "arm,arm926ej-s";
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device_type = "cpu";
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2012-02-26 15:12:43 +04:00
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};
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};
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memory {
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reg = <0x20000000 0x08000000>;
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};
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2014-06-23 08:03:37 +04:00
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clocks {
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main_xtal: main_xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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slow_xtal: slow_xtal {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <0>;
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};
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};
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2012-02-26 15:12:43 +04:00
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ahb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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apb {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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aic: interrupt-controller@fffff000 {
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2012-06-20 18:13:30 +04:00
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#interrupt-cells = <3>;
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2012-02-26 15:12:43 +04:00
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compatible = "atmel,at91rm9200-aic";
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interrupt-controller;
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reg = <0xfffff000 0x200>;
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2012-04-09 15:36:36 +04:00
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atmel,external-irqs = <30 31>;
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2012-02-26 15:12:43 +04:00
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};
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pmc: pmc@fffffc00 {
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compatible = "atmel,at91rm9200-pmc";
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reg = <0xfffffc00 0x100>;
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2014-06-23 08:03:37 +04:00
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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interrupt-controller;
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#address-cells = <1>;
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#size-cells = <0>;
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#interrupt-cells = <1>;
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main_osc: main_osc {
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compatible = "atmel,at91rm9200-clk-main-osc";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_MOSCS>;
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clocks = <&main_xtal>;
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};
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main: mainck {
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compatible = "atmel,at91rm9200-clk-main";
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#clock-cells = <0>;
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clocks = <&main_osc>;
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};
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plla: pllack {
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compatible = "atmel,at91rm9200-clk-pll";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_LOCKA>;
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clocks = <&main>;
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reg = <0>;
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atmel,clk-input-range = <1000000 32000000>;
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#atmel,pll-clk-output-range-cells = <4>;
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atmel,pll-clk-output-ranges = <80000000 200000000 0 1>,
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<190000000 240000000 2 1>;
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};
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pllb: pllbck {
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compatible = "atmel,at91rm9200-clk-pll";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_LOCKB>;
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clocks = <&main>;
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reg = <1>;
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atmel,clk-input-range = <1000000 5000000>;
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#atmel,pll-clk-output-range-cells = <4>;
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atmel,pll-clk-output-ranges = <70000000 130000000 1 1>;
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};
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mck: masterck {
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compatible = "atmel,at91rm9200-clk-master";
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#clock-cells = <0>;
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interrupts-extended = <&pmc AT91_PMC_MCKRDY>;
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clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
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atmel,clk-output-range = <0 120000000>;
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atmel,clk-divisors = <1 2 4 0>;
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};
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usb: usbck {
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compatible = "atmel,at91rm9200-clk-usb";
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#clock-cells = <0>;
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atmel,clk-divisors = <1 2 4 0>;
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clocks = <&pllb>;
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};
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prog: progck {
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compatible = "atmel,at91rm9200-clk-programmable";
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-parent = <&pmc>;
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clocks = <&slow_xtal>, <&main>, <&plla>, <&pllb>;
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prog0: prog0 {
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#clock-cells = <0>;
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reg = <0>;
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interrupts = <AT91_PMC_PCKRDY(0)>;
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};
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prog1: prog1 {
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#clock-cells = <0>;
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reg = <1>;
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interrupts = <AT91_PMC_PCKRDY(1)>;
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};
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prog2: prog2 {
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#clock-cells = <0>;
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reg = <2>;
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interrupts = <AT91_PMC_PCKRDY(2)>;
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};
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prog3: prog3 {
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#clock-cells = <0>;
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reg = <3>;
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interrupts = <AT91_PMC_PCKRDY(3)>;
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};
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};
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systemck {
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compatible = "atmel,at91rm9200-clk-system";
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#address-cells = <1>;
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#size-cells = <0>;
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uhpck: uhpck {
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#clock-cells = <0>;
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reg = <6>;
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clocks = <&usb>;
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};
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udpck: udpck {
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#clock-cells = <0>;
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reg = <7>;
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clocks = <&usb>;
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};
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pck0: pck0 {
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#clock-cells = <0>;
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reg = <8>;
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clocks = <&prog0>;
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};
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pck1: pck1 {
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#clock-cells = <0>;
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reg = <9>;
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clocks = <&prog1>;
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};
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pck2: pck2 {
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#clock-cells = <0>;
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reg = <10>;
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clocks = <&prog2>;
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};
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pck3: pck3 {
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#clock-cells = <0>;
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reg = <11>;
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clocks = <&prog3>;
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};
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};
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periphck {
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compatible = "atmel,at91rm9200-clk-peripheral";
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&mck>;
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pioA_clk: pioA_clk {
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#clock-cells = <0>;
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reg = <2>;
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};
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pioB_clk: pioB_clk {
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#clock-cells = <0>;
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reg = <3>;
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};
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pioCDE_clk: pioCDE_clk {
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#clock-cells = <0>;
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reg = <4>;
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};
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usart0_clk: usart0_clk {
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#clock-cells = <0>;
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reg = <7>;
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};
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usart1_clk: usart1_clk {
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#clock-cells = <0>;
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reg = <8>;
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};
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usart2_clk: usart2_clk {
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#clock-cells = <0>;
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reg = <9>;
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};
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mci0_clk: mci0_clk {
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#clock-cells = <0>;
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reg = <10>;
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};
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mci1_clk: mci1_clk {
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#clock-cells = <0>;
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reg = <11>;
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};
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can_clk: can_clk {
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#clock-cells = <0>;
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reg = <12>;
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};
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twi0_clk: twi0_clk {
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#clock-cells = <0>;
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reg = <13>;
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};
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spi0_clk: spi0_clk {
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#clock-cells = <0>;
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reg = <14>;
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};
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spi1_clk: spi1_clk {
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#clock-cells = <0>;
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reg = <15>;
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};
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ssc0_clk: ssc0_clk {
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#clock-cells = <0>;
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reg = <16>;
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};
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ssc1_clk: ssc1_clk {
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#clock-cells = <0>;
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reg = <17>;
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};
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ac91_clk: ac97_clk {
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#clock-cells = <0>;
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reg = <18>;
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};
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tcb_clk: tcb_clk {
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#clock-cells = <0>;
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reg = <19>;
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};
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pwm_clk: pwm_clk {
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#clock-cells = <0>;
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reg = <20>;
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};
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macb0_clk: macb0_clk {
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#clock-cells = <0>;
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reg = <21>;
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};
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g2de_clk: g2de_clk {
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#clock-cells = <0>;
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reg = <23>;
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};
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udc_clk: udc_clk {
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#clock-cells = <0>;
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reg = <24>;
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};
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isi_clk: isi_clk {
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#clock-cells = <0>;
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reg = <25>;
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};
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lcd_clk: lcd_clk {
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#clock-cells = <0>;
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reg = <26>;
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};
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dma_clk: dma_clk {
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#clock-cells = <0>;
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reg = <27>;
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};
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ohci_clk: ohci_clk {
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#clock-cells = <0>;
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reg = <29>;
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};
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};
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2012-02-26 15:12:43 +04:00
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};
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2014-07-03 14:01:29 +04:00
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ramc0: ramc@ffffe200 {
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2012-02-26 15:12:43 +04:00
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compatible = "atmel,at91sam9260-sdramc";
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2014-07-03 14:01:29 +04:00
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reg = <0xffffe200 0x200>;
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};
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ramc1: ramc@ffffe800 {
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compatible = "atmel,at91sam9260-sdramc";
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reg = <0xffffe800 0x200>;
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2012-02-26 15:12:43 +04:00
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};
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pit: timer@fffffd30 {
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compatible = "atmel,at91sam9260-pit";
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reg = <0xfffffd30 0xf>;
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2013-04-24 04:34:25 +04:00
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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2014-06-23 08:03:37 +04:00
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clocks = <&mck>;
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2012-02-26 15:12:43 +04:00
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};
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tcb0: timer@fff7c000 {
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compatible = "atmel,at91rm9200-tcb";
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reg = <0xfff7c000 0x100>;
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2013-04-24 04:34:25 +04:00
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interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
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2014-06-23 08:03:37 +04:00
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clocks = <&tcb_clk>;
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clock-names = "t0_clk";
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2012-02-26 15:12:43 +04:00
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};
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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};
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shdwc@fffffd10 {
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compatible = "atmel,at91sam9260-shdwc";
|
|
|
|
reg = <0xfffffd10 0x10>;
|
|
|
|
};
|
|
|
|
|
2012-07-04 13:20:46 +04:00
|
|
|
pinctrl@fffff200 {
|
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <1>;
|
|
|
|
compatible = "atmel,at91rm9200-pinctrl", "simple-bus";
|
|
|
|
ranges = <0xfffff200 0xfffff200 0xa00>;
|
|
|
|
|
2012-07-05 12:56:09 +04:00
|
|
|
atmel,mux-mask = <
|
|
|
|
/* A B */
|
|
|
|
0xfffffffb 0xffffe07f /* pioA */
|
|
|
|
0x0007ffff 0x39072fff /* pioB */
|
|
|
|
0xffffffff 0x3ffffff8 /* pioC */
|
|
|
|
0xfffffbff 0xffffffff /* pioD */
|
|
|
|
0xffe00fff 0xfbfcff00 /* pioE */
|
|
|
|
>;
|
|
|
|
|
|
|
|
/* shared pinctrl settings */
|
2012-07-05 12:56:09 +04:00
|
|
|
dbgu {
|
|
|
|
pinctrl_dbgu: dbgu-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC30 periph A */
|
|
|
|
AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PC31 periph with pullup */
|
2012-07-05 12:56:09 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2012-11-19 02:40:01 +04:00
|
|
|
usart0 {
|
|
|
|
pinctrl_usart0: usart0-0 {
|
2012-07-05 12:56:09 +04:00
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA26 periph A with pullup */
|
|
|
|
AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA27 periph A */
|
2012-07-05 12:56:09 +04:00
|
|
|
};
|
|
|
|
|
2012-11-19 03:30:01 +04:00
|
|
|
pinctrl_usart0_rts: usart0_rts-0 {
|
2012-07-05 12:56:09 +04:00
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA28 periph A */
|
2012-11-19 03:30:01 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usart0_cts: usart0_cts-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA29 periph A */
|
2012-07-05 12:56:09 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2012-11-19 02:40:01 +04:00
|
|
|
usart1 {
|
|
|
|
pinctrl_usart1: usart1-0 {
|
2012-07-05 12:56:09 +04:00
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD0 periph A with pullup */
|
|
|
|
AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD1 periph A */
|
2012-07-05 12:56:09 +04:00
|
|
|
};
|
|
|
|
|
2012-11-19 03:30:01 +04:00
|
|
|
pinctrl_usart1_rts: usart1_rts-0 {
|
2012-07-05 12:56:09 +04:00
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD7 periph B */
|
2012-11-19 03:30:01 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usart1_cts: usart1_cts-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD8 periph B */
|
2012-07-05 12:56:09 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2012-11-19 02:40:01 +04:00
|
|
|
usart2 {
|
|
|
|
pinctrl_usart2: usart2-0 {
|
2012-07-05 12:56:09 +04:00
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PD2 periph A with pullup */
|
|
|
|
AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PD3 periph A */
|
2012-07-05 12:56:09 +04:00
|
|
|
};
|
|
|
|
|
2012-11-19 03:30:01 +04:00
|
|
|
pinctrl_usart2_rts: usart2_rts-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD5 periph B */
|
2012-11-19 03:30:01 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_usart2_cts: usart2_cts-0 {
|
2012-07-05 12:56:09 +04:00
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PD6 periph B */
|
2012-07-05 12:56:09 +04:00
|
|
|
};
|
|
|
|
};
|
2012-07-05 12:56:09 +04:00
|
|
|
|
2012-07-12 19:36:52 +04:00
|
|
|
nand {
|
|
|
|
pinctrl_nand: nand-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP /* PA22 gpio RDY pin pull_up*/
|
|
|
|
AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>; /* PD15 gpio enable pin pull_up */
|
2012-07-12 19:36:52 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2012-10-23 06:19:11 +04:00
|
|
|
macb {
|
|
|
|
pinctrl_macb_rmii: macb_rmii-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
|
|
|
|
AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE21 periph A */
|
|
|
|
AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE23 periph A */
|
|
|
|
AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE24 periph A */
|
|
|
|
AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE25 periph A */
|
|
|
|
AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE26 periph A */
|
|
|
|
AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE27 periph A */
|
|
|
|
AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE28 periph A */
|
|
|
|
AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE /* PE29 periph A */
|
|
|
|
AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PE30 periph A */
|
2012-10-23 06:19:11 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC20 periph B */
|
|
|
|
AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC21 periph B */
|
|
|
|
AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC22 periph B */
|
|
|
|
AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC23 periph B */
|
|
|
|
AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC24 periph B */
|
|
|
|
AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC25 periph B */
|
|
|
|
AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC27 periph B */
|
|
|
|
AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PE22 periph B */
|
2012-10-23 06:19:11 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2012-11-16 04:24:17 +04:00
|
|
|
mmc0 {
|
|
|
|
pinctrl_mmc0_clk: mmc0_clk-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA12 periph A */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA1 periph A with pullup */
|
|
|
|
AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA0 periph A with pullup */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA3 periph A with pullup */
|
|
|
|
AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA4 periph A with pullup */
|
|
|
|
AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA5 periph A with pullup */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA16 periph A with pullup */
|
|
|
|
AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA17 periph A with pullup */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA18 periph A with pullup */
|
|
|
|
AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA19 periph A with pullup */
|
|
|
|
AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA20 periph A with pullup */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
mmc1 {
|
|
|
|
pinctrl_mmc1_clk: mmc1_clk-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PA6 periph A */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA7 periph A with pullup */
|
|
|
|
AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA8 periph A with pullup */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA9 periph A with pullup */
|
|
|
|
AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA10 periph A with pullup */
|
|
|
|
AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA11 periph A with pullup */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA21 periph A with pullup */
|
|
|
|
AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA22 periph A with pullup */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA23 periph A with pullup */
|
|
|
|
AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP /* PA24 periph A with pullup */
|
|
|
|
AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>; /* PA25 periph A with pullup */
|
2012-11-16 04:24:17 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2013-01-11 18:08:30 +04:00
|
|
|
ssc0 {
|
|
|
|
pinctrl_ssc0_tx: ssc0_tx-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB0 periph B */
|
|
|
|
AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB1 periph B */
|
|
|
|
AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB2 periph B */
|
2013-01-11 18:08:30 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_ssc0_rx: ssc0_rx-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB3 periph B */
|
|
|
|
AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB4 periph B */
|
|
|
|
AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB5 periph B */
|
2013-01-11 18:08:30 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
ssc1 {
|
|
|
|
pinctrl_ssc1_tx: ssc1_tx-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB6 periph A */
|
|
|
|
AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB7 periph A */
|
|
|
|
AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB8 periph A */
|
2013-01-11 18:08:30 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_ssc1_rx: ssc1_rx-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB9 periph A */
|
|
|
|
AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB10 periph A */
|
|
|
|
AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB11 periph A */
|
2013-01-11 18:08:30 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2013-04-03 10:03:52 +04:00
|
|
|
spi0 {
|
|
|
|
pinctrl_spi0: spi0-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA0 periph B SPI0_MISO pin */
|
|
|
|
AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE /* PA1 periph B SPI0_MOSI pin */
|
|
|
|
AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PA2 periph B SPI0_SPCK pin */
|
2013-04-03 10:03:52 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
|
|
|
spi1 {
|
|
|
|
pinctrl_spi1: spi1-0 {
|
|
|
|
atmel,pins =
|
2013-04-24 04:34:25 +04:00
|
|
|
<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB12 periph A SPI1_MISO pin */
|
|
|
|
AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE /* PB13 periph A SPI1_MOSI pin */
|
|
|
|
AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PB14 periph A SPI1_SPCK pin */
|
2013-04-03 10:03:52 +04:00
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2013-05-24 14:05:56 +04:00
|
|
|
tcb0 {
|
|
|
|
pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
|
|
|
|
atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
|
|
|
|
atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
|
|
|
|
atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
|
|
|
|
atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
|
|
|
|
atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
|
|
|
|
atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
|
|
|
|
atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
|
|
|
|
atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
|
|
|
|
pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
|
|
|
|
atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2013-03-29 00:50:46 +04:00
|
|
|
fb {
|
|
|
|
pinctrl_fb: fb-0 {
|
|
|
|
atmel,pins =
|
|
|
|
<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC1 periph A */
|
|
|
|
AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC2 periph A */
|
|
|
|
AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC3 periph A */
|
|
|
|
AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE /* PB9 periph B */
|
|
|
|
AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC6 periph A */
|
|
|
|
AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC7 periph A */
|
|
|
|
AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC8 periph A */
|
|
|
|
AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC9 periph A */
|
|
|
|
AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC10 periph A */
|
|
|
|
AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC11 periph A */
|
|
|
|
AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC14 periph A */
|
|
|
|
AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC15 periph A */
|
|
|
|
AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC16 periph A */
|
|
|
|
AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC12 periph B */
|
|
|
|
AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC18 periph A */
|
|
|
|
AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC19 periph A */
|
|
|
|
AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC22 periph A */
|
|
|
|
AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC23 periph A */
|
|
|
|
AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC24 periph A */
|
|
|
|
AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE /* PC17 periph B */
|
|
|
|
AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE /* PC26 periph A */
|
|
|
|
AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>; /* PC27 periph A */
|
|
|
|
};
|
|
|
|
};
|
|
|
|
|
2012-07-04 13:20:46 +04:00
|
|
|
pioA: gpio@fffff200 {
|
|
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
|
|
reg = <0xfffff200 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
|
2012-07-04 13:20:46 +04:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
gpio-controller;
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <2>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&pioA_clk>;
|
2012-07-04 13:20:46 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pioB: gpio@fffff400 {
|
|
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
|
|
reg = <0xfffff400 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
|
2012-07-04 13:20:46 +04:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
gpio-controller;
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <2>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&pioB_clk>;
|
2012-07-04 13:20:46 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pioC: gpio@fffff600 {
|
|
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
|
|
reg = <0xfffff600 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
2012-07-04 13:20:46 +04:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
gpio-controller;
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <2>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&pioCDE_clk>;
|
2012-07-04 13:20:46 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pioD: gpio@fffff800 {
|
|
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
|
|
reg = <0xfffff800 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
2012-07-04 13:20:46 +04:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
gpio-controller;
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <2>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&pioCDE_clk>;
|
2012-07-04 13:20:46 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
pioE: gpio@fffffa00 {
|
|
|
|
compatible = "atmel,at91rm9200-gpio";
|
|
|
|
reg = <0xfffffa00 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
|
2012-07-04 13:20:46 +04:00
|
|
|
#gpio-cells = <2>;
|
|
|
|
gpio-controller;
|
|
|
|
interrupt-controller;
|
|
|
|
#interrupt-cells = <2>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&pioCDE_clk>;
|
2012-07-05 12:56:09 +04:00
|
|
|
};
|
2012-02-26 15:12:43 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
dbgu: serial@ffffee00 {
|
|
|
|
compatible = "atmel,at91sam9260-usart";
|
|
|
|
reg = <0xffffee00 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
|
2012-07-05 12:56:09 +04:00
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_dbgu>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&mck>;
|
|
|
|
clock-names = "usart";
|
2012-02-26 15:12:43 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
usart0: serial@fff8c000 {
|
|
|
|
compatible = "atmel,at91sam9260-usart";
|
|
|
|
reg = <0xfff8c000 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
|
2012-02-26 15:12:43 +04:00
|
|
|
atmel,use-dma-rx;
|
|
|
|
atmel,use-dma-tx;
|
2012-07-05 12:56:09 +04:00
|
|
|
pinctrl-names = "default";
|
2012-11-19 02:40:01 +04:00
|
|
|
pinctrl-0 = <&pinctrl_usart0>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&usart0_clk>;
|
|
|
|
clock-names = "usart";
|
2012-02-26 15:12:43 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
usart1: serial@fff90000 {
|
|
|
|
compatible = "atmel,at91sam9260-usart";
|
|
|
|
reg = <0xfff90000 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
|
2012-02-26 15:12:43 +04:00
|
|
|
atmel,use-dma-rx;
|
|
|
|
atmel,use-dma-tx;
|
2012-07-05 12:56:09 +04:00
|
|
|
pinctrl-names = "default";
|
2012-11-19 02:40:01 +04:00
|
|
|
pinctrl-0 = <&pinctrl_usart1>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&usart1_clk>;
|
|
|
|
clock-names = "usart";
|
2012-02-26 15:12:43 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
usart2: serial@fff94000 {
|
|
|
|
compatible = "atmel,at91sam9260-usart";
|
|
|
|
reg = <0xfff94000 0x200>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
|
2012-02-26 15:12:43 +04:00
|
|
|
atmel,use-dma-rx;
|
|
|
|
atmel,use-dma-tx;
|
2012-07-05 12:56:09 +04:00
|
|
|
pinctrl-names = "default";
|
2012-11-19 02:40:01 +04:00
|
|
|
pinctrl-0 = <&pinctrl_usart2>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&usart2_clk>;
|
|
|
|
clock-names = "usart";
|
2012-02-26 15:12:43 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
2012-11-07 07:41:41 +04:00
|
|
|
ssc0: ssc@fff98000 {
|
|
|
|
compatible = "atmel,at91rm9200-ssc";
|
|
|
|
reg = <0xfff98000 0x4000>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
|
2013-01-11 18:08:30 +04:00
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&ssc0_clk>;
|
|
|
|
clock-names = "pclk";
|
2012-12-13 06:05:07 +04:00
|
|
|
status = "disabled";
|
2012-11-07 07:41:41 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
ssc1: ssc@fff9c000 {
|
|
|
|
compatible = "atmel,at91rm9200-ssc";
|
|
|
|
reg = <0xfff9c000 0x4000>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
|
2013-01-11 18:08:30 +04:00
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&ssc1_clk>;
|
|
|
|
clock-names = "pclk";
|
2012-12-13 06:05:07 +04:00
|
|
|
status = "disabled";
|
2012-11-07 07:41:41 +04:00
|
|
|
};
|
|
|
|
|
2012-02-26 15:12:43 +04:00
|
|
|
macb0: ethernet@fffbc000 {
|
|
|
|
compatible = "cdns,at32ap7000-macb", "cdns,macb";
|
|
|
|
reg = <0xfffbc000 0x100>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
|
2012-10-23 06:19:11 +04:00
|
|
|
pinctrl-names = "default";
|
|
|
|
pinctrl-0 = <&pinctrl_macb_rmii>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&macb0_clk>, <&macb0_clk>;
|
|
|
|
clock-names = "hclk", "pclk";
|
2012-02-26 15:12:43 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
usb1: gadget@fff78000 {
|
|
|
|
compatible = "atmel,at91rm9200-udc";
|
|
|
|
reg = <0xfff78000 0x4000>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&udc_clk>, <&udpck>;
|
|
|
|
clock-names = "pclk", "hclk";
|
2012-02-26 15:12:43 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
2012-09-12 10:42:16 +04:00
|
|
|
|
|
|
|
i2c0: i2c@fff88000 {
|
2014-01-15 14:24:46 +04:00
|
|
|
compatible = "atmel,at91sam9260-i2c";
|
2012-09-12 10:42:16 +04:00
|
|
|
reg = <0xfff88000 0x100>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
|
2012-09-12 10:42:16 +04:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&twi0_clk>;
|
2012-09-12 10:42:16 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
2012-11-19 15:23:36 +04:00
|
|
|
|
|
|
|
mmc0: mmc@fff80000 {
|
|
|
|
compatible = "atmel,hsmci";
|
|
|
|
reg = <0xfff80000 0x600>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
|
2014-09-23 19:12:52 +04:00
|
|
|
pinctrl-names = "default";
|
2012-11-19 15:23:36 +04:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&mci0_clk>;
|
|
|
|
clock-names = "mci_clk";
|
2012-11-19 15:23:36 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
|
|
|
|
|
|
|
mmc1: mmc@fff84000 {
|
|
|
|
compatible = "atmel,hsmci";
|
|
|
|
reg = <0xfff84000 0x600>;
|
2013-04-24 04:34:25 +04:00
|
|
|
interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
|
2014-09-23 19:12:52 +04:00
|
|
|
pinctrl-names = "default";
|
2012-11-19 15:23:36 +04:00
|
|
|
#address-cells = <1>;
|
|
|
|
#size-cells = <0>;
|
2014-06-23 08:03:37 +04:00
|
|
|
clocks = <&mci1_clk>;
|
|
|
|
clock-names = "mci_clk";
|
2012-11-19 15:23:36 +04:00
|
|
|
status = "disabled";
|
|
|
|
};
|
ARM: arm-soc: device tree conversions and enablement
Continued device tree conversion and enablement across a number of
platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
smaller series as well.
ux500 has seen continued conversion for platforms. Several platforms have
seen pinctrl-via-devicetree conversions for simpler multiplatform. Tegra
is adding data for new devices/drivers, and Exynos has a bunch of new
bindings and devices added as well.
So, pretty much the same progression in the right direction as the last
few releases.
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tZFciqzplLeo50vZ+y+lVVsR40j/w29EjwPXhCV30//gGOYLyp/VDu5PRtrBdgh8
EgpcT2EWJwMCN/Upcao/q2JbQktPHPpSwnpaUAALYB20uD7k5jo7wtYE/+L9nn6B
bxcCDTMVmqzNTF+y0P16hDcs5jMLVjpI0xBiyZ1G6gShpggsSZCHY5ynjAtQ19se
r+2WrNfOR23k6arJuOUAQSEnLdx0T5SlW6CJeFEofKv4uoebxAbKUiNO4ShWskhd
nNptX1+L3hj3zpjGcEHmL6bd+nGtyMeoG9Yekcv1oZxdVcpKhFxh0s5PEJBEeXcN
M7aAWlWJkplV22Olqhpc/3INCweq6E+zBrBxZaUBW/JCzGrqBUGC0BULDPAkmC4J
CKL6IqIB73jGQ4OY14IaMU20GJrIGxZ7wzXOp4aw3OUpRlxsgurfyFQeIjUvVoZL
PJ8DRoAVwreVHvKfgZZVKpSAY7dwcWbxpWsYlrH3zWIC5vRJ0UFwsD0TpLJWd6Vi
XA8gQcJRWKGS8E5mRY39
=Rk9v
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Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree conversions and enablement from Olof Johansson:
"Continued device tree conversion and enablement across a number of
platforms; Kirkwood, tegra, i.MX, Exynos, zynq and a couple of other
smaller series as well.
ux500 has seen continued conversion for platforms. Several platforms
have seen pinctrl-via-devicetree conversions for simpler
multiplatform. Tegra is adding data for new devices/drivers, and
Exynos has a bunch of new bindings and devices added as well.
So, pretty much the same progression in the right direction as the
last few releases."
Fix up conflicts as per Olof.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (185 commits)
ARM: ux500: Rename dbx500 cpufreq code to be more generic
ARM: dts: add missing ux500 device trees
ARM: ux500: Stop registering the PCM driver from platform code
ARM: ux500: Move board specific GPIO info out to subordinate DTS files
ARM: ux500: Disable the MMCI gpio-regulator by default
ARM: Kirkwood: remove kirkwood_ehci_init() from new boards
ARM: Kirkwood: Add support LED of OpenBlocks A6
ARM: Kirkwood: Convert to EHCI via DT for OpenBlocks A6
ARM: kirkwood: Add NAND partiton map for OpenBlocks A6
ARM: kirkwood: Add support second I2C bus and RTC on OpenBlocks A6
ARM: kirkwood: Add support DT of second I2C bus
ARM: kirkwood: Convert mplcec4 board to pinctrl
ARM: Kirkwood: Convert km_kirkwood to pinctrl
ARM: Kirkwood: support 98DX412x kirkwoods with pinctrl
ARM: Kirkwood: Convert IX2-200 to pinctrl.
ARM: Kirkwood: Convert lsxl boards to pinctrl.
ARM: Kirkwood: Convert ib62x0 to pinctrl.
ARM: Kirkwood: Convert GoFlex Net to pinctrl.
ARM: Kirkwood: Convert dreamplug to pinctrl.
ARM: Kirkwood: Convert dockstar to pinctrl.
...
2012-12-13 22:39:26 +04:00
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2012-11-12 12:37:26 +04:00
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watchdog@fffffd40 {
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compatible = "atmel,at91sam9260-wdt";
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reg = <0xfffffd40 0x10>;
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2013-10-04 11:24:14 +04:00
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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atmel,watchdog-type = "hardware";
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atmel,reset-type = "all";
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atmel,dbg-halt;
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atmel,idle-halt;
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2012-11-12 12:37:26 +04:00
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status = "disabled";
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};
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2013-04-03 10:02:18 +04:00
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spi0: spi@fffa4000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "atmel,at91rm9200-spi";
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reg = <0xfffa4000 0x200>;
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2013-04-24 04:34:25 +04:00
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
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2013-04-03 10:03:52 +04:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi0>;
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2014-06-23 08:03:37 +04:00
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clocks = <&spi0_clk>;
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clock-names = "spi_clk";
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2013-04-03 10:02:18 +04:00
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status = "disabled";
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};
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spi1: spi@fffa8000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "atmel,at91rm9200-spi";
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reg = <0xfffa8000 0x200>;
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2013-04-24 04:34:25 +04:00
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interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
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2013-04-03 10:03:52 +04:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_spi1>;
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2014-06-23 08:03:37 +04:00
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clocks = <&spi1_clk>;
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clock-names = "spi_clk";
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2013-04-03 10:02:18 +04:00
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status = "disabled";
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};
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2013-12-19 07:59:17 +04:00
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pwm0: pwm@fffb8000 {
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compatible = "atmel,at91sam9rl-pwm";
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reg = <0xfffb8000 0x300>;
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interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
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#pwm-cells = <3>;
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2014-06-23 08:03:37 +04:00
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clocks = <&pwm_clk>;
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clock-names = "pwm_clk";
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2013-12-19 07:59:17 +04:00
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status = "disabled";
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};
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2012-02-26 15:12:43 +04:00
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};
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2013-03-29 00:50:46 +04:00
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fb0: fb@0x00700000 {
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compatible = "atmel,at91sam9263-lcdc";
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reg = <0x00700000 0x1000>;
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interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fb>;
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status = "disabled";
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};
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2012-02-26 15:12:43 +04:00
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nand0: nand@40000000 {
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compatible = "atmel,at91rm9200-nand";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000
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0xffffe000 0x200
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>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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2012-07-12 19:36:52 +04:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_nand>;
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2013-04-24 04:34:25 +04:00
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gpios = <&pioA 22 GPIO_ACTIVE_HIGH
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&pioD 15 GPIO_ACTIVE_HIGH
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2012-02-26 15:12:43 +04:00
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0
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>;
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status = "disabled";
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};
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usb0: ohci@00a00000 {
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compatible = "atmel,at91rm9200-ohci", "usb-ohci";
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reg = <0x00a00000 0x100000>;
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2013-04-24 04:34:25 +04:00
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interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
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2014-06-23 08:03:37 +04:00
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clocks = <&usb>, <&ohci_clk>, <&ohci_clk>, <&uhpck>;
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clock-names = "usb_clk", "ohci_clk", "hclk", "uhpck";
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2012-02-26 15:12:43 +04:00
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status = "disabled";
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};
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};
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i2c@0 {
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compatible = "i2c-gpio";
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2013-04-24 04:34:25 +04:00
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gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
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&pioB 5 GPIO_ACTIVE_HIGH /* scl */
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2012-02-26 15:12:43 +04:00
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>;
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i2c-gpio,sda-open-drain;
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i2c-gpio,scl-open-drain;
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i2c-gpio,delay-us = <2>; /* ~100 kHz */
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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