2019-06-01 11:08:19 +03:00
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// SPDX-License-Identifier: GPL-2.0-only
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2007-12-23 21:50:57 +03:00
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/*
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* C-Media CMI8788 driver - main driver module
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*
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* Copyright (c) Clemens Ladisch <clemens@ladisch.de>
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*/
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/pci.h>
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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
percpu.h is included by sched.h and module.h and thus ends up being
included when building most .c files. percpu.h includes slab.h which
in turn includes gfp.h making everything defined by the two files
universally available and complicating inclusion dependencies.
percpu.h -> slab.h dependency is about to be removed. Prepare for
this change by updating users of gfp and slab facilities include those
headers directly instead of assuming availability. As this conversion
needs to touch large number of source files, the following script is
used as the basis of conversion.
http://userweb.kernel.org/~tj/misc/slabh-sweep.py
The script does the followings.
* Scan files for gfp and slab usages and update includes such that
only the necessary includes are there. ie. if only gfp is used,
gfp.h, if slab is used, slab.h.
* When the script inserts a new include, it looks at the include
blocks and try to put the new include such that its order conforms
to its surrounding. It's put in the include block which contains
core kernel includes, in the same order that the rest are ordered -
alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
doesn't seem to be any matching order.
* If the script can't find a place to put a new include (mostly
because the file doesn't have fitting include block), it prints out
an error message indicating which .h file needs to be added to the
file.
The conversion was done in the following steps.
1. The initial automatic conversion of all .c files updated slightly
over 4000 files, deleting around 700 includes and adding ~480 gfp.h
and ~3000 slab.h inclusions. The script emitted errors for ~400
files.
2. Each error was manually checked. Some didn't need the inclusion,
some needed manual addition while adding it to implementation .h or
embedding .c file was more appropriate for others. This step added
inclusions to around 150 files.
3. The script was run again and the output was compared to the edits
from #2 to make sure no file was left behind.
4. Several build tests were done and a couple of problems were fixed.
e.g. lib/decompress_*.c used malloc/free() wrappers around slab
APIs requiring slab.h to be added manually.
5. The script was run on all .h files but without automatically
editing them as sprinkling gfp.h and slab.h inclusions around .h
files could easily lead to inclusion dependency hell. Most gfp.h
inclusion directives were ignored as stuff from gfp.h was usually
wildly available and often used in preprocessor macros. Each
slab.h inclusion directive was examined and added manually as
necessary.
6. percpu.h was updated not to include slab.h.
7. Build test were done on the following configurations and failures
were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my
distributed build env didn't work with gcov compiles) and a few
more options had to be turned off depending on archs to make things
build (like ipr on powerpc/64 which failed due to missing writeq).
* x86 and x86_64 UP and SMP allmodconfig and a custom test config.
* powerpc and powerpc64 SMP allmodconfig
* sparc and sparc64 SMP allmodconfig
* ia64 SMP allmodconfig
* s390 SMP allmodconfig
* alpha SMP allmodconfig
* um on x86_64 SMP allmodconfig
8. percpu.h modifications were reverted so that it could be applied as
a separate patch and serve as bisection point.
Given the fact that I had only a couple of failures from tests on step
6, I'm fairly confident about the coverage of this conversion patch.
If there is a breakage, it's likely to be something in one of the arch
headers which should be easily discoverable easily on most builds of
the specific arch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
2010-03-24 11:04:11 +03:00
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#include <linux/slab.h>
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2011-07-15 20:38:28 +04:00
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#include <linux/module.h>
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2007-12-23 21:50:57 +03:00
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#include <sound/ac97_codec.h>
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#include <sound/asoundef.h>
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#include <sound/core.h>
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#include <sound/info.h>
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#include <sound/mpu401.h>
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#include <sound/pcm.h>
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#include "oxygen.h"
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2008-01-21 10:50:19 +03:00
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#include "cm9780.h"
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2007-12-23 21:50:57 +03:00
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MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>");
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MODULE_DESCRIPTION("C-Media CMI8788 helper library");
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2008-05-13 11:18:27 +04:00
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MODULE_LICENSE("GPL v2");
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2007-12-23 21:50:57 +03:00
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2009-02-19 10:38:55 +03:00
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#define DRIVER "oxygen"
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2007-12-23 21:50:57 +03:00
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2008-09-22 11:04:43 +04:00
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static inline int oxygen_uart_input_ready(struct oxygen *chip)
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{
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return !(oxygen_read8(chip, OXYGEN_MPU401 + 1) & MPU401_RX_EMPTY);
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}
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static void oxygen_read_uart(struct oxygen *chip)
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{
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if (unlikely(!oxygen_uart_input_ready(chip))) {
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/* no data, but read it anyway to clear the interrupt */
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oxygen_read8(chip, OXYGEN_MPU401);
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return;
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}
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do {
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u8 data = oxygen_read8(chip, OXYGEN_MPU401);
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if (data == MPU401_ACK)
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continue;
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if (chip->uart_input_count >= ARRAY_SIZE(chip->uart_input))
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chip->uart_input_count = 0;
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chip->uart_input[chip->uart_input_count++] = data;
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} while (oxygen_uart_input_ready(chip));
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if (chip->model.uart_input)
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chip->model.uart_input(chip);
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}
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2007-12-23 21:50:57 +03:00
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static irqreturn_t oxygen_interrupt(int dummy, void *dev_id)
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{
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struct oxygen *chip = dev_id;
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unsigned int status, clear, elapsed_streams, i;
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status = oxygen_read16(chip, OXYGEN_INTERRUPT_STATUS);
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if (!status)
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return IRQ_NONE;
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spin_lock(&chip->reg_lock);
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clear = status & (OXYGEN_CHANNEL_A |
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OXYGEN_CHANNEL_B |
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OXYGEN_CHANNEL_C |
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OXYGEN_CHANNEL_SPDIF |
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OXYGEN_CHANNEL_MULTICH |
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OXYGEN_CHANNEL_AC97 |
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2008-01-18 11:17:53 +03:00
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OXYGEN_INT_SPDIF_IN_DETECT |
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2008-01-28 10:34:21 +03:00
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OXYGEN_INT_GPIO |
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OXYGEN_INT_AC97);
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2007-12-23 21:50:57 +03:00
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if (clear) {
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2008-01-18 11:17:53 +03:00
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if (clear & OXYGEN_INT_SPDIF_IN_DETECT)
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chip->interrupt_mask &= ~OXYGEN_INT_SPDIF_IN_DETECT;
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2007-12-23 21:50:57 +03:00
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oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
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chip->interrupt_mask & ~clear);
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oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
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chip->interrupt_mask);
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}
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elapsed_streams = status & chip->pcm_running;
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spin_unlock(&chip->reg_lock);
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for (i = 0; i < PCM_COUNT; ++i)
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if ((elapsed_streams & (1 << i)) && chip->streams[i])
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snd_pcm_period_elapsed(chip->streams[i]);
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2008-01-18 11:17:53 +03:00
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if (status & OXYGEN_INT_SPDIF_IN_DETECT) {
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2007-12-23 21:50:57 +03:00
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spin_lock(&chip->reg_lock);
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i = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
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2008-01-21 10:53:30 +03:00
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if (i & (OXYGEN_SPDIF_SENSE_INT | OXYGEN_SPDIF_LOCK_INT |
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OXYGEN_SPDIF_RATE_INT)) {
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/* write the interrupt bit(s) to clear */
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2007-12-23 21:50:57 +03:00
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oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, i);
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schedule_work(&chip->spdif_input_bits_work);
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}
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spin_unlock(&chip->reg_lock);
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}
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if (status & OXYGEN_INT_GPIO)
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2008-01-28 10:36:55 +03:00
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schedule_work(&chip->gpio_work);
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2007-12-23 21:50:57 +03:00
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2008-09-22 11:04:43 +04:00
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if (status & OXYGEN_INT_MIDI) {
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if (chip->midi)
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snd_mpu401_uart_interrupt(0, chip->midi->private_data);
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else
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oxygen_read_uart(chip);
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}
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2007-12-23 21:50:57 +03:00
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2008-01-28 10:34:21 +03:00
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if (status & OXYGEN_INT_AC97)
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wake_up(&chip->ac97_waitqueue);
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2007-12-23 21:50:57 +03:00
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return IRQ_HANDLED;
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}
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static void oxygen_spdif_input_bits_changed(struct work_struct *work)
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{
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struct oxygen *chip = container_of(work, struct oxygen,
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spdif_input_bits_work);
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2008-01-21 10:53:30 +03:00
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u32 reg;
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2007-12-23 21:50:57 +03:00
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2008-01-21 10:53:30 +03:00
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/*
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* This function gets called when there is new activity on the SPDIF
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* input, or when we lose lock on the input signal, or when the rate
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* changes.
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*/
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2007-12-23 21:50:57 +03:00
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msleep(1);
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2008-01-21 10:53:30 +03:00
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spin_lock_irq(&chip->reg_lock);
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reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
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if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
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OXYGEN_SPDIF_LOCK_STATUS))
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== OXYGEN_SPDIF_SENSE_STATUS) {
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/*
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* If we detect activity on the SPDIF input but cannot lock to
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* a signal, the clock bit is likely to be wrong.
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*/
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reg ^= OXYGEN_SPDIF_IN_CLOCK_MASK;
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oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
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2007-12-23 21:50:57 +03:00
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spin_unlock_irq(&chip->reg_lock);
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msleep(1);
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2008-01-21 10:53:30 +03:00
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spin_lock_irq(&chip->reg_lock);
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reg = oxygen_read32(chip, OXYGEN_SPDIF_CONTROL);
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if ((reg & (OXYGEN_SPDIF_SENSE_STATUS |
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OXYGEN_SPDIF_LOCK_STATUS))
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== OXYGEN_SPDIF_SENSE_STATUS) {
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/* nothing detected with either clock; give up */
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if ((reg & OXYGEN_SPDIF_IN_CLOCK_MASK)
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== OXYGEN_SPDIF_IN_CLOCK_192) {
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/*
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* Reset clock to <= 96 kHz because this is
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* more likely to be received next time.
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*/
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reg &= ~OXYGEN_SPDIF_IN_CLOCK_MASK;
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reg |= OXYGEN_SPDIF_IN_CLOCK_96;
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oxygen_write32(chip, OXYGEN_SPDIF_CONTROL, reg);
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}
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2007-12-23 21:50:57 +03:00
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}
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}
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2008-01-21 10:53:30 +03:00
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spin_unlock_irq(&chip->reg_lock);
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2007-12-23 21:50:57 +03:00
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2008-01-14 10:56:01 +03:00
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if (chip->controls[CONTROL_SPDIF_INPUT_BITS]) {
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2007-12-23 21:50:57 +03:00
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spin_lock_irq(&chip->reg_lock);
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2008-01-18 11:17:53 +03:00
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chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
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2007-12-23 21:50:57 +03:00
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oxygen_write16(chip, OXYGEN_INTERRUPT_MASK,
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chip->interrupt_mask);
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spin_unlock_irq(&chip->reg_lock);
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2008-01-21 10:53:30 +03:00
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/*
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* We don't actually know that any channel status bits have
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* changed, but let's send a notification just to be sure.
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*/
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2007-12-23 21:50:57 +03:00
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snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
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2008-01-14 10:56:01 +03:00
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&chip->controls[CONTROL_SPDIF_INPUT_BITS]->id);
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2007-12-23 21:50:57 +03:00
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}
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}
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2008-01-28 10:36:55 +03:00
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static void oxygen_gpio_changed(struct work_struct *work)
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{
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struct oxygen *chip = container_of(work, struct oxygen, gpio_work);
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2008-09-22 10:55:19 +04:00
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if (chip->model.gpio_changed)
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chip->model.gpio_changed(chip);
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2008-01-28 10:36:55 +03:00
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}
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2007-12-23 21:50:57 +03:00
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static void oxygen_proc_read(struct snd_info_entry *entry,
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struct snd_info_buffer *buffer)
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{
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struct oxygen *chip = entry->private_data;
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int i, j;
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2010-12-02 13:42:00 +03:00
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switch (oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_PACKAGE_ID_MASK) {
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case OXYGEN_PACKAGE_ID_8786: i = '6'; break;
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case OXYGEN_PACKAGE_ID_8787: i = '7'; break;
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case OXYGEN_PACKAGE_ID_8788: i = '8'; break;
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default: i = '?'; break;
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}
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snd_iprintf(buffer, "CMI878%c:\n", i);
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2008-05-13 11:19:53 +04:00
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for (i = 0; i < OXYGEN_IO_SIZE; i += 0x10) {
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2007-12-23 21:50:57 +03:00
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snd_iprintf(buffer, "%02x:", i);
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for (j = 0; j < 0x10; ++j)
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snd_iprintf(buffer, " %02x", oxygen_read8(chip, i + j));
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snd_iprintf(buffer, "\n");
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}
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if (mutex_lock_interruptible(&chip->mutex) < 0)
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return;
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2008-01-16 10:28:17 +03:00
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if (chip->has_ac97_0) {
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2010-12-02 13:41:10 +03:00
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snd_iprintf(buffer, "\nAC97:\n");
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2008-01-16 10:28:17 +03:00
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for (i = 0; i < 0x80; i += 0x10) {
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snd_iprintf(buffer, "%02x:", i);
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for (j = 0; j < 0x10; j += 2)
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snd_iprintf(buffer, " %04x",
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oxygen_read_ac97(chip, 0, i + j));
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snd_iprintf(buffer, "\n");
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}
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}
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if (chip->has_ac97_1) {
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2010-12-02 13:41:10 +03:00
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snd_iprintf(buffer, "\nAC97 2:\n");
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2008-01-16 10:28:17 +03:00
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for (i = 0; i < 0x80; i += 0x10) {
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snd_iprintf(buffer, "%02x:", i);
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for (j = 0; j < 0x10; j += 2)
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snd_iprintf(buffer, " %04x",
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oxygen_read_ac97(chip, 1, i + j));
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snd_iprintf(buffer, "\n");
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}
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2007-12-23 21:50:57 +03:00
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}
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mutex_unlock(&chip->mutex);
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2010-12-02 13:41:10 +03:00
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if (chip->model.dump_registers)
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chip->model.dump_registers(chip, buffer);
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2007-12-23 21:50:57 +03:00
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}
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2008-02-22 20:35:22 +03:00
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static void oxygen_proc_init(struct oxygen *chip)
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2007-12-23 21:50:57 +03:00
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{
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2019-02-04 18:01:39 +03:00
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snd_card_ro_proc_new(chip->card, "oxygen", chip, oxygen_proc_read);
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2007-12-23 21:50:57 +03:00
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}
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2009-02-19 10:42:44 +03:00
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static const struct pci_device_id *
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oxygen_search_pci_id(struct oxygen *chip, const struct pci_device_id ids[])
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{
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u16 subdevice;
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/*
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* Make sure the EEPROM pins are available, i.e., not used for SPI.
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* (This function is called before we initialize or use SPI.)
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*/
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oxygen_clear_bits8(chip, OXYGEN_FUNCTION,
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OXYGEN_FUNCTION_ENABLE_SPI_4_5);
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/*
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* Read the subsystem device ID directly from the EEPROM, because the
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* chip didn't if the first EEPROM word was overwritten.
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*/
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subdevice = oxygen_read_eeprom(chip, 2);
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2009-09-02 20:25:39 +04:00
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/* use default ID if EEPROM is missing */
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2010-11-02 19:18:23 +03:00
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if (subdevice == 0xffff && oxygen_read_eeprom(chip, 1) == 0xffff)
|
2009-09-02 20:25:39 +04:00
|
|
|
subdevice = 0x8788;
|
2009-02-19 10:42:44 +03:00
|
|
|
/*
|
|
|
|
* We use only the subsystem device ID for searching because it is
|
|
|
|
* unique even without the subsystem vendor ID, which may have been
|
|
|
|
* overwritten in the EEPROM.
|
|
|
|
*/
|
|
|
|
for (; ids->vendor; ++ids)
|
|
|
|
if (ids->subdevice == subdevice &&
|
|
|
|
ids->driver_data != BROKEN_EEPROM_DRIVER_DATA)
|
|
|
|
return ids;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2009-02-19 10:44:12 +03:00
|
|
|
static void oxygen_restore_eeprom(struct oxygen *chip,
|
|
|
|
const struct pci_device_id *id)
|
|
|
|
{
|
2009-09-28 13:05:18 +04:00
|
|
|
u16 eeprom_id;
|
|
|
|
|
|
|
|
eeprom_id = oxygen_read_eeprom(chip, 0);
|
|
|
|
if (eeprom_id != OXYGEN_EEPROM_ID &&
|
|
|
|
(eeprom_id != 0xffff || id->subdevice != 0x8788)) {
|
2009-02-19 10:44:12 +03:00
|
|
|
/*
|
|
|
|
* This function gets called only when a known card model has
|
|
|
|
* been detected, i.e., we know there is a valid subsystem
|
|
|
|
* product ID at index 2 in the EEPROM. Therefore, we have
|
|
|
|
* been able to deduce the correct subsystem vendor ID, and
|
|
|
|
* this is enough information to restore the original EEPROM
|
|
|
|
* contents.
|
|
|
|
*/
|
|
|
|
oxygen_write_eeprom(chip, 1, id->subvendor);
|
|
|
|
oxygen_write_eeprom(chip, 0, OXYGEN_EEPROM_ID);
|
|
|
|
|
|
|
|
oxygen_set_bits8(chip, OXYGEN_MISC,
|
|
|
|
OXYGEN_MISC_WRITE_PCI_SUBID);
|
|
|
|
pci_write_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID,
|
|
|
|
id->subvendor);
|
|
|
|
pci_write_config_word(chip->pci, PCI_SUBSYSTEM_ID,
|
|
|
|
id->subdevice);
|
|
|
|
oxygen_clear_bits8(chip, OXYGEN_MISC,
|
|
|
|
OXYGEN_MISC_WRITE_PCI_SUBID);
|
|
|
|
|
2014-02-25 21:00:26 +04:00
|
|
|
dev_info(chip->card->dev, "EEPROM ID restored\n");
|
2009-02-19 10:44:12 +03:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-10-06 12:57:50 +04:00
|
|
|
static void configure_pcie_bridge(struct pci_dev *pci)
|
2009-09-28 13:05:58 +04:00
|
|
|
{
|
2015-01-17 00:15:43 +03:00
|
|
|
enum { PEX811X, PI7C9X110, XIO2001 };
|
2010-10-06 12:57:50 +04:00
|
|
|
static const struct pci_device_id bridge_ids[] = {
|
2010-10-06 12:58:50 +04:00
|
|
|
{ PCI_VDEVICE(PLX, 0x8111), .driver_data = PEX811X },
|
|
|
|
{ PCI_VDEVICE(PLX, 0x8112), .driver_data = PEX811X },
|
2010-10-06 12:57:50 +04:00
|
|
|
{ PCI_DEVICE(0x12d8, 0xe110), .driver_data = PI7C9X110 },
|
2015-01-17 00:15:43 +03:00
|
|
|
{ PCI_VDEVICE(TI, 0x8240), .driver_data = XIO2001 },
|
2010-10-06 12:57:50 +04:00
|
|
|
{ }
|
|
|
|
};
|
|
|
|
struct pci_dev *bridge;
|
|
|
|
const struct pci_device_id *id;
|
2009-09-28 13:05:58 +04:00
|
|
|
u32 tmp;
|
|
|
|
|
2010-10-06 12:57:50 +04:00
|
|
|
if (!pci->bus || !pci->bus->self)
|
|
|
|
return;
|
|
|
|
bridge = pci->bus->self;
|
|
|
|
|
|
|
|
id = pci_match_id(bridge_ids, bridge);
|
|
|
|
if (!id)
|
|
|
|
return;
|
|
|
|
|
|
|
|
switch (id->driver_data) {
|
2010-10-06 12:58:50 +04:00
|
|
|
case PEX811X: /* PLX PEX8111/PEX8112 PCIe/PCI bridge */
|
|
|
|
pci_read_config_dword(bridge, 0x48, &tmp);
|
|
|
|
tmp |= 1; /* enable blind prefetching */
|
|
|
|
tmp |= 1 << 11; /* enable beacon generation */
|
|
|
|
pci_write_config_dword(bridge, 0x48, tmp);
|
|
|
|
|
|
|
|
pci_write_config_dword(bridge, 0x84, 0x0c);
|
|
|
|
pci_read_config_dword(bridge, 0x88, &tmp);
|
|
|
|
tmp &= ~(7 << 27);
|
|
|
|
tmp |= 2 << 27; /* set prefetch size to 128 bytes */
|
|
|
|
pci_write_config_dword(bridge, 0x88, tmp);
|
|
|
|
break;
|
|
|
|
|
2010-10-06 12:57:50 +04:00
|
|
|
case PI7C9X110: /* Pericom PI7C9X110 PCIe/PCI bridge */
|
|
|
|
pci_read_config_dword(bridge, 0x40, &tmp);
|
|
|
|
tmp |= 1; /* park the PCI arbiter to the sound chip */
|
|
|
|
pci_write_config_dword(bridge, 0x40, tmp);
|
|
|
|
break;
|
2015-01-17 00:15:43 +03:00
|
|
|
|
|
|
|
case XIO2001: /* Texas Instruments XIO2001 PCIe/PCI bridge */
|
|
|
|
pci_read_config_dword(bridge, 0xe8, &tmp);
|
|
|
|
tmp &= ~0xf; /* request length limit: 64 bytes */
|
|
|
|
tmp &= ~(0xf << 8);
|
|
|
|
tmp |= 1 << 8; /* request count limit: one buffer */
|
|
|
|
pci_write_config_dword(bridge, 0xe8, tmp);
|
|
|
|
break;
|
2009-09-28 13:05:58 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2008-02-22 20:35:22 +03:00
|
|
|
static void oxygen_init(struct oxygen *chip)
|
2007-12-23 21:50:57 +03:00
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
chip->dac_routing = 1;
|
|
|
|
for (i = 0; i < 8; ++i)
|
2008-09-22 10:55:19 +04:00
|
|
|
chip->dac_volume[i] = chip->model.dac_volume_min;
|
2008-04-16 11:14:30 +04:00
|
|
|
chip->dac_mute = 1;
|
2018-12-21 15:52:57 +03:00
|
|
|
chip->spdif_playback_enable = 0;
|
2007-12-23 21:50:57 +03:00
|
|
|
chip->spdif_bits = OXYGEN_SPDIF_C | OXYGEN_SPDIF_ORIGINAL |
|
|
|
|
(IEC958_AES1_CON_PCM_CODER << OXYGEN_SPDIF_CATEGORY_SHIFT);
|
|
|
|
chip->spdif_pcm_bits = chip->spdif_bits;
|
|
|
|
|
2011-01-10 18:36:23 +03:00
|
|
|
if (!(oxygen_read8(chip, OXYGEN_REVISION) & OXYGEN_REVISION_2))
|
2008-01-18 11:17:53 +03:00
|
|
|
oxygen_set_bits8(chip, OXYGEN_MISC,
|
|
|
|
OXYGEN_MISC_PCI_MEM_W_1_CLOCK);
|
2007-12-23 21:50:57 +03:00
|
|
|
|
2008-01-16 10:28:17 +03:00
|
|
|
i = oxygen_read16(chip, OXYGEN_AC97_CONTROL);
|
|
|
|
chip->has_ac97_0 = (i & OXYGEN_AC97_CODEC_0) != 0;
|
|
|
|
chip->has_ac97_1 = (i & OXYGEN_AC97_CODEC_1) != 0;
|
|
|
|
|
2008-01-25 10:39:26 +03:00
|
|
|
oxygen_write8_masked(chip, OXYGEN_FUNCTION,
|
2008-03-19 10:20:13 +03:00
|
|
|
OXYGEN_FUNCTION_RESET_CODEC |
|
2008-09-22 10:55:19 +04:00
|
|
|
chip->model.function_flags,
|
2008-03-19 10:20:13 +03:00
|
|
|
OXYGEN_FUNCTION_RESET_CODEC |
|
|
|
|
OXYGEN_FUNCTION_2WIRE_SPI_MASK |
|
|
|
|
OXYGEN_FUNCTION_ENABLE_SPI_4_5);
|
2008-01-25 10:39:26 +03:00
|
|
|
oxygen_write8(chip, OXYGEN_DMA_STATUS, 0);
|
|
|
|
oxygen_write8(chip, OXYGEN_DMA_PAUSE, 0);
|
|
|
|
oxygen_write8(chip, OXYGEN_PLAY_CHANNELS,
|
|
|
|
OXYGEN_PLAY_CHANNELS_2 |
|
|
|
|
OXYGEN_DMA_A_BURST_8 |
|
|
|
|
OXYGEN_DMA_MULTICH_BURST_8);
|
|
|
|
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
|
2008-03-19 10:20:59 +03:00
|
|
|
oxygen_write8_masked(chip, OXYGEN_MISC,
|
2008-09-22 10:55:19 +04:00
|
|
|
chip->model.misc_flags,
|
2008-01-25 10:39:26 +03:00
|
|
|
OXYGEN_MISC_WRITE_PCI_SUBID |
|
|
|
|
OXYGEN_MISC_REC_C_FROM_SPDIF |
|
|
|
|
OXYGEN_MISC_REC_B_FROM_AC97 |
|
2008-03-19 10:20:59 +03:00
|
|
|
OXYGEN_MISC_REC_A_FROM_MULTICH |
|
|
|
|
OXYGEN_MISC_MIDI);
|
2008-01-25 10:39:26 +03:00
|
|
|
oxygen_write8(chip, OXYGEN_REC_FORMAT,
|
|
|
|
(OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_A_SHIFT) |
|
|
|
|
(OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_B_SHIFT) |
|
|
|
|
(OXYGEN_FORMAT_16 << OXYGEN_REC_FORMAT_C_SHIFT));
|
|
|
|
oxygen_write8(chip, OXYGEN_PLAY_FORMAT,
|
|
|
|
(OXYGEN_FORMAT_16 << OXYGEN_SPDIF_FORMAT_SHIFT) |
|
|
|
|
(OXYGEN_FORMAT_16 << OXYGEN_MULTICH_FORMAT_SHIFT));
|
|
|
|
oxygen_write8(chip, OXYGEN_REC_CHANNELS, OXYGEN_REC_CHANNELS_2_2_2);
|
2008-01-21 10:44:24 +03:00
|
|
|
oxygen_write16(chip, OXYGEN_I2S_MULTICH_FORMAT,
|
2011-01-10 18:14:52 +03:00
|
|
|
OXYGEN_RATE_48000 |
|
|
|
|
chip->model.dac_i2s_format |
|
|
|
|
OXYGEN_I2S_MCLK(chip->model.dac_mclks) |
|
|
|
|
OXYGEN_I2S_BITS_16 |
|
|
|
|
OXYGEN_I2S_MASTER |
|
|
|
|
OXYGEN_I2S_BCLK_64);
|
2008-09-22 11:02:08 +04:00
|
|
|
if (chip->model.device_config & CAPTURE_0_FROM_I2S_1)
|
2008-03-19 10:21:32 +03:00
|
|
|
oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
|
2011-01-10 18:14:52 +03:00
|
|
|
OXYGEN_RATE_48000 |
|
|
|
|
chip->model.adc_i2s_format |
|
|
|
|
OXYGEN_I2S_MCLK(chip->model.adc_mclks) |
|
|
|
|
OXYGEN_I2S_BITS_16 |
|
|
|
|
OXYGEN_I2S_MASTER |
|
|
|
|
OXYGEN_I2S_BCLK_64);
|
2008-03-19 10:21:32 +03:00
|
|
|
else
|
|
|
|
oxygen_write16(chip, OXYGEN_I2S_A_FORMAT,
|
2011-01-10 18:14:52 +03:00
|
|
|
OXYGEN_I2S_MASTER |
|
|
|
|
OXYGEN_I2S_MUTE_MCLK);
|
2008-09-22 11:02:08 +04:00
|
|
|
if (chip->model.device_config & (CAPTURE_0_FROM_I2S_2 |
|
|
|
|
CAPTURE_2_FROM_I2S_2))
|
2008-03-19 10:21:32 +03:00
|
|
|
oxygen_write16(chip, OXYGEN_I2S_B_FORMAT,
|
2011-01-10 18:14:52 +03:00
|
|
|
OXYGEN_RATE_48000 |
|
|
|
|
chip->model.adc_i2s_format |
|
|
|
|
OXYGEN_I2S_MCLK(chip->model.adc_mclks) |
|
|
|
|
OXYGEN_I2S_BITS_16 |
|
|
|
|
OXYGEN_I2S_MASTER |
|
|
|
|
OXYGEN_I2S_BCLK_64);
|
2008-03-19 10:21:32 +03:00
|
|
|
else
|
|
|
|
oxygen_write16(chip, OXYGEN_I2S_B_FORMAT,
|
2011-01-10 18:14:52 +03:00
|
|
|
OXYGEN_I2S_MASTER |
|
|
|
|
OXYGEN_I2S_MUTE_MCLK);
|
2015-01-17 00:15:13 +03:00
|
|
|
if (chip->model.device_config & CAPTURE_3_FROM_I2S_3)
|
|
|
|
oxygen_write16(chip, OXYGEN_I2S_C_FORMAT,
|
|
|
|
OXYGEN_RATE_48000 |
|
|
|
|
chip->model.adc_i2s_format |
|
|
|
|
OXYGEN_I2S_MCLK(chip->model.adc_mclks) |
|
|
|
|
OXYGEN_I2S_BITS_16 |
|
|
|
|
OXYGEN_I2S_MASTER |
|
|
|
|
OXYGEN_I2S_BCLK_64);
|
|
|
|
else
|
|
|
|
oxygen_write16(chip, OXYGEN_I2S_C_FORMAT,
|
|
|
|
OXYGEN_I2S_MASTER |
|
|
|
|
OXYGEN_I2S_MUTE_MCLK);
|
2008-04-09 11:16:33 +04:00
|
|
|
oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
|
|
|
|
OXYGEN_SPDIF_OUT_ENABLE |
|
|
|
|
OXYGEN_SPDIF_LOOPBACK);
|
2008-09-22 11:02:08 +04:00
|
|
|
if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
|
2008-04-09 11:16:33 +04:00
|
|
|
oxygen_write32_masked(chip, OXYGEN_SPDIF_CONTROL,
|
|
|
|
OXYGEN_SPDIF_SENSE_MASK |
|
|
|
|
OXYGEN_SPDIF_LOCK_MASK |
|
|
|
|
OXYGEN_SPDIF_RATE_MASK |
|
|
|
|
OXYGEN_SPDIF_LOCK_PAR |
|
|
|
|
OXYGEN_SPDIF_IN_CLOCK_96,
|
|
|
|
OXYGEN_SPDIF_SENSE_MASK |
|
|
|
|
OXYGEN_SPDIF_LOCK_MASK |
|
|
|
|
OXYGEN_SPDIF_RATE_MASK |
|
|
|
|
OXYGEN_SPDIF_SENSE_PAR |
|
|
|
|
OXYGEN_SPDIF_LOCK_PAR |
|
|
|
|
OXYGEN_SPDIF_IN_CLOCK_MASK);
|
|
|
|
else
|
|
|
|
oxygen_clear_bits32(chip, OXYGEN_SPDIF_CONTROL,
|
|
|
|
OXYGEN_SPDIF_SENSE_MASK |
|
|
|
|
OXYGEN_SPDIF_LOCK_MASK |
|
|
|
|
OXYGEN_SPDIF_RATE_MASK);
|
2007-12-23 21:50:57 +03:00
|
|
|
oxygen_write32(chip, OXYGEN_SPDIF_OUTPUT_BITS, chip->spdif_bits);
|
2008-05-13 11:24:39 +04:00
|
|
|
oxygen_write16(chip, OXYGEN_2WIRE_BUS_STATUS,
|
|
|
|
OXYGEN_2WIRE_LENGTH_8 |
|
|
|
|
OXYGEN_2WIRE_INTERRUPT_MASK |
|
|
|
|
OXYGEN_2WIRE_SPEED_STANDARD);
|
2008-01-25 10:39:26 +03:00
|
|
|
oxygen_clear_bits8(chip, OXYGEN_MPU401_CONTROL, OXYGEN_MPU401_LOOPBACK);
|
|
|
|
oxygen_write8(chip, OXYGEN_GPI_INTERRUPT_MASK, 0);
|
|
|
|
oxygen_write16(chip, OXYGEN_GPIO_INTERRUPT_MASK, 0);
|
2008-01-21 10:44:24 +03:00
|
|
|
oxygen_write16(chip, OXYGEN_PLAY_ROUTING,
|
2008-01-25 10:39:26 +03:00
|
|
|
OXYGEN_PLAY_MULTICH_I2S_DAC |
|
|
|
|
OXYGEN_PLAY_SPDIF_SPDIF |
|
2008-01-21 10:44:24 +03:00
|
|
|
(0 << OXYGEN_PLAY_DAC0_SOURCE_SHIFT) |
|
|
|
|
(1 << OXYGEN_PLAY_DAC1_SOURCE_SHIFT) |
|
|
|
|
(2 << OXYGEN_PLAY_DAC2_SOURCE_SHIFT) |
|
|
|
|
(3 << OXYGEN_PLAY_DAC3_SOURCE_SHIFT));
|
|
|
|
oxygen_write8(chip, OXYGEN_REC_ROUTING,
|
|
|
|
OXYGEN_REC_A_ROUTE_I2S_ADC_1 |
|
2008-01-25 10:39:26 +03:00
|
|
|
OXYGEN_REC_B_ROUTE_I2S_ADC_2 |
|
2008-01-21 10:44:24 +03:00
|
|
|
OXYGEN_REC_C_ROUTE_SPDIF);
|
|
|
|
oxygen_write8(chip, OXYGEN_ADC_MONITOR, 0);
|
|
|
|
oxygen_write8(chip, OXYGEN_A_MONITOR_ROUTING,
|
|
|
|
(0 << OXYGEN_A_MONITOR_ROUTE_0_SHIFT) |
|
|
|
|
(1 << OXYGEN_A_MONITOR_ROUTE_1_SHIFT) |
|
|
|
|
(2 << OXYGEN_A_MONITOR_ROUTE_2_SHIFT) |
|
|
|
|
(3 << OXYGEN_A_MONITOR_ROUTE_3_SHIFT));
|
2007-12-23 21:50:57 +03:00
|
|
|
|
2008-04-09 11:16:33 +04:00
|
|
|
if (chip->has_ac97_0 | chip->has_ac97_1)
|
|
|
|
oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK,
|
|
|
|
OXYGEN_AC97_INT_READ_DONE |
|
|
|
|
OXYGEN_AC97_INT_WRITE_DONE);
|
|
|
|
else
|
|
|
|
oxygen_write8(chip, OXYGEN_AC97_INTERRUPT_MASK, 0);
|
2008-01-25 10:39:26 +03:00
|
|
|
oxygen_write32(chip, OXYGEN_AC97_OUT_CONFIG, 0);
|
|
|
|
oxygen_write32(chip, OXYGEN_AC97_IN_CONFIG, 0);
|
|
|
|
if (!(chip->has_ac97_0 | chip->has_ac97_1))
|
|
|
|
oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL,
|
|
|
|
OXYGEN_AC97_CLOCK_DISABLE);
|
|
|
|
if (!chip->has_ac97_0) {
|
|
|
|
oxygen_set_bits16(chip, OXYGEN_AC97_CONTROL,
|
|
|
|
OXYGEN_AC97_NO_CODEC_0);
|
|
|
|
} else {
|
2008-01-16 10:28:17 +03:00
|
|
|
oxygen_write_ac97(chip, 0, AC97_RESET, 0);
|
|
|
|
msleep(1);
|
2008-01-21 10:50:19 +03:00
|
|
|
oxygen_ac97_set_bits(chip, 0, CM9780_GPIO_SETUP,
|
|
|
|
CM9780_GPIO0IO | CM9780_GPIO1IO);
|
|
|
|
oxygen_ac97_set_bits(chip, 0, CM9780_MIXER,
|
|
|
|
CM9780_BSTSEL | CM9780_STRO_MIC |
|
|
|
|
CM9780_MIX2FR | CM9780_PCBSW);
|
|
|
|
oxygen_ac97_set_bits(chip, 0, CM9780_JACK,
|
|
|
|
CM9780_RSOE | CM9780_CBOE |
|
|
|
|
CM9780_SSOE | CM9780_FROE |
|
|
|
|
CM9780_MIC2MIC | CM9780_LI2LI);
|
2008-01-16 10:28:17 +03:00
|
|
|
oxygen_write_ac97(chip, 0, AC97_MASTER, 0x0000);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_PC_BEEP, 0x8000);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_MIC, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_LINE, 0x0808);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_CD, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_VIDEO, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_AUX, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_REC_GAIN, 0x8000);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_CENTER_LFE_MASTER, 0x8080);
|
|
|
|
oxygen_write_ac97(chip, 0, AC97_SURROUND_MASTER, 0x8080);
|
2008-04-01 12:02:18 +04:00
|
|
|
oxygen_ac97_clear_bits(chip, 0, CM9780_GPIO_STATUS,
|
|
|
|
CM9780_GPO0);
|
2008-01-16 10:28:17 +03:00
|
|
|
/* power down unused ADCs and DACs */
|
|
|
|
oxygen_ac97_set_bits(chip, 0, AC97_POWERDOWN,
|
|
|
|
AC97_PD_PR0 | AC97_PD_PR1);
|
|
|
|
oxygen_ac97_set_bits(chip, 0, AC97_EXTENDED_STATUS,
|
|
|
|
AC97_EA_PRI | AC97_EA_PRJ | AC97_EA_PRK);
|
|
|
|
}
|
2008-01-25 10:39:26 +03:00
|
|
|
if (chip->has_ac97_1) {
|
|
|
|
oxygen_set_bits32(chip, OXYGEN_AC97_OUT_CONFIG,
|
|
|
|
OXYGEN_AC97_CODEC1_SLOT3 |
|
|
|
|
OXYGEN_AC97_CODEC1_SLOT4);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_RESET, 0);
|
|
|
|
msleep(1);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_MASTER, 0x0000);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_HEADPHONE, 0x8000);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_PC_BEEP, 0x8000);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_MIC, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_LINE, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_CD, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_VIDEO, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_AUX, 0x8808);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_PCM, 0x0808);
|
|
|
|
oxygen_write_ac97(chip, 1, AC97_REC_SEL, 0x0000);
|
2008-01-28 10:35:20 +03:00
|
|
|
oxygen_write_ac97(chip, 1, AC97_REC_GAIN, 0x0000);
|
2008-01-25 10:39:26 +03:00
|
|
|
oxygen_ac97_set_bits(chip, 1, 0x6a, 0x0040);
|
|
|
|
}
|
2007-12-23 21:50:57 +03:00
|
|
|
}
|
|
|
|
|
2010-09-07 15:37:10 +04:00
|
|
|
static void oxygen_shutdown(struct oxygen *chip)
|
2007-12-23 21:50:57 +03:00
|
|
|
{
|
|
|
|
spin_lock_irq(&chip->reg_lock);
|
|
|
|
chip->interrupt_mask = 0;
|
|
|
|
chip->pcm_running = 0;
|
|
|
|
oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
|
|
|
|
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
|
|
|
|
spin_unlock_irq(&chip->reg_lock);
|
2010-09-07 15:37:10 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static void oxygen_card_free(struct snd_card *card)
|
|
|
|
{
|
|
|
|
struct oxygen *chip = card->private_data;
|
|
|
|
|
|
|
|
oxygen_shutdown(chip);
|
2008-04-22 15:50:34 +04:00
|
|
|
if (chip->irq >= 0)
|
2007-12-23 21:50:57 +03:00
|
|
|
free_irq(chip->irq, chip);
|
2012-08-21 01:51:24 +04:00
|
|
|
flush_work(&chip->spdif_input_bits_work);
|
|
|
|
flush_work(&chip->gpio_work);
|
2008-09-22 10:55:19 +04:00
|
|
|
chip->model.cleanup(chip);
|
2009-02-19 10:38:25 +03:00
|
|
|
kfree(chip->model_data);
|
2007-12-23 21:50:57 +03:00
|
|
|
mutex_destroy(&chip->mutex);
|
|
|
|
pci_release_regions(chip->pci);
|
|
|
|
pci_disable_device(chip->pci);
|
|
|
|
}
|
|
|
|
|
2008-02-22 20:35:22 +03:00
|
|
|
int oxygen_pci_probe(struct pci_dev *pci, int index, char *id,
|
2009-02-19 10:37:13 +03:00
|
|
|
struct module *owner,
|
2009-02-19 10:42:44 +03:00
|
|
|
const struct pci_device_id *ids,
|
|
|
|
int (*get_model)(struct oxygen *chip,
|
|
|
|
const struct pci_device_id *id
|
|
|
|
)
|
|
|
|
)
|
2007-12-23 21:50:57 +03:00
|
|
|
{
|
|
|
|
struct snd_card *card;
|
|
|
|
struct oxygen *chip;
|
2009-02-19 10:42:44 +03:00
|
|
|
const struct pci_device_id *pci_id;
|
2007-12-23 21:50:57 +03:00
|
|
|
int err;
|
|
|
|
|
2014-01-29 17:20:19 +04:00
|
|
|
err = snd_card_new(&pci->dev, index, id, owner,
|
|
|
|
sizeof(*chip), &card);
|
2008-12-28 18:44:30 +03:00
|
|
|
if (err < 0)
|
|
|
|
return err;
|
2007-12-23 21:50:57 +03:00
|
|
|
|
|
|
|
chip = card->private_data;
|
|
|
|
chip->card = card;
|
|
|
|
chip->pci = pci;
|
|
|
|
chip->irq = -1;
|
|
|
|
spin_lock_init(&chip->reg_lock);
|
|
|
|
mutex_init(&chip->mutex);
|
|
|
|
INIT_WORK(&chip->spdif_input_bits_work,
|
|
|
|
oxygen_spdif_input_bits_changed);
|
2008-01-28 10:36:55 +03:00
|
|
|
INIT_WORK(&chip->gpio_work, oxygen_gpio_changed);
|
2008-01-28 10:34:21 +03:00
|
|
|
init_waitqueue_head(&chip->ac97_waitqueue);
|
2007-12-23 21:50:57 +03:00
|
|
|
|
|
|
|
err = pci_enable_device(pci);
|
|
|
|
if (err < 0)
|
|
|
|
goto err_card;
|
|
|
|
|
2009-02-19 10:38:55 +03:00
|
|
|
err = pci_request_regions(pci, DRIVER);
|
2007-12-23 21:50:57 +03:00
|
|
|
if (err < 0) {
|
2014-02-25 21:00:26 +04:00
|
|
|
dev_err(card->dev, "cannot reserve PCI resources\n");
|
2007-12-23 21:50:57 +03:00
|
|
|
goto err_pci_enable;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!(pci_resource_flags(pci, 0) & IORESOURCE_IO) ||
|
2008-05-13 11:19:53 +04:00
|
|
|
pci_resource_len(pci, 0) < OXYGEN_IO_SIZE) {
|
2014-02-25 21:00:26 +04:00
|
|
|
dev_err(card->dev, "invalid PCI I/O range\n");
|
2007-12-23 21:50:57 +03:00
|
|
|
err = -ENXIO;
|
|
|
|
goto err_pci_regions;
|
|
|
|
}
|
|
|
|
chip->addr = pci_resource_start(pci, 0);
|
|
|
|
|
2009-02-19 10:42:44 +03:00
|
|
|
pci_id = oxygen_search_pci_id(chip, ids);
|
|
|
|
if (!pci_id) {
|
|
|
|
err = -ENODEV;
|
|
|
|
goto err_pci_regions;
|
|
|
|
}
|
2009-02-19 10:44:12 +03:00
|
|
|
oxygen_restore_eeprom(chip, pci_id);
|
2009-02-19 10:42:44 +03:00
|
|
|
err = get_model(chip, pci_id);
|
|
|
|
if (err < 0)
|
|
|
|
goto err_pci_regions;
|
|
|
|
|
2009-02-19 10:38:25 +03:00
|
|
|
if (chip->model.model_data_size) {
|
2009-02-27 11:27:44 +03:00
|
|
|
chip->model_data = kzalloc(chip->model.model_data_size,
|
2009-02-19 10:38:25 +03:00
|
|
|
GFP_KERNEL);
|
|
|
|
if (!chip->model_data) {
|
|
|
|
err = -ENOMEM;
|
|
|
|
goto err_pci_regions;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2007-12-23 21:50:57 +03:00
|
|
|
pci_set_master(pci);
|
|
|
|
card->private_free = oxygen_card_free;
|
|
|
|
|
2010-10-06 12:57:50 +04:00
|
|
|
configure_pcie_bridge(pci);
|
2007-12-23 21:50:57 +03:00
|
|
|
oxygen_init(chip);
|
2008-09-22 10:55:19 +04:00
|
|
|
chip->model.init(chip);
|
2007-12-23 21:50:57 +03:00
|
|
|
|
|
|
|
err = request_irq(pci->irq, oxygen_interrupt, IRQF_SHARED,
|
2011-06-10 18:36:37 +04:00
|
|
|
KBUILD_MODNAME, chip);
|
2007-12-23 21:50:57 +03:00
|
|
|
if (err < 0) {
|
2014-02-25 21:00:26 +04:00
|
|
|
dev_err(card->dev, "cannot grab interrupt %d\n", pci->irq);
|
2007-12-23 21:50:57 +03:00
|
|
|
goto err_card;
|
|
|
|
}
|
|
|
|
chip->irq = pci->irq;
|
2019-12-10 09:34:28 +03:00
|
|
|
card->sync_irq = chip->irq;
|
2007-12-23 21:50:57 +03:00
|
|
|
|
2008-09-22 10:55:19 +04:00
|
|
|
strcpy(card->driver, chip->model.chip);
|
|
|
|
strcpy(card->shortname, chip->model.shortname);
|
2011-01-10 18:36:23 +03:00
|
|
|
sprintf(card->longname, "%s at %#lx, irq %i",
|
|
|
|
chip->model.longname, chip->addr, chip->irq);
|
2008-09-22 10:55:19 +04:00
|
|
|
strcpy(card->mixername, chip->model.chip);
|
|
|
|
snd_component_add(card, chip->model.chip);
|
2007-12-23 21:50:57 +03:00
|
|
|
|
|
|
|
err = oxygen_pcm_init(chip);
|
|
|
|
if (err < 0)
|
|
|
|
goto err_card;
|
|
|
|
|
|
|
|
err = oxygen_mixer_init(chip);
|
|
|
|
if (err < 0)
|
|
|
|
goto err_card;
|
|
|
|
|
2008-09-22 11:03:42 +04:00
|
|
|
if (chip->model.device_config & (MIDI_OUTPUT | MIDI_INPUT)) {
|
ALSA: mpu401: clean up interrupt specification
The semantics of snd_mpu401_uart_new()'s interrupt parameters are
somewhat counterintuitive: To prevent the function from allocating its
own interrupt, either the irq number must be invalid, or the irq_flags
parameter must be zero. At the same time, the irq parameter being
invalid specifies that the mpu401 code has to work without an interrupt
allocated by the caller. This implies that, if there is an interrupt
and it is allocated by the caller, the irq parameter must be set to
a valid-looking number which then isn't actually used.
With the removal of IRQF_DISABLED, zero becomes a valid irq_flags value,
which forces us to handle the parameters differently.
This patch introduces a new flag MPU401_INFO_IRQ_HOOK for when the
device interrupt is handled by the caller, and makes the allocation of
the interrupt to depend only on the irq parameter. As suggested by
Takashi, the irq_flags parameter was dropped because, when used, it had
the constant value IRQF_DISABLED.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2011-09-13 13:24:41 +04:00
|
|
|
unsigned int info_flags =
|
|
|
|
MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK;
|
2008-09-22 11:03:42 +04:00
|
|
|
if (chip->model.device_config & MIDI_OUTPUT)
|
|
|
|
info_flags |= MPU401_INFO_OUTPUT;
|
|
|
|
if (chip->model.device_config & MIDI_INPUT)
|
|
|
|
info_flags |= MPU401_INFO_INPUT;
|
2007-12-23 21:50:57 +03:00
|
|
|
err = snd_mpu401_uart_new(card, 0, MPU401_HW_CMIPCI,
|
|
|
|
chip->addr + OXYGEN_MPU401,
|
ALSA: mpu401: clean up interrupt specification
The semantics of snd_mpu401_uart_new()'s interrupt parameters are
somewhat counterintuitive: To prevent the function from allocating its
own interrupt, either the irq number must be invalid, or the irq_flags
parameter must be zero. At the same time, the irq parameter being
invalid specifies that the mpu401 code has to work without an interrupt
allocated by the caller. This implies that, if there is an interrupt
and it is allocated by the caller, the irq parameter must be set to
a valid-looking number which then isn't actually used.
With the removal of IRQF_DISABLED, zero becomes a valid irq_flags value,
which forces us to handle the parameters differently.
This patch introduces a new flag MPU401_INFO_IRQ_HOOK for when the
device interrupt is handled by the caller, and makes the allocation of
the interrupt to depend only on the irq parameter. As suggested by
Takashi, the irq_flags parameter was dropped because, when used, it had
the constant value IRQF_DISABLED.
Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2011-09-13 13:24:41 +04:00
|
|
|
info_flags, -1, &chip->midi);
|
2007-12-23 21:50:57 +03:00
|
|
|
if (err < 0)
|
|
|
|
goto err_card;
|
|
|
|
}
|
|
|
|
|
|
|
|
oxygen_proc_init(chip);
|
|
|
|
|
|
|
|
spin_lock_irq(&chip->reg_lock);
|
2008-09-22 11:02:08 +04:00
|
|
|
if (chip->model.device_config & CAPTURE_1_FROM_SPDIF)
|
2008-04-09 11:16:33 +04:00
|
|
|
chip->interrupt_mask |= OXYGEN_INT_SPDIF_IN_DETECT;
|
|
|
|
if (chip->has_ac97_0 | chip->has_ac97_1)
|
|
|
|
chip->interrupt_mask |= OXYGEN_INT_AC97;
|
2007-12-23 21:50:57 +03:00
|
|
|
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
|
|
|
|
spin_unlock_irq(&chip->reg_lock);
|
|
|
|
|
|
|
|
err = snd_card_register(card);
|
|
|
|
if (err < 0)
|
|
|
|
goto err_card;
|
|
|
|
|
|
|
|
pci_set_drvdata(pci, card);
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
err_pci_regions:
|
|
|
|
pci_release_regions(pci);
|
|
|
|
err_pci_enable:
|
|
|
|
pci_disable_device(pci);
|
|
|
|
err_card:
|
|
|
|
snd_card_free(card);
|
|
|
|
return err;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(oxygen_pci_probe);
|
|
|
|
|
2008-02-22 20:35:22 +03:00
|
|
|
void oxygen_pci_remove(struct pci_dev *pci)
|
2007-12-23 21:50:57 +03:00
|
|
|
{
|
|
|
|
snd_card_free(pci_get_drvdata(pci));
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(oxygen_pci_remove);
|
2008-05-13 11:24:39 +04:00
|
|
|
|
2012-08-14 20:12:04 +04:00
|
|
|
#ifdef CONFIG_PM_SLEEP
|
2012-07-02 17:20:37 +04:00
|
|
|
static int oxygen_pci_suspend(struct device *dev)
|
2008-05-13 11:24:39 +04:00
|
|
|
{
|
2012-07-02 17:20:37 +04:00
|
|
|
struct snd_card *card = dev_get_drvdata(dev);
|
2008-05-13 11:24:39 +04:00
|
|
|
struct oxygen *chip = card->private_data;
|
2019-01-11 20:02:51 +03:00
|
|
|
unsigned int saved_interrupt_mask;
|
2008-05-13 11:24:39 +04:00
|
|
|
|
|
|
|
snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
|
|
|
|
|
2008-09-22 10:55:19 +04:00
|
|
|
if (chip->model.suspend)
|
|
|
|
chip->model.suspend(chip);
|
2008-05-13 11:24:39 +04:00
|
|
|
|
|
|
|
spin_lock_irq(&chip->reg_lock);
|
|
|
|
saved_interrupt_mask = chip->interrupt_mask;
|
|
|
|
chip->interrupt_mask = 0;
|
|
|
|
oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
|
|
|
|
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
|
|
|
|
spin_unlock_irq(&chip->reg_lock);
|
|
|
|
|
2012-08-21 01:51:24 +04:00
|
|
|
flush_work(&chip->spdif_input_bits_work);
|
|
|
|
flush_work(&chip->gpio_work);
|
2008-05-13 11:24:39 +04:00
|
|
|
chip->interrupt_mask = saved_interrupt_mask;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const u32 registers_to_restore[OXYGEN_IO_SIZE / 32] = {
|
|
|
|
0xffffffff, 0x00ff077f, 0x00011d08, 0x007f00ff,
|
|
|
|
0x00300000, 0x00000fe4, 0x0ff7001f, 0x00000000
|
|
|
|
};
|
|
|
|
static const u32 ac97_registers_to_restore[2][0x40 / 32] = {
|
|
|
|
{ 0x18284fa2, 0x03060000 },
|
|
|
|
{ 0x00007fa6, 0x00200000 }
|
|
|
|
};
|
|
|
|
|
|
|
|
static inline int is_bit_set(const u32 *bitmap, unsigned int bit)
|
|
|
|
{
|
|
|
|
return bitmap[bit / 32] & (1 << (bit & 31));
|
|
|
|
}
|
|
|
|
|
|
|
|
static void oxygen_restore_ac97(struct oxygen *chip, unsigned int codec)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
oxygen_write_ac97(chip, codec, AC97_RESET, 0);
|
|
|
|
msleep(1);
|
|
|
|
for (i = 1; i < 0x40; ++i)
|
|
|
|
if (is_bit_set(ac97_registers_to_restore[codec], i))
|
|
|
|
oxygen_write_ac97(chip, codec, i * 2,
|
|
|
|
chip->saved_ac97_registers[codec][i]);
|
|
|
|
}
|
|
|
|
|
2012-07-02 17:20:37 +04:00
|
|
|
static int oxygen_pci_resume(struct device *dev)
|
2008-05-13 11:24:39 +04:00
|
|
|
{
|
2012-07-02 17:20:37 +04:00
|
|
|
struct snd_card *card = dev_get_drvdata(dev);
|
2008-05-13 11:24:39 +04:00
|
|
|
struct oxygen *chip = card->private_data;
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
oxygen_write16(chip, OXYGEN_DMA_STATUS, 0);
|
|
|
|
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, 0);
|
|
|
|
for (i = 0; i < OXYGEN_IO_SIZE; ++i)
|
|
|
|
if (is_bit_set(registers_to_restore, i))
|
|
|
|
oxygen_write8(chip, i, chip->saved_registers._8[i]);
|
|
|
|
if (chip->has_ac97_0)
|
|
|
|
oxygen_restore_ac97(chip, 0);
|
|
|
|
if (chip->has_ac97_1)
|
|
|
|
oxygen_restore_ac97(chip, 1);
|
|
|
|
|
2008-09-22 10:55:19 +04:00
|
|
|
if (chip->model.resume)
|
|
|
|
chip->model.resume(chip);
|
2008-05-13 11:24:39 +04:00
|
|
|
|
|
|
|
oxygen_write16(chip, OXYGEN_INTERRUPT_MASK, chip->interrupt_mask);
|
|
|
|
|
|
|
|
snd_power_change_state(card, SNDRV_CTL_POWER_D0);
|
|
|
|
return 0;
|
|
|
|
}
|
2012-07-02 17:20:37 +04:00
|
|
|
|
|
|
|
SIMPLE_DEV_PM_OPS(oxygen_pci_pm, oxygen_pci_suspend, oxygen_pci_resume);
|
|
|
|
EXPORT_SYMBOL(oxygen_pci_pm);
|
2012-08-14 20:12:04 +04:00
|
|
|
#endif /* CONFIG_PM_SLEEP */
|
2010-09-07 15:37:10 +04:00
|
|
|
|
|
|
|
void oxygen_pci_shutdown(struct pci_dev *pci)
|
|
|
|
{
|
|
|
|
struct snd_card *card = pci_get_drvdata(pci);
|
|
|
|
struct oxygen *chip = card->private_data;
|
|
|
|
|
|
|
|
oxygen_shutdown(chip);
|
|
|
|
chip->model.cleanup(chip);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(oxygen_pci_shutdown);
|