2019-12-14 17:37:31 +03:00
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.. SPDX-License-Identifier: GPL-2.0
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Kernel driver max16601
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======================
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Supported chips:
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2021-01-25 21:53:27 +03:00
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* Maxim MAX16508
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Prefix: 'max16508'
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Addresses scanned: -
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Datasheet: Not published
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2023-01-24 19:15:08 +03:00
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* Maxim MAX16600
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Prefix: 'max16600'
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Addresses scanned: -
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Datasheet: Not published
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2019-12-14 17:37:31 +03:00
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* Maxim MAX16601
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Prefix: 'max16601'
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Addresses scanned: -
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Datasheet: Not published
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2022-04-15 16:34:29 +03:00
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* Maxim MAX16602
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Prefix: 'max16602'
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Addresses scanned: -
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Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX16602.pdf
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2019-12-14 17:37:31 +03:00
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Author: Guenter Roeck <linux@roeck-us.net>
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Description
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-----------
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2021-01-25 21:53:27 +03:00
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This driver supports the MAX16508 VR13 Dual-Output Voltage Regulator
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2023-01-24 19:15:08 +03:00
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as well as the MAX16600, MAX16601, and MAX16602 VR13.HC Dual-Output
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Voltage Regulator chipsets.
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2019-12-14 17:37:31 +03:00
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The driver is a client driver to the core PMBus driver.
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Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
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Usage Notes
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-----------
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This driver does not auto-detect devices. You will have to instantiate the
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devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
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details.
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Platform data support
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---------------------
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The driver supports standard PMBus driver platform data.
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Sysfs entries
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-------------
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The following attributes are supported.
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2021-01-25 21:53:26 +03:00
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=============================== ===============================================
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in1_label "vin1"
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in1_input VCORE input voltage.
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in1_alarm Input voltage alarm.
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in2_label "vout1"
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in2_input VCORE output voltage.
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in2_alarm Output voltage alarm.
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curr1_label "iin1"
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curr1_input VCORE input current, derived from duty cycle
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and output current.
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curr1_max Maximum input current.
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curr1_max_alarm Current high alarm.
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curr[P+2]_label "iin1.P"
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curr[P+2]_input VCORE phase P input current.
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curr[N+2]_label "iin2"
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curr[N+2]_input VCORE input current, derived from sensor
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element.
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'N' is the number of enabled/populated phases.
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curr[N+3]_label "iin3"
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curr[N+3]_input VSA input current.
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curr[N+4]_label "iout1"
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curr[N+4]_input VCORE output current.
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curr[N+4]_crit Critical output current.
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curr[N+4]_crit_alarm Output current critical alarm.
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curr[N+4]_max Maximum output current.
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curr[N+4]_max_alarm Output current high alarm.
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curr[N+P+5]_label "iout1.P"
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curr[N+P+5]_input VCORE phase P output current.
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curr[2*N+5]_label "iout3"
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curr[2*N+5]_input VSA output current.
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curr[2*N+5]_highest Historical maximum VSA output current.
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curr[2*N+5]_reset_history Write any value to reset curr21_highest.
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curr[2*N+5]_crit Critical output current.
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curr[2*N+5]_crit_alarm Output current critical alarm.
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curr[2*N+5]_max Maximum output current.
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curr[2*N+5]_max_alarm Output current high alarm.
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power1_label "pin1"
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power1_input Input power, derived from duty cycle and output
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current.
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power1_alarm Input power alarm.
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power2_label "pin2"
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power2_input Input power, derived from input current sensor.
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power3_label "pout"
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power3_input Output power.
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temp1_input VCORE temperature.
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temp1_crit Critical high temperature.
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temp1_crit_alarm Chip temperature critical high alarm.
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temp1_max Maximum temperature.
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temp1_max_alarm Chip temperature high alarm.
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temp2_input TSENSE_0 temperature
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temp3_input TSENSE_1 temperature
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temp4_input TSENSE_2 temperature
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temp5_input TSENSE_3 temperature
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temp6_input VSA temperature.
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temp6_crit Critical high temperature.
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temp6_crit_alarm Chip temperature critical high alarm.
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temp6_max Maximum temperature.
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temp6_max_alarm Chip temperature high alarm.
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=============================== ===============================================
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