2006-08-30 02:12:40 +04:00
|
|
|
/*
|
|
|
|
* pata_opti.c - ATI PATA for new ATA layer
|
|
|
|
* (C) 2005 Red Hat Inc
|
|
|
|
*
|
|
|
|
* Based on
|
|
|
|
* linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002
|
|
|
|
*
|
|
|
|
* Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
|
|
|
|
*
|
|
|
|
* Authors:
|
|
|
|
* Jaromir Koutek <miri@punknet.cz>,
|
|
|
|
* Jan Harkes <jaharkes@cwi.nl>,
|
|
|
|
* Mark Lord <mlord@pobox.com>
|
|
|
|
* Some parts of code are from ali14xx.c and from rz1000.c.
|
|
|
|
*
|
|
|
|
* Also consulted the FreeBSD prototype driver by Kevin Day to try
|
|
|
|
* and resolve some confusions. Further documentation can be found in
|
|
|
|
* Ralf Brown's interrupt list
|
|
|
|
*
|
|
|
|
* If you have other variants of the Opti range (Viper/Vendetta) please
|
|
|
|
* try this driver with those PCI idents and report back. For the later
|
|
|
|
* chips see the pata_optidma driver
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/kernel.h>
|
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/pci.h>
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/blkdev.h>
|
|
|
|
#include <linux/delay.h>
|
|
|
|
#include <scsi/scsi_host.h>
|
|
|
|
#include <linux/libata.h>
|
|
|
|
|
|
|
|
#define DRV_NAME "pata_opti"
|
2007-03-09 15:24:15 +03:00
|
|
|
#define DRV_VERSION "0.2.9"
|
2006-08-30 02:12:40 +04:00
|
|
|
|
|
|
|
enum {
|
|
|
|
READ_REG = 0, /* index of Read cycle timing register */
|
|
|
|
WRITE_REG = 1, /* index of Write cycle timing register */
|
|
|
|
CNTRL_REG = 3, /* index of Control register */
|
|
|
|
STRAP_REG = 5, /* index of Strap register */
|
|
|
|
MISC_REG = 6 /* index of Miscellaneous register */
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* opti_pre_reset - probe begin
|
2007-08-06 13:36:23 +04:00
|
|
|
* @link: ATA link
|
libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it.
ata_wait_ready() which directly takes @deadline is implemented to be
used as the wait function. This patch is in preparation for EH timing
improvements.
* ata_wait_ready() never does busy sleep. It's only used from EH and
no wait in EH is that urgent. This function also prints 'be
patient' message automatically after 5 secs of waiting if more than
3 secs is remaining till deadline.
* ata_bus_post_reset() now fails with error code if any of its wait
fails. This is important because earlier reset tries will have
shorter timeout than the spec requires. If a device fails to
respond before the short timeout, reset should be retried with
longer timeout rather than silently ignoring the device.
There are three behavior differences.
1. Timeout is applied to both devices at once, not separately. This
is more consistent with what the spec says.
2. When a device passes devchk but fails to become ready before
deadline. Previouly, post_reset would just succeed and let
device classification remove the device. New code fails the
reset thus causing reset retry. After a few times, EH will give
up disabling the port.
3. When slave device passes devchk but fails to become accessible
(TF-wise) after reset. Original code disables dev1 after 30s
timeout and continues as if the device doesn't exist, while the
patched code fails reset. When this happens, new code fails
reset on whole port rather than proceeding with only the primary
device.
If the failing device is suffering transient problems, new code
retries reset which is a better behavior. If the failing device is
actually broken, the net effect is identical to it, but not to the
other device sharing the channel. In the previous code, reset would
have succeeded after 30s thus detecting the working one. In the new
code, reset fails and whole port gets disabled. IMO, it's a
pathological case anyway (broken device sharing bus with working
one) and doesn't really matter.
* ata_bus_softreset() is changed to return error code from
ata_bus_post_reset(). It used to return 0 unconditionally.
* Spin up waiting is to be removed and not converted to honor
deadline.
* To be on the safe side, deadline is set to 40s for the time being.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 10:50:52 +03:00
|
|
|
* @deadline: deadline jiffies for the operation
|
2006-08-30 02:12:40 +04:00
|
|
|
*
|
|
|
|
* Set up cable type and use generic probe init
|
|
|
|
*/
|
|
|
|
|
2007-08-06 13:36:23 +04:00
|
|
|
static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
|
2006-08-30 02:12:40 +04:00
|
|
|
{
|
2007-08-06 13:36:23 +04:00
|
|
|
struct ata_port *ap = link->ap;
|
2006-08-30 02:12:40 +04:00
|
|
|
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
|
|
|
|
static const struct pci_bits opti_enable_bits[] = {
|
|
|
|
{ 0x45, 1, 0x80, 0x00 },
|
|
|
|
{ 0x40, 1, 0x08, 0x00 }
|
|
|
|
};
|
|
|
|
|
2006-09-26 20:53:38 +04:00
|
|
|
if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
|
|
|
|
return -ENOENT;
|
libata: add deadline support to prereset and reset methods
Add @deadline to prereset and reset methods and make them honor it.
ata_wait_ready() which directly takes @deadline is implemented to be
used as the wait function. This patch is in preparation for EH timing
improvements.
* ata_wait_ready() never does busy sleep. It's only used from EH and
no wait in EH is that urgent. This function also prints 'be
patient' message automatically after 5 secs of waiting if more than
3 secs is remaining till deadline.
* ata_bus_post_reset() now fails with error code if any of its wait
fails. This is important because earlier reset tries will have
shorter timeout than the spec requires. If a device fails to
respond before the short timeout, reset should be retried with
longer timeout rather than silently ignoring the device.
There are three behavior differences.
1. Timeout is applied to both devices at once, not separately. This
is more consistent with what the spec says.
2. When a device passes devchk but fails to become ready before
deadline. Previouly, post_reset would just succeed and let
device classification remove the device. New code fails the
reset thus causing reset retry. After a few times, EH will give
up disabling the port.
3. When slave device passes devchk but fails to become accessible
(TF-wise) after reset. Original code disables dev1 after 30s
timeout and continues as if the device doesn't exist, while the
patched code fails reset. When this happens, new code fails
reset on whole port rather than proceeding with only the primary
device.
If the failing device is suffering transient problems, new code
retries reset which is a better behavior. If the failing device is
actually broken, the net effect is identical to it, but not to the
other device sharing the channel. In the previous code, reset would
have succeeded after 30s thus detecting the working one. In the new
code, reset fails and whole port gets disabled. IMO, it's a
pathological case anyway (broken device sharing bus with working
one) and doesn't really matter.
* ata_bus_softreset() is changed to return error code from
ata_bus_post_reset(). It used to return 0 unconditionally.
* Spin up waiting is to be removed and not converted to honor
deadline.
* To be on the safe side, deadline is set to 40s for the time being.
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-02-02 10:50:52 +03:00
|
|
|
|
2008-04-07 17:47:16 +04:00
|
|
|
return ata_sff_prereset(link, deadline);
|
2006-08-30 02:12:40 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* opti_write_reg - control register setup
|
|
|
|
* @ap: ATA port
|
|
|
|
* @value: value
|
|
|
|
* @reg: control register number
|
|
|
|
*
|
|
|
|
* The Opti uses magic 'trapdoor' register accesses to do configuration
|
|
|
|
* rather than using PCI space as other controllers do. The double inw
|
|
|
|
* on the error register activates configuration mode. We can then write
|
|
|
|
* the control register
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
|
|
|
|
{
|
2007-02-01 09:06:36 +03:00
|
|
|
void __iomem *regio = ap->ioaddr.cmd_addr;
|
2006-08-30 02:12:40 +04:00
|
|
|
|
|
|
|
/* These 3 unlock the control register access */
|
2007-02-01 09:06:36 +03:00
|
|
|
ioread16(regio + 1);
|
|
|
|
ioread16(regio + 1);
|
|
|
|
iowrite8(3, regio + 2);
|
2006-08-30 02:12:40 +04:00
|
|
|
|
|
|
|
/* Do the I/O */
|
2007-02-01 09:06:36 +03:00
|
|
|
iowrite8(val, regio + reg);
|
2006-08-30 02:12:40 +04:00
|
|
|
|
|
|
|
/* Relock */
|
2007-02-01 09:06:36 +03:00
|
|
|
iowrite8(0x83, regio + 2);
|
2006-08-30 02:12:40 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* opti_set_piomode - set initial PIO mode data
|
|
|
|
* @ap: ATA interface
|
|
|
|
* @adev: ATA device
|
|
|
|
*
|
|
|
|
* Called to do the PIO mode setup. Timing numbers are taken from
|
|
|
|
* the FreeBSD driver then pre computed to keep the code clean. There
|
|
|
|
* are two tables depending on the hardware clock speed.
|
|
|
|
*/
|
|
|
|
|
|
|
|
static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
|
|
|
|
{
|
|
|
|
struct ata_device *pair = ata_dev_pair(adev);
|
|
|
|
int clock;
|
|
|
|
int pio = adev->pio_mode - XFER_PIO_0;
|
2007-02-01 09:06:36 +03:00
|
|
|
void __iomem *regio = ap->ioaddr.cmd_addr;
|
2006-08-30 02:12:40 +04:00
|
|
|
u8 addr;
|
|
|
|
|
|
|
|
/* Address table precomputed with prefetch off and a DCLK of 2 */
|
|
|
|
static const u8 addr_timing[2][5] = {
|
|
|
|
{ 0x30, 0x20, 0x20, 0x10, 0x10 },
|
|
|
|
{ 0x20, 0x20, 0x10, 0x10, 0x10 }
|
|
|
|
};
|
|
|
|
static const u8 data_rec_timing[2][5] = {
|
|
|
|
{ 0x6B, 0x56, 0x42, 0x32, 0x31 },
|
|
|
|
{ 0x58, 0x44, 0x32, 0x22, 0x21 }
|
|
|
|
};
|
|
|
|
|
2007-02-01 09:06:36 +03:00
|
|
|
iowrite8(0xff, regio + 5);
|
|
|
|
clock = ioread16(regio + 5) & 1;
|
2006-08-30 02:12:40 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* As with many controllers the address setup time is shared
|
|
|
|
* and must suit both devices if present.
|
|
|
|
*/
|
|
|
|
|
|
|
|
addr = addr_timing[clock][pio];
|
|
|
|
if (pair) {
|
|
|
|
/* Hardware constraint */
|
|
|
|
u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
|
|
|
|
if (pair_addr > addr)
|
|
|
|
addr = pair_addr;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Commence primary programming sequence */
|
|
|
|
opti_write_reg(ap, adev->devno, MISC_REG);
|
|
|
|
opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
|
|
|
|
opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
|
|
|
|
opti_write_reg(ap, addr, MISC_REG);
|
|
|
|
|
|
|
|
/* Programming sequence complete, override strapping */
|
|
|
|
opti_write_reg(ap, 0x85, CNTRL_REG);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct scsi_host_template opti_sht = {
|
2008-03-25 06:22:49 +03:00
|
|
|
ATA_PIO_SHT(DRV_NAME),
|
2006-08-30 02:12:40 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct ata_port_operations opti_port_ops = {
|
libata: implement and use ops inheritance
libata lets low level drivers build ata_port_operations table and
register it with libata core layer. This allows low level drivers
high level of flexibility but also burdens them with lots of
boilerplate entries.
This becomes worse for drivers which support related similar
controllers which differ slightly. They share most of the operations
except for a few. However, the driver still needs to list all
operations for each variant. This results in large number of
duplicate entries, which is not only inefficient but also error-prone
as it becomes very difficult to tell what the actual differences are.
This duplicate boilerplates all over the low level drivers also make
updating the core layer exteremely difficult and error-prone. When
compounded with multi-branched development model, it ends up
accumulating inconsistencies over time. Some of those inconsistencies
cause immediate problems and fixed. Others just remain there dormant
making maintenance increasingly difficult.
To rectify the problem, this patch implements ata_port_operations
inheritance. To allow LLDs to easily re-use their own ops tables
overriding only specific methods, this patch implements poor man's
class inheritance. An ops table has ->inherits field which can be set
to any ops table as long as it doesn't create a loop. When the host
is started, the inheritance chain is followed and any operation which
isn't specified is taken from the nearest ancestor which has it
specified. This operation is called finalization and done only once
per an ops table and the LLD doesn't have to do anything special about
it other than making the ops table non-const such that libata can
update it.
libata provides four base ops tables lower drivers can inherit from -
base, sata, pmp, sff and bmdma. To avoid overriding these ops
accidentaly, these ops are declared const and LLDs should always
inherit these instead of using them directly.
After finalization, all the ops table are identical before and after
the patch except for setting .irq_handler to ata_interrupt in drivers
which didn't use to. The .irq_handler doesn't have any actual effect
and the field will soon be removed by later patch.
* sata_sx4 is still using old style EH and currently doesn't take
advantage of ops inheritance.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:49 +03:00
|
|
|
.inherits = &ata_sff_port_ops,
|
|
|
|
.cable_detect = ata_cable_40wire,
|
2006-08-30 02:12:40 +04:00
|
|
|
.set_piomode = opti_set_piomode,
|
libata: make reset related methods proper port operations
Currently reset methods are not specified directly in the
ata_port_operations table. If a LLD wants to use custom reset
methods, it should construct and use a error_handler which uses those
reset methods. It's done this way for two reasons.
First, the ops table already contained too many methods and adding
four more of them would noticeably increase the amount of necessary
boilerplate code all over low level drivers.
Second, as ->error_handler uses those reset methods, it can get
confusing. ie. By overriding ->error_handler, those reset ops can be
made useless making layering a bit hazy.
Now that ops table uses inheritance, the first problem doesn't exist
anymore. The second isn't completely solved but is relieved by
providing default values - most drivers can just override what it has
implemented and don't have to concern itself about higher level
callbacks. In fact, there currently is no driver which actually
modifies error handling behavior. Drivers which override
->error_handler just wraps the standard error handler only to prepare
the controller for EH. I don't think making ops layering strict has
any noticeable benefit.
This patch makes ->prereset, ->softreset, ->hardreset, ->postreset and
their PMP counterparts propoer ops. Default ops are provided in the
base ops tables and drivers are converted to override individual reset
methods instead of creating custom error_handler.
* ata_std_error_handler() doesn't use sata_std_hardreset() if SCRs
aren't accessible. sata_promise doesn't need to use separate
error_handlers for PATA and SATA anymore.
* softreset is broken for sata_inic162x and sata_sx4. As libata now
always prefers hardreset, this doesn't really matter but the ops are
forced to NULL using ATA_OP_NULL for documentation purpose.
* pata_hpt374 needs to use different prereset for the first and second
PCI functions. This used to be done by branching from
hpt374_error_handler(). The proper way to do this is to use
separate ops and port_info tables for each function. Converted.
Signed-off-by: Tejun Heo <htejun@gmail.com>
2008-03-25 06:22:50 +03:00
|
|
|
.prereset = opti_pre_reset,
|
2006-08-30 02:12:40 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
|
|
|
|
{
|
2007-05-04 14:43:58 +04:00
|
|
|
static const struct ata_port_info info = {
|
2007-05-28 14:59:48 +04:00
|
|
|
.flags = ATA_FLAG_SLAVE_POSS,
|
2006-08-30 02:12:40 +04:00
|
|
|
.pio_mask = 0x1f,
|
|
|
|
.port_ops = &opti_port_ops
|
|
|
|
};
|
2007-05-04 14:43:58 +04:00
|
|
|
const struct ata_port_info *ppi[] = { &info, NULL };
|
2006-08-30 02:12:40 +04:00
|
|
|
static int printed_version;
|
|
|
|
|
|
|
|
if (!printed_version++)
|
|
|
|
dev_printk(KERN_DEBUG, &dev->dev, "version " DRV_VERSION "\n");
|
|
|
|
|
2008-04-07 17:47:16 +04:00
|
|
|
return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL);
|
2006-08-30 02:12:40 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static const struct pci_device_id opti[] = {
|
2006-09-29 04:21:59 +04:00
|
|
|
{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
|
|
|
|
{ PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
|
|
|
|
|
|
|
|
{ },
|
2006-08-30 02:12:40 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
static struct pci_driver opti_pci_driver = {
|
2006-09-29 04:21:59 +04:00
|
|
|
.name = DRV_NAME,
|
2006-08-30 02:12:40 +04:00
|
|
|
.id_table = opti,
|
|
|
|
.probe = opti_init_one,
|
2006-11-22 19:57:36 +03:00
|
|
|
.remove = ata_pci_remove_one,
|
2007-03-02 11:31:26 +03:00
|
|
|
#ifdef CONFIG_PM
|
2006-11-22 19:57:36 +03:00
|
|
|
.suspend = ata_pci_device_suspend,
|
|
|
|
.resume = ata_pci_device_resume,
|
2007-03-02 11:31:26 +03:00
|
|
|
#endif
|
2006-08-30 02:12:40 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
static int __init opti_init(void)
|
|
|
|
{
|
|
|
|
return pci_register_driver(&opti_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void __exit opti_exit(void)
|
|
|
|
{
|
|
|
|
pci_unregister_driver(&opti_pci_driver);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
MODULE_AUTHOR("Alan Cox");
|
|
|
|
MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
|
|
|
|
MODULE_LICENSE("GPL");
|
|
|
|
MODULE_DEVICE_TABLE(pci, opti);
|
|
|
|
MODULE_VERSION(DRV_VERSION);
|
|
|
|
|
|
|
|
module_init(opti_init);
|
|
|
|
module_exit(opti_exit);
|