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WSL2-Linux-Kernel/arch/arm/boot/dts/vt8500.dtsi

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arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
/*
* vt8500.dtsi - Device tree file for VIA VT8500 SoC
*
* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
*
* Licensed under GPLv2 or later
*/
/include/ "skeleton.dtsi"
/ {
compatible = "via,vt8500";
soc {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
ranges;
interrupt-parent = <&intc>;
intc: interrupt-controller@d8140000 {
compatible = "via,vt8500-intc";
interrupt-controller;
reg = <0xd8140000 0x10000>;
#interrupt-cells = <1>;
};
arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver This patch adds pinctrl nodes to the VIA VT8500 and Wondermedia SoC dtsi files to support the pinctrl driver. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-20 00:52:23 +04:00
pinctrl: pinctrl@d8110000 {
compatible = "via,vt8500-pinctrl";
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
reg = <0xd8110000 0x10000>;
arm: dts: vt8500: Update Wondermedia SoC dtsi files for pinctrl driver This patch adds pinctrl nodes to the VIA VT8500 and Wondermedia SoC dtsi files to support the pinctrl driver. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2013-02-20 00:52:23 +04:00
interrupt-controller;
#interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
};
pmc@d8130000 {
compatible = "via,vt8500-pmc";
reg = <0xd8130000 0x1000>;
clocks {
#address-cells = <1>;
#size-cells = <0>;
ref24: ref24M {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24000000>;
};
serial: vt8500: UART uses gated clock rather than 24Mhz reference UART modules on Wondermedia SoCs are connected via a gated clock source, rather than directly to the 24Mhz reference clock. While uboot enables UART0 for debugging, other UART ports are unavailable until the clock is enabled. This patch checks that a valid clock is actually passed from devicetree, enables the clock in probe. This change removes the fallback when a clock was not specified as it doesn't apply any longer (and would only work if the UART clock was already enabled). DTSI files are updated for VT8500, WM8505 and WM8650. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-18 06:05:31 +04:00
clkuart0: uart0 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x250>;
enable-bit = <1>;
};
clkuart1: uart1 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x250>;
enable-bit = <2>;
};
clkuart2: uart2 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x250>;
enable-bit = <3>;
};
clkuart3: uart3 {
#clock-cells = <0>;
compatible = "via,vt8500-device-clock";
clocks = <&ref24>;
enable-reg = <0x250>;
enable-bit = <4>;
};
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
};
};
timer@d8130100 {
compatible = "via,vt8500-timer";
reg = <0xd8130100 0x28>;
interrupts = <36>;
};
ehci@d8007900 {
compatible = "via,vt8500-ehci";
reg = <0xd8007900 0x200>;
interrupts = <43>;
};
uhci@d8007b00 {
compatible = "platform-uhci";
reg = <0xd8007b00 0x200>;
interrupts = <43>;
};
video: fb: vt8500: Convert framebuffer drivers to standardized binding Now that a display timing binding is available, convert our almost identical binding to use the standard binding. This patch converts the vt8500 and wm8505 framebuffer drivers and associated dts/dtsi files to use the standard binding as defined in bindings/video/display-timing.txt. There are two side-effects of making this conversion: 1) The fb node should now be in the board file, rather than the soc file as the display-timing node is a child of the fb node. 2) We still require a bits per pixel property to initialize the framebuffer for the different lcd panels. Rather than including this as part of the display timing, it is moved into the framebuffer node. I have also taken the opportunity to alphabetise the includes of each driver to avoid double-ups. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2013-04-02 22:20:38 +04:00
fb: fb@d8050800 {
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
compatible = "via,vt8500-fb";
reg = <0xd800e400 0x400>;
interrupts = <12>;
};
ge_rops@d8050400 {
compatible = "wm,prizm-ge-rops";
reg = <0xd8050400 0x100>;
};
uart@d8200000 {
compatible = "via,vt8500-uart";
reg = <0xd8200000 0x1040>;
interrupts = <32>;
serial: vt8500: UART uses gated clock rather than 24Mhz reference UART modules on Wondermedia SoCs are connected via a gated clock source, rather than directly to the 24Mhz reference clock. While uboot enables UART0 for debugging, other UART ports are unavailable until the clock is enabled. This patch checks that a valid clock is actually passed from devicetree, enables the clock in probe. This change removes the fallback when a clock was not specified as it doesn't apply any longer (and would only work if the UART clock was already enabled). DTSI files are updated for VT8500, WM8505 and WM8650. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-18 06:05:31 +04:00
clocks = <&clkuart0>;
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
};
uart@d82b0000 {
compatible = "via,vt8500-uart";
reg = <0xd82b0000 0x1040>;
interrupts = <33>;
serial: vt8500: UART uses gated clock rather than 24Mhz reference UART modules on Wondermedia SoCs are connected via a gated clock source, rather than directly to the 24Mhz reference clock. While uboot enables UART0 for debugging, other UART ports are unavailable until the clock is enabled. This patch checks that a valid clock is actually passed from devicetree, enables the clock in probe. This change removes the fallback when a clock was not specified as it doesn't apply any longer (and would only work if the UART clock was already enabled). DTSI files are updated for VT8500, WM8505 and WM8650. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-18 06:05:31 +04:00
clocks = <&clkuart1>;
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
};
uart@d8210000 {
compatible = "via,vt8500-uart";
reg = <0xd8210000 0x1040>;
interrupts = <47>;
serial: vt8500: UART uses gated clock rather than 24Mhz reference UART modules on Wondermedia SoCs are connected via a gated clock source, rather than directly to the 24Mhz reference clock. While uboot enables UART0 for debugging, other UART ports are unavailable until the clock is enabled. This patch checks that a valid clock is actually passed from devicetree, enables the clock in probe. This change removes the fallback when a clock was not specified as it doesn't apply any longer (and would only work if the UART clock was already enabled). DTSI files are updated for VT8500, WM8505 and WM8650. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-18 06:05:31 +04:00
clocks = <&clkuart2>;
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
};
uart@d82c0000 {
compatible = "via,vt8500-uart";
reg = <0xd82c0000 0x1040>;
interrupts = <50>;
serial: vt8500: UART uses gated clock rather than 24Mhz reference UART modules on Wondermedia SoCs are connected via a gated clock source, rather than directly to the 24Mhz reference clock. While uboot enables UART0 for debugging, other UART ports are unavailable until the clock is enabled. This patch checks that a valid clock is actually passed from devicetree, enables the clock in probe. This change removes the fallback when a clock was not specified as it doesn't apply any longer (and would only work if the UART clock was already enabled). DTSI files are updated for VT8500, WM8505 and WM8650. Signed-off-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-01-18 06:05:31 +04:00
clocks = <&clkuart3>;
arm: vt8500: Add device tree files for VIA/Wondermedia SoC's Add device tree files for VT8500, WM8505 and WM8650 SoC's and reference boards. Signed-off-by: Tony Prisk <linux@prisktech.co.nz>
2012-08-03 12:54:16 +04:00
};
rtc@d8100000 {
compatible = "via,vt8500-rtc";
reg = <0xd8100000 0x10000>;
interrupts = <48>;
};
};
};