2013-07-22 08:36:21 +04:00
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/*
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* Renesas R-Car Gen1 SRU/SSI support
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*
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* Copyright (C) 2013 Renesas Solutions Corp.
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* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include "rsnd.h"
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struct rsnd_gen {
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void __iomem *base[RSND_BASE_MAX];
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struct rsnd_gen_ops *ops;
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2013-09-24 10:12:27 +04:00
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struct regmap *regmap;
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struct regmap_field *regs[RSND_REG_MAX];
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2013-07-22 08:36:21 +04:00
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};
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#define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen)
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2013-09-24 10:12:27 +04:00
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#define RSND_REG_SET(gen, id, reg_id, offset, _id_offset, _id_size) \
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[id] = { \
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.reg = (unsigned int)gen->base[reg_id] + offset, \
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.lsb = 0, \
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.msb = 31, \
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.id_size = _id_size, \
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.id_offset = _id_offset, \
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}
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/*
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* basic function
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*/
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static int rsnd_regmap_write32(void *context, const void *_data, size_t count)
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{
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struct rsnd_priv *priv = context;
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struct device *dev = rsnd_priv_to_dev(priv);
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u32 *data = (u32 *)_data;
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u32 val = data[1];
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void __iomem *reg = (void *)data[0];
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iowrite32(val, reg);
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dev_dbg(dev, "w %p : %08x\n", reg, val);
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return 0;
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}
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static int rsnd_regmap_read32(void *context,
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const void *_data, size_t reg_size,
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void *_val, size_t val_size)
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{
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struct rsnd_priv *priv = context;
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struct device *dev = rsnd_priv_to_dev(priv);
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u32 *data = (u32 *)_data;
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u32 *val = (u32 *)_val;
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void __iomem *reg = (void *)data[0];
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*val = ioread32(reg);
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dev_dbg(dev, "r %p : %08x\n", reg, *val);
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return 0;
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}
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static struct regmap_bus rsnd_regmap_bus = {
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.write = rsnd_regmap_write32,
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.read = rsnd_regmap_read32,
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.reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
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.val_format_endian_default = REGMAP_ENDIAN_NATIVE,
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};
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2013-11-29 06:43:13 +04:00
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static int rsnd_is_accessible_reg(struct rsnd_priv *priv,
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struct rsnd_gen *gen, enum rsnd_reg reg)
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{
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if (!gen->regs[reg]) {
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struct device *dev = rsnd_priv_to_dev(priv);
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dev_err(dev, "unsupported register access %x\n", reg);
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return 0;
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}
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return 1;
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}
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2013-09-24 10:12:27 +04:00
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u32 rsnd_read(struct rsnd_priv *priv,
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struct rsnd_mod *mod, enum rsnd_reg reg)
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{
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struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
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u32 val;
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2013-11-29 06:43:13 +04:00
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if (!rsnd_is_accessible_reg(priv, gen, reg))
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return 0;
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2013-09-24 10:12:27 +04:00
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regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val);
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return val;
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}
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void rsnd_write(struct rsnd_priv *priv,
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struct rsnd_mod *mod,
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enum rsnd_reg reg, u32 data)
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{
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struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
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2013-11-29 06:43:13 +04:00
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if (!rsnd_is_accessible_reg(priv, gen, reg))
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return;
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2013-09-24 10:12:27 +04:00
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regmap_fields_write(gen->regs[reg], rsnd_mod_id(mod), data);
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}
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void rsnd_bset(struct rsnd_priv *priv, struct rsnd_mod *mod,
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enum rsnd_reg reg, u32 mask, u32 data)
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{
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struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
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2013-11-29 06:43:13 +04:00
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if (!rsnd_is_accessible_reg(priv, gen, reg))
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return;
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2013-09-24 10:12:27 +04:00
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regmap_fields_update_bits(gen->regs[reg], rsnd_mod_id(mod),
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mask, data);
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}
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2013-11-29 06:43:01 +04:00
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static int rsnd_gen_regmap_init(struct rsnd_priv *priv,
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struct rsnd_gen *gen,
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struct reg_field *regf)
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{
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int i;
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struct device *dev = rsnd_priv_to_dev(priv);
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struct regmap_config regc;
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memset(®c, 0, sizeof(regc));
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regc.reg_bits = 32;
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regc.val_bits = 32;
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gen->regmap = devm_regmap_init(dev, &rsnd_regmap_bus, priv, ®c);
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if (IS_ERR(gen->regmap)) {
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dev_err(dev, "regmap error %ld\n", PTR_ERR(gen->regmap));
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return PTR_ERR(gen->regmap);
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}
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for (i = 0; i < RSND_REG_MAX; i++) {
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2013-11-29 06:43:13 +04:00
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gen->regs[i] = NULL;
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if (!regf[i].reg)
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continue;
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2013-11-29 06:43:01 +04:00
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gen->regs[i] = devm_regmap_field_alloc(dev, gen->regmap, regf[i]);
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if (IS_ERR(gen->regs[i]))
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return PTR_ERR(gen->regs[i]);
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}
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return 0;
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}
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2013-07-22 08:36:21 +04:00
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2014-05-23 10:25:54 +04:00
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/*
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* DMA read/write register offset
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*
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* RSND_xxx_I_N for Audio DMAC input
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* RSND_xxx_O_N for Audio DMAC output
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* RSND_xxx_I_P for Audio DMAC peri peri input
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* RSND_xxx_O_P for Audio DMAC peri peri output
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*
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* ex) R-Car H2 case
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* mod / DMAC in / DMAC out / DMAC PP in / DMAC pp out
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* SSI : 0xec541000 / 0xec241008 / 0xec24100c / 0xec400000 / 0xec400000
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* SCU : 0xec500000 / 0xec000000 / 0xec004000 / 0xec300000 / 0xec304000
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* CMD : 0xec500000 / 0xec008000 0xec308000
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*/
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#define RDMA_SSI_I_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0x8)
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#define RDMA_SSI_O_N(addr, i) (addr ##_reg - 0x00300000 + (0x40 * i) + 0xc)
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#define RDMA_SSI_I_P(addr, i) (addr ##_reg - 0x00141000 + (0x1000 * i))
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#define RDMA_SSI_O_P(addr, i) (addr ##_reg - 0x00141000 + (0x1000 * i))
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#define RDMA_SRC_I_N(addr, i) (addr ##_reg - 0x00500000 + (0x400 * i))
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#define RDMA_SRC_O_N(addr, i) (addr ##_reg - 0x004fc000 + (0x400 * i))
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#define RDMA_SRC_I_P(addr, i) (addr ##_reg - 0x00200000 + (0x400 * i))
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#define RDMA_SRC_O_P(addr, i) (addr ##_reg - 0x001fc000 + (0x400 * i))
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#define RDMA_CMD_O_N(addr, i) (addr ##_reg - 0x004f8000 + (0x400 * i))
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#define RDMA_CMD_O_P(addr, i) (addr ##_reg - 0x001f8000 + (0x400 * i))
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2014-06-18 12:54:43 +04:00
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static void rsnd_gen2_dma_addr(struct rsnd_priv *priv,
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2014-05-23 10:25:54 +04:00
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struct rsnd_dma *dma,
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struct dma_slave_config *cfg,
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int is_play, int slave_id)
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{
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struct platform_device *pdev = rsnd_priv_to_pdev(priv);
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struct device *dev = rsnd_priv_to_dev(priv);
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struct rsnd_mod *mod = rsnd_dma_to_mod(dma);
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struct rsnd_dai_stream *io = rsnd_mod_to_io(mod);
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dma_addr_t ssi_reg = platform_get_resource(pdev,
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IORESOURCE_MEM, RSND_GEN2_SSI)->start;
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dma_addr_t src_reg = platform_get_resource(pdev,
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IORESOURCE_MEM, RSND_GEN2_SCU)->start;
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int is_ssi = !!(rsnd_io_to_mod_ssi(io) == mod);
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int use_src = !!rsnd_io_to_mod_src(io);
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int use_dvc = !!rsnd_io_to_mod_dvc(io);
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int id = rsnd_mod_id(mod);
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struct dma_addr {
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dma_addr_t src_addr;
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dma_addr_t dst_addr;
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} dma_addrs[2][2][3] = {
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{ /* SRC */
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/* Capture */
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{{ 0, 0 },
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{ RDMA_SRC_O_N(src, id), 0 },
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{ RDMA_CMD_O_N(src, id), 0 }},
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/* Playback */
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{{ 0, 0, },
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{ 0, RDMA_SRC_I_N(src, id) },
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{ 0, RDMA_SRC_I_N(src, id) }}
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}, { /* SSI */
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/* Capture */
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{{ RDMA_SSI_O_N(ssi, id), 0 },
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{ RDMA_SSI_O_P(ssi, id), RDMA_SRC_I_P(src, id) },
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{ RDMA_SSI_O_P(ssi, id), RDMA_SRC_I_P(src, id) }},
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/* Playback */
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{{ 0, RDMA_SSI_I_N(ssi, id) },
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{ RDMA_SRC_O_P(src, id), RDMA_SSI_I_P(ssi, id) },
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{ RDMA_CMD_O_P(src, id), RDMA_SSI_I_P(ssi, id) }}
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}
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};
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/* it shouldn't happen */
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if (use_dvc & !use_src) {
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dev_err(dev, "DVC is selected without SRC\n");
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return;
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}
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cfg->src_addr = dma_addrs[is_ssi][is_play][use_src + use_dvc].src_addr;
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cfg->dst_addr = dma_addrs[is_ssi][is_play][use_src + use_dvc].dst_addr;
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dev_dbg(dev, "dma%d addr - src : %x / dst : %x\n",
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id, cfg->src_addr, cfg->dst_addr);
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}
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2014-06-18 12:54:43 +04:00
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void rsnd_gen_dma_addr(struct rsnd_priv *priv,
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struct rsnd_dma *dma,
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struct dma_slave_config *cfg,
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int is_play, int slave_id)
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{
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cfg->slave_id = slave_id;
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cfg->src_addr = 0;
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cfg->dst_addr = 0;
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cfg->direction = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
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/*
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* gen1 uses default DMA addr
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*/
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if (rsnd_is_gen1(priv))
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return;
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rsnd_gen2_dma_addr(priv, dma, cfg, is_play, slave_id);
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}
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2013-11-29 06:43:23 +04:00
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/*
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* Gen2
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*/
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2013-11-29 06:43:45 +04:00
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/* single address mapping */
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#define RSND_GEN2_S_REG(gen, reg, id, offset) \
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2013-12-10 05:26:01 +04:00
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RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, 0, 10)
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2013-11-29 06:43:45 +04:00
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/* multi address mapping */
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#define RSND_GEN2_M_REG(gen, reg, id, offset, _id_offset) \
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2013-12-10 05:26:01 +04:00
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RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN2_##reg, offset, _id_offset, 10)
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2013-11-29 06:43:45 +04:00
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static int rsnd_gen2_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
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{
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struct reg_field regf[RSND_REG_MAX] = {
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RSND_GEN2_S_REG(gen, SSIU, SSI_MODE0, 0x800),
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RSND_GEN2_S_REG(gen, SSIU, SSI_MODE1, 0x804),
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/* FIXME: it needs SSI_MODE2/3 in the future */
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2014-01-24 06:42:00 +04:00
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RSND_GEN2_M_REG(gen, SSIU, SSI_BUSIF_MODE, 0x0, 0x80),
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RSND_GEN2_M_REG(gen, SSIU, SSI_BUSIF_ADINR,0x4, 0x80),
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RSND_GEN2_M_REG(gen, SSIU, SSI_CTRL, 0x10, 0x80),
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2013-11-29 06:43:45 +04:00
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RSND_GEN2_M_REG(gen, SSIU, INT_ENABLE, 0x18, 0x80),
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2014-01-24 06:42:00 +04:00
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RSND_GEN2_M_REG(gen, SCU, SRC_BUSIF_MODE, 0x0, 0x20),
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RSND_GEN2_M_REG(gen, SCU, SRC_ROUTE_MODE0,0xc, 0x20),
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RSND_GEN2_M_REG(gen, SCU, SRC_CTRL, 0x10, 0x20),
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2014-05-09 04:44:49 +04:00
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RSND_GEN2_M_REG(gen, SCU, CMD_ROUTE_SLCT, 0x18c, 0x20),
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RSND_GEN2_M_REG(gen, SCU, CMD_CTRL, 0x190, 0x20),
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2014-01-24 06:42:00 +04:00
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RSND_GEN2_M_REG(gen, SCU, SRC_SWRSR, 0x200, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_SRCIR, 0x204, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_ADINR, 0x214, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_IFSCR, 0x21c, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_IFSVR, 0x220, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_SRCCR, 0x224, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_BSDSR, 0x22c, 0x40),
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RSND_GEN2_M_REG(gen, SCU, SRC_BSISR, 0x238, 0x40),
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2014-05-09 04:44:49 +04:00
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RSND_GEN2_M_REG(gen, SCU, DVC_SWRSR, 0xe00, 0x100),
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RSND_GEN2_M_REG(gen, SCU, DVC_DVUIR, 0xe04, 0x100),
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RSND_GEN2_M_REG(gen, SCU, DVC_ADINR, 0xe08, 0x100),
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RSND_GEN2_M_REG(gen, SCU, DVC_DVUCR, 0xe10, 0x100),
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RSND_GEN2_M_REG(gen, SCU, DVC_ZCMCR, 0xe14, 0x100),
|
|
|
|
RSND_GEN2_M_REG(gen, SCU, DVC_VOL0R, 0xe28, 0x100),
|
|
|
|
RSND_GEN2_M_REG(gen, SCU, DVC_VOL1R, 0xe2c, 0x100),
|
|
|
|
RSND_GEN2_M_REG(gen, SCU, DVC_DVUER, 0xe48, 0x100),
|
2014-01-24 06:42:00 +04:00
|
|
|
|
2013-11-29 06:43:45 +04:00
|
|
|
RSND_GEN2_S_REG(gen, ADG, BRRA, 0x00),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, BRRB, 0x04),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SSICKR, 0x08),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, AUDIO_CLK_SEL2, 0x14),
|
2014-02-12 09:04:12 +04:00
|
|
|
RSND_GEN2_S_REG(gen, ADG, DIV_EN, 0x30),
|
2014-01-24 06:42:00 +04:00
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL0, 0x34),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL1, 0x38),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL2, 0x3c),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL3, 0x40),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCIN_TIMSEL4, 0x44),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL0, 0x48),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL1, 0x4c),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL2, 0x50),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL3, 0x54),
|
|
|
|
RSND_GEN2_S_REG(gen, ADG, SRCOUT_TIMSEL4, 0x58),
|
2014-05-09 04:44:49 +04:00
|
|
|
RSND_GEN2_S_REG(gen, ADG, CMDOUT_TIMSEL, 0x5c),
|
2013-11-29 06:43:45 +04:00
|
|
|
|
|
|
|
RSND_GEN2_M_REG(gen, SSI, SSICR, 0x00, 0x40),
|
|
|
|
RSND_GEN2_M_REG(gen, SSI, SSISR, 0x04, 0x40),
|
|
|
|
RSND_GEN2_M_REG(gen, SSI, SSITDR, 0x08, 0x40),
|
|
|
|
RSND_GEN2_M_REG(gen, SSI, SSIRDR, 0x0c, 0x40),
|
|
|
|
RSND_GEN2_M_REG(gen, SSI, SSIWSR, 0x20, 0x40),
|
|
|
|
};
|
|
|
|
|
|
|
|
return rsnd_gen_regmap_init(priv, gen, regf);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int rsnd_gen2_probe(struct platform_device *pdev,
|
|
|
|
struct rsnd_priv *priv)
|
|
|
|
{
|
|
|
|
struct device *dev = rsnd_priv_to_dev(priv);
|
|
|
|
struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
|
|
|
|
struct resource *scu_res;
|
|
|
|
struct resource *adg_res;
|
|
|
|
struct resource *ssiu_res;
|
|
|
|
struct resource *ssi_res;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* map address
|
|
|
|
*/
|
|
|
|
scu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SCU);
|
|
|
|
adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_ADG);
|
|
|
|
ssiu_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSIU);
|
|
|
|
ssi_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN2_SSI);
|
|
|
|
|
|
|
|
gen->base[RSND_GEN2_SCU] = devm_ioremap_resource(dev, scu_res);
|
|
|
|
gen->base[RSND_GEN2_ADG] = devm_ioremap_resource(dev, adg_res);
|
|
|
|
gen->base[RSND_GEN2_SSIU] = devm_ioremap_resource(dev, ssiu_res);
|
|
|
|
gen->base[RSND_GEN2_SSI] = devm_ioremap_resource(dev, ssi_res);
|
|
|
|
if (IS_ERR(gen->base[RSND_GEN2_SCU]) ||
|
|
|
|
IS_ERR(gen->base[RSND_GEN2_ADG]) ||
|
|
|
|
IS_ERR(gen->base[RSND_GEN2_SSIU]) ||
|
|
|
|
IS_ERR(gen->base[RSND_GEN2_SSI]))
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
ret = rsnd_gen2_regmap_init(priv, gen);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
dev_dbg(dev, "Gen2 device probed\n");
|
2014-05-13 03:10:20 +04:00
|
|
|
dev_dbg(dev, "SCU : %pap => %p\n", &scu_res->start,
|
2013-11-29 06:43:45 +04:00
|
|
|
gen->base[RSND_GEN2_SCU]);
|
2014-05-13 03:10:20 +04:00
|
|
|
dev_dbg(dev, "ADG : %pap => %p\n", &adg_res->start,
|
2013-11-29 06:43:45 +04:00
|
|
|
gen->base[RSND_GEN2_ADG]);
|
2014-05-13 03:10:20 +04:00
|
|
|
dev_dbg(dev, "SSIU : %pap => %p\n", &ssiu_res->start,
|
2013-11-29 06:43:45 +04:00
|
|
|
gen->base[RSND_GEN2_SSIU]);
|
2014-05-13 03:10:20 +04:00
|
|
|
dev_dbg(dev, "SSI : %pap => %p\n", &ssi_res->start,
|
2013-11-29 06:43:45 +04:00
|
|
|
gen->base[RSND_GEN2_SSI]);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-11-29 06:43:23 +04:00
|
|
|
/*
|
|
|
|
* Gen1
|
|
|
|
*/
|
|
|
|
|
2013-09-24 10:12:27 +04:00
|
|
|
/* single address mapping */
|
|
|
|
#define RSND_GEN1_S_REG(gen, reg, id, offset) \
|
|
|
|
RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, 0, 9)
|
2013-07-22 08:36:35 +04:00
|
|
|
|
2013-09-24 10:12:27 +04:00
|
|
|
/* multi address mapping */
|
|
|
|
#define RSND_GEN1_M_REG(gen, reg, id, offset, _id_offset) \
|
|
|
|
RSND_REG_SET(gen, RSND_REG_##id, RSND_GEN1_##reg, offset, _id_offset, 9)
|
|
|
|
|
|
|
|
static int rsnd_gen1_regmap_init(struct rsnd_priv *priv, struct rsnd_gen *gen)
|
2013-07-22 08:36:35 +04:00
|
|
|
{
|
2013-09-24 10:12:27 +04:00
|
|
|
struct reg_field regf[RSND_REG_MAX] = {
|
|
|
|
RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_SEL, 0x00),
|
|
|
|
RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL0, 0x08),
|
|
|
|
RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL1, 0x0c),
|
|
|
|
RSND_GEN1_S_REG(gen, SRU, SRC_TMG_SEL2, 0x10),
|
2013-12-20 07:27:03 +04:00
|
|
|
RSND_GEN1_S_REG(gen, SRU, SRC_ROUTE_CTRL, 0xc0),
|
2013-09-24 10:12:27 +04:00
|
|
|
RSND_GEN1_S_REG(gen, SRU, SSI_MODE0, 0xD0),
|
|
|
|
RSND_GEN1_S_REG(gen, SRU, SSI_MODE1, 0xD4),
|
2014-01-24 06:37:39 +04:00
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_BUSIF_MODE, 0x20, 0x4),
|
2013-12-20 07:28:51 +04:00
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_ROUTE_MODE0,0x50, 0x8),
|
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_SWRSR, 0x200, 0x40),
|
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_SRCIR, 0x204, 0x40),
|
2013-12-20 07:27:03 +04:00
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_ADINR, 0x214, 0x40),
|
2013-12-20 07:28:51 +04:00
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_IFSCR, 0x21c, 0x40),
|
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_IFSVR, 0x220, 0x40),
|
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_SRCCR, 0x224, 0x40),
|
|
|
|
RSND_GEN1_M_REG(gen, SRU, SRC_MNFSR, 0x228, 0x40),
|
2013-09-24 10:12:27 +04:00
|
|
|
|
|
|
|
RSND_GEN1_S_REG(gen, ADG, BRRA, 0x00),
|
|
|
|
RSND_GEN1_S_REG(gen, ADG, BRRB, 0x04),
|
|
|
|
RSND_GEN1_S_REG(gen, ADG, SSICKR, 0x08),
|
|
|
|
RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL0, 0x0c),
|
|
|
|
RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL1, 0x10),
|
2013-12-20 07:28:51 +04:00
|
|
|
RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL3, 0x18),
|
|
|
|
RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL4, 0x1c),
|
|
|
|
RSND_GEN1_S_REG(gen, ADG, AUDIO_CLK_SEL5, 0x20),
|
2013-09-24 10:12:27 +04:00
|
|
|
|
|
|
|
RSND_GEN1_M_REG(gen, SSI, SSICR, 0x00, 0x40),
|
|
|
|
RSND_GEN1_M_REG(gen, SSI, SSISR, 0x04, 0x40),
|
|
|
|
RSND_GEN1_M_REG(gen, SSI, SSITDR, 0x08, 0x40),
|
|
|
|
RSND_GEN1_M_REG(gen, SSI, SSIRDR, 0x0c, 0x40),
|
|
|
|
RSND_GEN1_M_REG(gen, SSI, SSIWSR, 0x20, 0x40),
|
|
|
|
};
|
|
|
|
|
2013-11-29 06:43:01 +04:00
|
|
|
return rsnd_gen_regmap_init(priv, gen, regf);
|
2013-07-22 08:36:35 +04:00
|
|
|
}
|
|
|
|
|
2013-07-22 08:36:21 +04:00
|
|
|
static int rsnd_gen1_probe(struct platform_device *pdev,
|
|
|
|
struct rsnd_priv *priv)
|
|
|
|
{
|
2013-07-22 08:36:35 +04:00
|
|
|
struct device *dev = rsnd_priv_to_dev(priv);
|
|
|
|
struct rsnd_gen *gen = rsnd_priv_to_gen(priv);
|
|
|
|
struct resource *sru_res;
|
2013-07-22 08:36:46 +04:00
|
|
|
struct resource *adg_res;
|
2013-07-22 08:36:57 +04:00
|
|
|
struct resource *ssi_res;
|
2013-09-24 10:12:27 +04:00
|
|
|
int ret;
|
2013-07-22 08:36:35 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* map address
|
|
|
|
*/
|
|
|
|
sru_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SRU);
|
2013-07-22 08:36:46 +04:00
|
|
|
adg_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_ADG);
|
2013-07-22 08:36:57 +04:00
|
|
|
ssi_res = platform_get_resource(pdev, IORESOURCE_MEM, RSND_GEN1_SSI);
|
2013-07-22 08:36:35 +04:00
|
|
|
|
|
|
|
gen->base[RSND_GEN1_SRU] = devm_ioremap_resource(dev, sru_res);
|
2013-07-22 08:36:46 +04:00
|
|
|
gen->base[RSND_GEN1_ADG] = devm_ioremap_resource(dev, adg_res);
|
2013-07-22 08:36:57 +04:00
|
|
|
gen->base[RSND_GEN1_SSI] = devm_ioremap_resource(dev, ssi_res);
|
2013-07-30 03:51:37 +04:00
|
|
|
if (IS_ERR(gen->base[RSND_GEN1_SRU]) ||
|
|
|
|
IS_ERR(gen->base[RSND_GEN1_ADG]) ||
|
|
|
|
IS_ERR(gen->base[RSND_GEN1_SSI]))
|
2013-07-22 08:36:35 +04:00
|
|
|
return -ENODEV;
|
|
|
|
|
2013-09-24 10:12:27 +04:00
|
|
|
ret = rsnd_gen1_regmap_init(priv, gen);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2013-07-22 08:36:35 +04:00
|
|
|
|
|
|
|
dev_dbg(dev, "Gen1 device probed\n");
|
2014-05-13 03:10:20 +04:00
|
|
|
dev_dbg(dev, "SRU : %pap => %p\n", &sru_res->start,
|
2013-07-22 08:36:35 +04:00
|
|
|
gen->base[RSND_GEN1_SRU]);
|
2014-05-13 03:10:20 +04:00
|
|
|
dev_dbg(dev, "ADG : %pap => %p\n", &adg_res->start,
|
2013-07-22 08:36:46 +04:00
|
|
|
gen->base[RSND_GEN1_ADG]);
|
2014-05-13 03:10:20 +04:00
|
|
|
dev_dbg(dev, "SSI : %pap => %p\n", &ssi_res->start,
|
2013-07-22 08:36:57 +04:00
|
|
|
gen->base[RSND_GEN1_SSI]);
|
2013-07-22 08:36:35 +04:00
|
|
|
|
2013-07-22 08:36:21 +04:00
|
|
|
return 0;
|
2013-07-22 08:36:57 +04:00
|
|
|
|
2013-07-22 08:36:21 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Gen
|
|
|
|
*/
|
2014-03-18 06:29:55 +04:00
|
|
|
static void rsnd_of_parse_gen(struct platform_device *pdev,
|
|
|
|
const struct rsnd_of_data *of_data,
|
|
|
|
struct rsnd_priv *priv)
|
|
|
|
{
|
|
|
|
struct rcar_snd_info *info = priv->info;
|
|
|
|
|
|
|
|
if (!of_data)
|
|
|
|
return;
|
|
|
|
|
|
|
|
info->flags = of_data->flags;
|
|
|
|
}
|
|
|
|
|
2013-07-22 08:36:21 +04:00
|
|
|
int rsnd_gen_probe(struct platform_device *pdev,
|
2014-03-18 06:29:55 +04:00
|
|
|
const struct rsnd_of_data *of_data,
|
2013-07-22 08:36:21 +04:00
|
|
|
struct rsnd_priv *priv)
|
|
|
|
{
|
|
|
|
struct device *dev = rsnd_priv_to_dev(priv);
|
|
|
|
struct rsnd_gen *gen;
|
2013-11-29 06:43:34 +04:00
|
|
|
int ret;
|
2013-07-22 08:36:21 +04:00
|
|
|
|
2014-03-18 06:29:55 +04:00
|
|
|
rsnd_of_parse_gen(pdev, of_data, priv);
|
|
|
|
|
2013-07-22 08:36:21 +04:00
|
|
|
gen = devm_kzalloc(dev, sizeof(*gen), GFP_KERNEL);
|
|
|
|
if (!gen) {
|
|
|
|
dev_err(dev, "GEN allocate failed\n");
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2013-11-29 06:43:34 +04:00
|
|
|
priv->gen = gen;
|
2013-09-02 07:31:16 +04:00
|
|
|
|
2013-11-29 06:43:45 +04:00
|
|
|
ret = -ENODEV;
|
|
|
|
if (rsnd_is_gen1(priv))
|
2014-02-25 10:15:00 +04:00
|
|
|
ret = rsnd_gen1_probe(pdev, priv);
|
2013-11-29 06:43:45 +04:00
|
|
|
else if (rsnd_is_gen2(priv))
|
2014-02-25 10:15:00 +04:00
|
|
|
ret = rsnd_gen2_probe(pdev, priv);
|
2013-11-29 06:43:45 +04:00
|
|
|
|
|
|
|
if (ret < 0)
|
2013-09-02 07:31:16 +04:00
|
|
|
dev_err(dev, "unknown generation R-Car sound device\n");
|
|
|
|
|
2013-11-29 06:43:34 +04:00
|
|
|
return ret;
|
2013-07-22 08:36:21 +04:00
|
|
|
}
|