License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.
By default all files without license information are under the default
license of the kernel, which is GPL version 2.
Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier. The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.
This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.
How this work was done:
Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
- file had no licensing information it it.
- file was a */uapi/* one with no licensing information in it,
- file was a */uapi/* one with existing licensing information,
Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.
The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne. Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.
The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed. Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.
Criteria used to select files for SPDX license identifier tagging was:
- Files considered eligible had to be source code files.
- Make and config files were included as candidates if they contained >5
lines of source
- File already had some variant of a license header in it (even if <5
lines).
All documentation files were explicitly excluded.
The following heuristics were used to determine which SPDX license
identifiers to apply.
- when both scanners couldn't find any license traces, file was
considered to have no license information in it, and the top level
COPYING file license applied.
For non */uapi/* files that summary was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 11139
and resulted in the first patch in this series.
If that file was a */uapi/* path one, it was "GPL-2.0 WITH
Linux-syscall-note" otherwise it was "GPL-2.0". Results of that was:
SPDX license identifier # files
---------------------------------------------------|-------
GPL-2.0 WITH Linux-syscall-note 930
and resulted in the second patch in this series.
- if a file had some form of licensing information in it, and was one
of the */uapi/* ones, it was denoted with the Linux-syscall-note if
any GPL family license was found in the file or had no licensing in
it (per prior point). Results summary:
SPDX license identifier # files
---------------------------------------------------|------
GPL-2.0 WITH Linux-syscall-note 270
GPL-2.0+ WITH Linux-syscall-note 169
((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause) 21
((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) 17
LGPL-2.1+ WITH Linux-syscall-note 15
GPL-1.0+ WITH Linux-syscall-note 14
((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause) 5
LGPL-2.0+ WITH Linux-syscall-note 4
LGPL-2.1 WITH Linux-syscall-note 3
((GPL-2.0 WITH Linux-syscall-note) OR MIT) 3
((GPL-2.0 WITH Linux-syscall-note) AND MIT) 1
and that resulted in the third patch in this series.
- when the two scanners agreed on the detected license(s), that became
the concluded license(s).
- when there was disagreement between the two scanners (one detected a
license but the other didn't, or they both detected different
licenses) a manual inspection of the file occurred.
- In most cases a manual inspection of the information in the file
resulted in a clear resolution of the license that should apply (and
which scanner probably needed to revisit its heuristics).
- When it was not immediately clear, the license identifier was
confirmed with lawyers working with the Linux Foundation.
- If there was any question as to the appropriate license identifier,
the file was flagged for further research and to be revisited later
in time.
In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.
Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights. The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.
Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.
In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.
Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
- a full scancode scan run, collecting the matched texts, detected
license ids and scores
- reviewing anything where there was a license detected (about 500+
files) to ensure that the applied SPDX license was correct
- reviewing anything where there was no detection but the patch license
was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
SPDX license was correct
This produced a worksheet with 20 files needing minor correction. This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.
These .csv files were then reviewed by Greg. Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected. This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.) Finally Greg ran the script using the .csv files to
generate the patches.
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-01 17:07:57 +03:00
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// SPDX-License-Identifier: GPL-2.0
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2005-04-17 02:20:36 +04:00
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/*
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* linux/arch/alpha/kernel/time.c
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*
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* Copyright (C) 1991, 1992, 1995, 1999, 2000 Linus Torvalds
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*
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2013-07-14 02:49:45 +04:00
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* This file contains the clocksource time handling.
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2005-04-17 02:20:36 +04:00
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* 1997-09-10 Updated NTP code according to technical memorandum Jan '96
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* "A Kernel Model for Precision Timekeeping" by Dave Mills
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* 1997-01-09 Adrian Sun
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* use interval timer if CONFIG_RTC=y
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* 1997-10-29 John Bowman (bowman@math.ualberta.ca)
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* fixed tick loss calculation in timer_interrupt
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* (round system clock to nearest tick instead of truncating)
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* fixed algorithm in time_init for getting time from CMOS clock
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* 1999-04-16 Thorsten Kranzkowski (dl8bcu@gmx.net)
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* fixed algorithm in do_gettimeofday() for calculating the precise time
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* from processor cycle counter (now taking lost_ticks into account)
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* 2003-06-03 R. Scott Bailey <scott.bailey@eds.com>
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* Tighten sanity in time_init from 1% (10,000 PPM) to 250 PPM
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*/
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/delay.h>
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#include <linux/ioport.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/bcd.h>
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#include <linux/profile.h>
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2010-10-14 10:01:34 +04:00
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#include <linux/irq_work.h>
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2005-04-17 02:20:36 +04:00
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2016-12-24 22:46:01 +03:00
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#include <linux/uaccess.h>
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2005-04-17 02:20:36 +04:00
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#include <asm/io.h>
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#include <asm/hwrpb.h>
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#include <linux/mc146818rtc.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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2010-03-19 19:23:57 +03:00
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#include <linux/clocksource.h>
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2013-07-14 21:57:34 +04:00
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#include <linux/clockchips.h>
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2005-04-17 02:20:36 +04:00
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#include "proto.h"
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#include "irq_impl.h"
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DEFINE_SPINLOCK(rtc_lock);
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2006-10-11 20:40:22 +04:00
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EXPORT_SYMBOL(rtc_lock);
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2005-04-17 02:20:36 +04:00
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unsigned long est_cycle_freq;
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2010-10-14 10:01:34 +04:00
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#ifdef CONFIG_IRQ_WORK
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2010-08-10 04:20:08 +04:00
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2010-10-14 10:01:34 +04:00
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DEFINE_PER_CPU(u8, irq_work_pending);
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2010-08-10 04:20:08 +04:00
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alpha: Replace __get_cpu_var
__get_cpu_var() is used for multiple purposes in the kernel source. One of
them is address calculation via the form &__get_cpu_var(x). This calculates
the address for the instance of the percpu variable of the current processor
based on an offset.
Other use cases are for storing and retrieving data from the current
processors percpu area. __get_cpu_var() can be used as an lvalue when
writing data or on the right side of an assignment.
__get_cpu_var() is defined as :
#define __get_cpu_var(var) (*this_cpu_ptr(&(var)))
__get_cpu_var() always only does an address determination. However, store
and retrieve operations could use a segment prefix (or global register on
other platforms) to avoid the address calculation.
this_cpu_write() and this_cpu_read() can directly take an offset into a
percpu area and use optimized assembly code to read and write per cpu
variables.
This patch converts __get_cpu_var into either an explicit address
calculation using this_cpu_ptr() or into a use of this_cpu operations that
use the offset. Thereby address calculations are avoided and less registers
are used when code is generated.
At the end of the patch set all uses of __get_cpu_var have been removed so
the macro is removed too.
The patch set includes passes over all arches as well. Once these operations
are used throughout then specialized macros can be defined in non -x86
arches as well in order to optimize per cpu access by f.e. using a global
register that may be set to the per cpu base.
Transformations done to __get_cpu_var()
1. Determine the address of the percpu instance of the current processor.
DEFINE_PER_CPU(int, y);
int *x = &__get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(&y);
2. Same as #1 but this time an array structure is involved.
DEFINE_PER_CPU(int, y[20]);
int *x = __get_cpu_var(y);
Converts to
int *x = this_cpu_ptr(y);
3. Retrieve the content of the current processors instance of a per cpu
variable.
DEFINE_PER_CPU(int, y);
int x = __get_cpu_var(y)
Converts to
int x = __this_cpu_read(y);
4. Retrieve the content of a percpu struct
DEFINE_PER_CPU(struct mystruct, y);
struct mystruct x = __get_cpu_var(y);
Converts to
memcpy(&x, this_cpu_ptr(&y), sizeof(x));
5. Assignment to a per cpu variable
DEFINE_PER_CPU(int, y)
__get_cpu_var(y) = x;
Converts to
__this_cpu_write(y, x);
6. Increment/Decrement etc of a per cpu variable
DEFINE_PER_CPU(int, y);
__get_cpu_var(y)++
Converts to
__this_cpu_inc(y)
CC: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Matt Turner <mattst88@gmail.com>
Acked-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Christoph Lameter <cl@linux.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
2014-08-17 21:30:48 +04:00
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#define set_irq_work_pending_flag() __this_cpu_write(irq_work_pending, 1)
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#define test_irq_work_pending() __this_cpu_read(irq_work_pending)
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#define clear_irq_work_pending() __this_cpu_write(irq_work_pending, 0)
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2010-08-10 04:20:08 +04:00
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2011-06-28 14:15:51 +04:00
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void arch_irq_work_raise(void)
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2010-08-10 04:20:08 +04:00
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{
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2010-10-14 10:01:34 +04:00
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set_irq_work_pending_flag();
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2010-08-10 04:20:08 +04:00
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}
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2010-10-14 10:01:34 +04:00
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#else /* CONFIG_IRQ_WORK */
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2010-08-10 04:20:08 +04:00
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2010-10-14 10:01:34 +04:00
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#define test_irq_work_pending() 0
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#define clear_irq_work_pending()
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2010-08-10 04:20:08 +04:00
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2010-10-14 10:01:34 +04:00
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#endif /* CONFIG_IRQ_WORK */
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2010-08-10 04:20:08 +04:00
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2005-04-17 02:20:36 +04:00
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static inline __u32 rpcc(void)
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{
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2013-07-19 01:47:37 +04:00
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return __builtin_alpha_rpcc();
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2005-04-17 02:20:36 +04:00
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}
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2013-07-14 21:57:34 +04:00
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2005-04-17 02:20:36 +04:00
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/*
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2013-07-14 21:57:34 +04:00
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* The RTC as a clock_event_device primitive.
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2005-04-17 02:20:36 +04:00
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*/
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2013-07-14 21:57:34 +04:00
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static DEFINE_PER_CPU(struct clock_event_device, cpu_ce);
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2005-04-17 02:20:36 +04:00
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2013-07-14 21:57:34 +04:00
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irqreturn_t
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2013-07-15 01:50:21 +04:00
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rtc_timer_interrupt(int irq, void *dev)
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2013-07-14 21:57:34 +04:00
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{
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int cpu = smp_processor_id();
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struct clock_event_device *ce = &per_cpu(cpu_ce, cpu);
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2005-04-17 02:20:36 +04:00
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2013-07-14 21:57:34 +04:00
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/* Don't run the hook for UNUSED or SHUTDOWN. */
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2015-07-16 14:26:13 +03:00
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if (likely(clockevent_state_periodic(ce)))
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2013-07-14 21:57:34 +04:00
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ce->event_handler(ce);
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2008-02-13 23:33:16 +03:00
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2010-10-14 10:01:34 +04:00
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if (test_irq_work_pending()) {
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clear_irq_work_pending();
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irq_work_run();
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2010-08-10 04:20:08 +04:00
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}
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2005-04-17 02:20:36 +04:00
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return IRQ_HANDLED;
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}
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2013-07-14 21:57:34 +04:00
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static int
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rtc_ce_set_next_event(unsigned long evt, struct clock_event_device *ce)
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{
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/* This hook is for oneshot mode, which we don't support. */
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return -EINVAL;
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}
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2013-07-15 01:50:21 +04:00
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static void __init
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init_rtc_clockevent(void)
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2013-07-14 21:57:34 +04:00
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{
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int cpu = smp_processor_id();
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struct clock_event_device *ce = &per_cpu(cpu_ce, cpu);
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*ce = (struct clock_event_device){
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.name = "rtc",
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.features = CLOCK_EVT_FEAT_PERIODIC,
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.rating = 100,
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.cpumask = cpumask_of(cpu),
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.set_next_event = rtc_ce_set_next_event,
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};
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clockevents_config_and_register(ce, CONFIG_HZ, 0, 0);
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}
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2013-07-15 01:50:21 +04:00
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/*
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* The QEMU clock as a clocksource primitive.
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*/
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2016-12-21 22:32:01 +03:00
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static u64
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2013-07-15 01:50:21 +04:00
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qemu_cs_read(struct clocksource *cs)
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{
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return qemu_get_vmtime();
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}
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static struct clocksource qemu_cs = {
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.name = "qemu",
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.rating = 400,
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.read = qemu_cs_read,
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.mask = CLOCKSOURCE_MASK(64),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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.max_idle_ns = LONG_MAX
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};
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/*
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* The QEMU alarm as a clock_event_device primitive.
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*/
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2015-07-16 14:26:13 +03:00
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static int qemu_ce_shutdown(struct clock_event_device *ce)
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2013-07-15 01:50:21 +04:00
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{
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/* The mode member of CE is updated for us in generic code.
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Just make sure that the event is disabled. */
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qemu_set_alarm_abs(0);
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2015-07-16 14:26:13 +03:00
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return 0;
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2013-07-15 01:50:21 +04:00
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}
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static int
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qemu_ce_set_next_event(unsigned long evt, struct clock_event_device *ce)
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{
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qemu_set_alarm_rel(evt);
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return 0;
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}
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static irqreturn_t
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qemu_timer_interrupt(int irq, void *dev)
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{
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int cpu = smp_processor_id();
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struct clock_event_device *ce = &per_cpu(cpu_ce, cpu);
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ce->event_handler(ce);
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return IRQ_HANDLED;
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}
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static void __init
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init_qemu_clockevent(void)
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{
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int cpu = smp_processor_id();
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struct clock_event_device *ce = &per_cpu(cpu_ce, cpu);
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*ce = (struct clock_event_device){
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.name = "qemu",
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|
|
.features = CLOCK_EVT_FEAT_ONESHOT,
|
|
|
|
|
.rating = 400,
|
|
|
|
|
.cpumask = cpumask_of(cpu),
|
2015-07-16 14:26:13 +03:00
|
|
|
|
.set_state_shutdown = qemu_ce_shutdown,
|
|
|
|
|
.set_state_oneshot = qemu_ce_shutdown,
|
|
|
|
|
.tick_resume = qemu_ce_shutdown,
|
2013-07-15 01:50:21 +04:00
|
|
|
|
.set_next_event = qemu_ce_set_next_event,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
clockevents_config_and_register(ce, NSEC_PER_SEC, 1000, LONG_MAX);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
2007-07-16 10:38:37 +04:00
|
|
|
|
void __init
|
2005-04-17 02:20:36 +04:00
|
|
|
|
common_init_rtc(void)
|
|
|
|
|
{
|
2013-07-13 03:15:56 +04:00
|
|
|
|
unsigned char x, sel = 0;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
|
|
/* Reset periodic interrupt frequency. */
|
2013-07-13 03:15:56 +04:00
|
|
|
|
#if CONFIG_HZ == 1024 || CONFIG_HZ == 1200
|
|
|
|
|
x = CMOS_READ(RTC_FREQ_SELECT) & 0x3f;
|
|
|
|
|
/* Test includes known working values on various platforms
|
|
|
|
|
where 0x26 is wrong; we refuse to change those. */
|
|
|
|
|
if (x != 0x26 && x != 0x25 && x != 0x19 && x != 0x06) {
|
|
|
|
|
sel = RTC_REF_CLCK_32KHZ + 6;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
}
|
2013-07-13 03:15:56 +04:00
|
|
|
|
#elif CONFIG_HZ == 256 || CONFIG_HZ == 128 || CONFIG_HZ == 64 || CONFIG_HZ == 32
|
|
|
|
|
sel = RTC_REF_CLCK_32KHZ + __builtin_ffs(32768 / CONFIG_HZ);
|
|
|
|
|
#else
|
|
|
|
|
# error "Unknown HZ from arch/alpha/Kconfig"
|
|
|
|
|
#endif
|
|
|
|
|
if (sel) {
|
|
|
|
|
printk(KERN_INFO "Setting RTC_FREQ to %d Hz (%x)\n",
|
|
|
|
|
CONFIG_HZ, sel);
|
|
|
|
|
CMOS_WRITE(sel, RTC_FREQ_SELECT);
|
|
|
|
|
}
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
|
|
/* Turn on periodic interrupts. */
|
|
|
|
|
x = CMOS_READ(RTC_CONTROL);
|
|
|
|
|
if (!(x & RTC_PIE)) {
|
|
|
|
|
printk("Turning on RTC interrupts.\n");
|
|
|
|
|
x |= RTC_PIE;
|
|
|
|
|
x &= ~(RTC_AIE | RTC_UIE);
|
|
|
|
|
CMOS_WRITE(x, RTC_CONTROL);
|
|
|
|
|
}
|
|
|
|
|
(void) CMOS_READ(RTC_INTR_FLAGS);
|
|
|
|
|
|
|
|
|
|
outb(0x36, 0x43); /* pit counter 0: system timer */
|
|
|
|
|
outb(0x00, 0x40);
|
|
|
|
|
outb(0x00, 0x40);
|
|
|
|
|
|
|
|
|
|
outb(0xb6, 0x43); /* pit counter 2: speaker */
|
|
|
|
|
outb(0x31, 0x42);
|
|
|
|
|
outb(0x13, 0x42);
|
|
|
|
|
|
|
|
|
|
init_rtc_irq();
|
|
|
|
|
}
|
|
|
|
|
|
2013-07-14 20:55:08 +04:00
|
|
|
|
|
|
|
|
|
#ifndef CONFIG_ALPHA_WTINT
|
|
|
|
|
/*
|
|
|
|
|
* The RPCC as a clocksource primitive.
|
|
|
|
|
*
|
|
|
|
|
* While we have free-running timecounters running on all CPUs, and we make
|
|
|
|
|
* a half-hearted attempt in init_rtc_rpcc_info to sync the timecounter
|
|
|
|
|
* with the wall clock, that initialization isn't kept up-to-date across
|
|
|
|
|
* different time counters in SMP mode. Therefore we can only use this
|
|
|
|
|
* method when there's only one CPU enabled.
|
|
|
|
|
*
|
|
|
|
|
* When using the WTINT PALcall, the RPCC may shift to a lower frequency,
|
|
|
|
|
* or stop altogether, while waiting for the interrupt. Therefore we cannot
|
|
|
|
|
* use this method when WTINT is in use.
|
|
|
|
|
*/
|
|
|
|
|
|
2016-12-21 22:32:01 +03:00
|
|
|
|
static u64 read_rpcc(struct clocksource *cs)
|
2013-07-14 20:55:08 +04:00
|
|
|
|
{
|
|
|
|
|
return rpcc();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static struct clocksource clocksource_rpcc = {
|
|
|
|
|
.name = "rpcc",
|
|
|
|
|
.rating = 300,
|
|
|
|
|
.read = read_rpcc,
|
|
|
|
|
.mask = CLOCKSOURCE_MASK(32),
|
|
|
|
|
.flags = CLOCK_SOURCE_IS_CONTINUOUS
|
|
|
|
|
};
|
|
|
|
|
#endif /* ALPHA_WTINT */
|
|
|
|
|
|
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
|
/* Validate a computed cycle counter result against the known bounds for
|
|
|
|
|
the given processor core. There's too much brokenness in the way of
|
|
|
|
|
timing hardware for any one method to work everywhere. :-(
|
|
|
|
|
|
|
|
|
|
Return 0 if the result cannot be trusted, otherwise return the argument. */
|
|
|
|
|
|
|
|
|
|
static unsigned long __init
|
|
|
|
|
validate_cc_value(unsigned long cc)
|
|
|
|
|
{
|
|
|
|
|
static struct bounds {
|
|
|
|
|
unsigned int min, max;
|
|
|
|
|
} cpu_hz[] __initdata = {
|
|
|
|
|
[EV3_CPU] = { 50000000, 200000000 }, /* guess */
|
|
|
|
|
[EV4_CPU] = { 100000000, 300000000 },
|
|
|
|
|
[LCA4_CPU] = { 100000000, 300000000 }, /* guess */
|
|
|
|
|
[EV45_CPU] = { 200000000, 300000000 },
|
|
|
|
|
[EV5_CPU] = { 250000000, 433000000 },
|
|
|
|
|
[EV56_CPU] = { 333000000, 667000000 },
|
|
|
|
|
[PCA56_CPU] = { 400000000, 600000000 }, /* guess */
|
|
|
|
|
[PCA57_CPU] = { 500000000, 600000000 }, /* guess */
|
|
|
|
|
[EV6_CPU] = { 466000000, 600000000 },
|
|
|
|
|
[EV67_CPU] = { 600000000, 750000000 },
|
|
|
|
|
[EV68AL_CPU] = { 750000000, 940000000 },
|
|
|
|
|
[EV68CB_CPU] = { 1000000000, 1333333333 },
|
|
|
|
|
/* None of the following are shipping as of 2001-11-01. */
|
|
|
|
|
[EV68CX_CPU] = { 1000000000, 1700000000 }, /* guess */
|
|
|
|
|
[EV69_CPU] = { 1000000000, 1700000000 }, /* guess */
|
|
|
|
|
[EV7_CPU] = { 800000000, 1400000000 }, /* guess */
|
|
|
|
|
[EV79_CPU] = { 1000000000, 2000000000 }, /* guess */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
/* Allow for some drift in the crystal. 10MHz is more than enough. */
|
|
|
|
|
const unsigned int deviation = 10000000;
|
|
|
|
|
|
|
|
|
|
struct percpu_struct *cpu;
|
|
|
|
|
unsigned int index;
|
|
|
|
|
|
|
|
|
|
cpu = (struct percpu_struct *)((char*)hwrpb + hwrpb->processor_offset);
|
|
|
|
|
index = cpu->type & 0xffffffff;
|
|
|
|
|
|
|
|
|
|
/* If index out of bounds, no way to validate. */
|
2006-07-30 14:03:23 +04:00
|
|
|
|
if (index >= ARRAY_SIZE(cpu_hz))
|
2005-04-17 02:20:36 +04:00
|
|
|
|
return cc;
|
|
|
|
|
|
|
|
|
|
/* If index contains no data, no way to validate. */
|
|
|
|
|
if (cpu_hz[index].max == 0)
|
|
|
|
|
return cc;
|
|
|
|
|
|
|
|
|
|
if (cc < cpu_hz[index].min - deviation
|
|
|
|
|
|| cc > cpu_hz[index].max + deviation)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
return cc;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Calibrate CPU clock using legacy 8254 timer/counter. Stolen from
|
|
|
|
|
* arch/i386/time.c.
|
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
#define CALIBRATE_LATCH 0xffff
|
|
|
|
|
#define TIMEOUT_COUNT 0x100000
|
|
|
|
|
|
|
|
|
|
static unsigned long __init
|
|
|
|
|
calibrate_cc_with_pit(void)
|
|
|
|
|
{
|
|
|
|
|
int cc, count = 0;
|
|
|
|
|
|
|
|
|
|
/* Set the Gate high, disable speaker */
|
|
|
|
|
outb((inb(0x61) & ~0x02) | 0x01, 0x61);
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Now let's take care of CTC channel 2
|
|
|
|
|
*
|
|
|
|
|
* Set the Gate high, program CTC channel 2 for mode 0,
|
|
|
|
|
* (interrupt on terminal count mode), binary count,
|
|
|
|
|
* load 5 * LATCH count, (LSB and MSB) to begin countdown.
|
|
|
|
|
*/
|
|
|
|
|
outb(0xb0, 0x43); /* binary, mode 0, LSB/MSB, Ch 2 */
|
|
|
|
|
outb(CALIBRATE_LATCH & 0xff, 0x42); /* LSB of count */
|
|
|
|
|
outb(CALIBRATE_LATCH >> 8, 0x42); /* MSB of count */
|
|
|
|
|
|
|
|
|
|
cc = rpcc();
|
|
|
|
|
do {
|
|
|
|
|
count++;
|
|
|
|
|
} while ((inb(0x61) & 0x20) == 0 && count < TIMEOUT_COUNT);
|
|
|
|
|
cc = rpcc() - cc;
|
|
|
|
|
|
|
|
|
|
/* Error: ECTCNEVERSET or ECPUTOOFAST. */
|
|
|
|
|
if (count <= 1 || count == TIMEOUT_COUNT)
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
|
|
return ((long)cc * PIT_TICK_RATE) / (CALIBRATE_LATCH + 1);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/* The Linux interpretation of the CMOS clock register contents:
|
|
|
|
|
When the Update-In-Progress (UIP) flag goes from 1 to 0, the
|
|
|
|
|
RTC registers show the second which has precisely just started.
|
|
|
|
|
Let's hope other operating systems interpret the RTC the same way. */
|
|
|
|
|
|
|
|
|
|
static unsigned long __init
|
|
|
|
|
rpcc_after_update_in_progress(void)
|
|
|
|
|
{
|
|
|
|
|
do { } while (!(CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP));
|
|
|
|
|
do { } while (CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP);
|
|
|
|
|
|
|
|
|
|
return rpcc();
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
void __init
|
|
|
|
|
time_init(void)
|
|
|
|
|
{
|
2010-03-04 06:57:16 +03:00
|
|
|
|
unsigned int cc1, cc2;
|
2005-04-17 02:20:36 +04:00
|
|
|
|
unsigned long cycle_freq, tolerance;
|
|
|
|
|
long diff;
|
|
|
|
|
|
2013-07-15 01:50:21 +04:00
|
|
|
|
if (alpha_using_qemu) {
|
|
|
|
|
clocksource_register_hz(&qemu_cs, NSEC_PER_SEC);
|
|
|
|
|
init_qemu_clockevent();
|
|
|
|
|
|
|
|
|
|
timer_irqaction.handler = qemu_timer_interrupt;
|
|
|
|
|
init_rtc_irq();
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
|
/* Calibrate CPU clock -- attempt #1. */
|
|
|
|
|
if (!est_cycle_freq)
|
|
|
|
|
est_cycle_freq = validate_cc_value(calibrate_cc_with_pit());
|
|
|
|
|
|
2006-03-28 13:56:09 +04:00
|
|
|
|
cc1 = rpcc();
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
|
|
/* Calibrate CPU clock -- attempt #2. */
|
|
|
|
|
if (!est_cycle_freq) {
|
2006-03-28 13:56:09 +04:00
|
|
|
|
cc1 = rpcc_after_update_in_progress();
|
2005-04-17 02:20:36 +04:00
|
|
|
|
cc2 = rpcc_after_update_in_progress();
|
|
|
|
|
est_cycle_freq = validate_cc_value(cc2 - cc1);
|
|
|
|
|
cc1 = cc2;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
cycle_freq = hwrpb->cycle_freq;
|
|
|
|
|
if (est_cycle_freq) {
|
|
|
|
|
/* If the given value is within 250 PPM of what we calculated,
|
|
|
|
|
accept it. Otherwise, use what we found. */
|
|
|
|
|
tolerance = cycle_freq / 4000;
|
|
|
|
|
diff = cycle_freq - est_cycle_freq;
|
|
|
|
|
if (diff < 0)
|
|
|
|
|
diff = -diff;
|
|
|
|
|
if ((unsigned long)diff > tolerance) {
|
|
|
|
|
cycle_freq = est_cycle_freq;
|
|
|
|
|
printk("HWRPB cycle frequency bogus. "
|
|
|
|
|
"Estimated %lu Hz\n", cycle_freq);
|
|
|
|
|
} else {
|
|
|
|
|
est_cycle_freq = 0;
|
|
|
|
|
}
|
|
|
|
|
} else if (! validate_cc_value (cycle_freq)) {
|
|
|
|
|
printk("HWRPB cycle frequency bogus, "
|
|
|
|
|
"and unable to estimate a proper value!\n");
|
|
|
|
|
}
|
|
|
|
|
|
2013-07-14 20:55:08 +04:00
|
|
|
|
/* See above for restrictions on using clocksource_rpcc. */
|
|
|
|
|
#ifndef CONFIG_ALPHA_WTINT
|
|
|
|
|
if (hwrpb->nr_processors == 1)
|
|
|
|
|
clocksource_register_hz(&clocksource_rpcc, cycle_freq);
|
|
|
|
|
#endif
|
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
|
/* Startup the timer source. */
|
|
|
|
|
alpha_mv.init_rtc();
|
2013-07-15 01:50:21 +04:00
|
|
|
|
init_rtc_clockevent();
|
|
|
|
|
}
|
2013-07-14 21:57:34 +04:00
|
|
|
|
|
2013-07-15 01:50:21 +04:00
|
|
|
|
/* Initialize the clock_event_device for secondary cpus. */
|
|
|
|
|
#ifdef CONFIG_SMP
|
|
|
|
|
void __init
|
|
|
|
|
init_clockevent(void)
|
|
|
|
|
{
|
|
|
|
|
if (alpha_using_qemu)
|
|
|
|
|
init_qemu_clockevent();
|
|
|
|
|
else
|
|
|
|
|
init_rtc_clockevent();
|
2005-04-17 02:20:36 +04:00
|
|
|
|
}
|
2013-07-15 01:50:21 +04:00
|
|
|
|
#endif
|