2015-06-06 23:30:40 +03:00
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/basic_mmio_gpio.h>
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#define ETRAX_FS_rw_pa_dout 0
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#define ETRAX_FS_r_pa_din 4
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#define ETRAX_FS_rw_pa_oe 8
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#define ETRAX_FS_rw_intr_cfg 12
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#define ETRAX_FS_rw_intr_mask 16
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#define ETRAX_FS_rw_ack_intr 20
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#define ETRAX_FS_r_intr 24
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#define ETRAX_FS_rw_pb_dout 32
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#define ETRAX_FS_r_pb_din 36
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#define ETRAX_FS_rw_pb_oe 40
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#define ETRAX_FS_rw_pc_dout 48
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#define ETRAX_FS_r_pc_din 52
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#define ETRAX_FS_rw_pc_oe 56
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#define ETRAX_FS_rw_pd_dout 64
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#define ETRAX_FS_r_pd_din 68
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#define ETRAX_FS_rw_pd_oe 72
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#define ETRAX_FS_rw_pe_dout 80
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#define ETRAX_FS_r_pe_din 84
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#define ETRAX_FS_rw_pe_oe 88
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2015-07-22 16:05:19 +03:00
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#define ARTPEC3_r_pa_din 0
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#define ARTPEC3_rw_pa_dout 4
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#define ARTPEC3_rw_pa_oe 8
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#define ARTPEC3_r_pb_din 44
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#define ARTPEC3_rw_pb_dout 48
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#define ARTPEC3_rw_pb_oe 52
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#define ARTPEC3_r_pc_din 88
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#define ARTPEC3_rw_pc_dout 92
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#define ARTPEC3_rw_pc_oe 96
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#define ARTPEC3_r_pd_din 116
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2015-06-06 23:30:40 +03:00
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struct etraxfs_gpio_port {
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const char *label;
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unsigned int oe;
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unsigned int dout;
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unsigned int din;
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unsigned int ngpio;
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};
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struct etraxfs_gpio_info {
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unsigned int num_ports;
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const struct etraxfs_gpio_port *ports;
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};
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static const struct etraxfs_gpio_port etraxfs_gpio_etraxfs_ports[] = {
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{
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.label = "A",
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.ngpio = 8,
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.oe = ETRAX_FS_rw_pa_oe,
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.dout = ETRAX_FS_rw_pa_dout,
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.din = ETRAX_FS_r_pa_din,
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},
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{
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.label = "B",
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.ngpio = 18,
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.oe = ETRAX_FS_rw_pb_oe,
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.dout = ETRAX_FS_rw_pb_dout,
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.din = ETRAX_FS_r_pb_din,
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},
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{
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.label = "C",
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.ngpio = 18,
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.oe = ETRAX_FS_rw_pc_oe,
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.dout = ETRAX_FS_rw_pc_dout,
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.din = ETRAX_FS_r_pc_din,
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},
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{
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.label = "D",
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.ngpio = 18,
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.oe = ETRAX_FS_rw_pd_oe,
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.dout = ETRAX_FS_rw_pd_dout,
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.din = ETRAX_FS_r_pd_din,
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},
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{
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.label = "E",
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.ngpio = 18,
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.oe = ETRAX_FS_rw_pe_oe,
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.dout = ETRAX_FS_rw_pe_dout,
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.din = ETRAX_FS_r_pe_din,
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},
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};
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static const struct etraxfs_gpio_info etraxfs_gpio_etraxfs = {
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.num_ports = ARRAY_SIZE(etraxfs_gpio_etraxfs_ports),
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.ports = etraxfs_gpio_etraxfs_ports,
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};
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2015-07-22 16:05:19 +03:00
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static const struct etraxfs_gpio_port etraxfs_gpio_artpec3_ports[] = {
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{
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.label = "A",
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.ngpio = 32,
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.oe = ARTPEC3_rw_pa_oe,
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.dout = ARTPEC3_rw_pa_dout,
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.din = ARTPEC3_r_pa_din,
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},
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{
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.label = "B",
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.ngpio = 32,
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.oe = ARTPEC3_rw_pb_oe,
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.dout = ARTPEC3_rw_pb_dout,
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.din = ARTPEC3_r_pb_din,
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},
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{
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.label = "C",
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.ngpio = 16,
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.oe = ARTPEC3_rw_pc_oe,
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.dout = ARTPEC3_rw_pc_dout,
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.din = ARTPEC3_r_pc_din,
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},
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{
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.label = "D",
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.ngpio = 32,
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.din = ARTPEC3_r_pd_din,
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},
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};
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static const struct etraxfs_gpio_info etraxfs_gpio_artpec3 = {
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.num_ports = ARRAY_SIZE(etraxfs_gpio_artpec3_ports),
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.ports = etraxfs_gpio_artpec3_ports,
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};
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2015-06-06 23:30:40 +03:00
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static int etraxfs_gpio_of_xlate(struct gpio_chip *gc,
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const struct of_phandle_args *gpiospec,
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u32 *flags)
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{
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/*
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* Port numbers are A to E, and the properties are integers, so we
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* specify them as 0xA - 0xE.
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*/
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if (gc->label[0] - 'A' + 0xA != gpiospec->args[2])
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return -EINVAL;
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return of_gpio_simple_xlate(gc, gpiospec, flags);
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}
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static const struct of_device_id etraxfs_gpio_of_table[] = {
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{
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.compatible = "axis,etraxfs-gio",
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.data = &etraxfs_gpio_etraxfs,
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},
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2015-07-22 16:05:19 +03:00
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{
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.compatible = "axis,artpec3-gio",
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.data = &etraxfs_gpio_artpec3,
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},
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2015-06-06 23:30:40 +03:00
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{},
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};
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static int etraxfs_gpio_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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const struct etraxfs_gpio_info *info;
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const struct of_device_id *match;
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struct bgpio_chip *chips;
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struct resource *res;
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void __iomem *regs;
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int ret;
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int i;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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regs = devm_ioremap_resource(dev, res);
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2015-07-09 16:19:53 +03:00
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if (IS_ERR(regs))
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return PTR_ERR(regs);
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2015-06-06 23:30:40 +03:00
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match = of_match_node(etraxfs_gpio_of_table, dev->of_node);
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if (!match)
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return -EINVAL;
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info = match->data;
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chips = devm_kzalloc(dev, sizeof(*chips) * info->num_ports, GFP_KERNEL);
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if (!chips)
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return -ENOMEM;
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for (i = 0; i < info->num_ports; i++) {
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struct bgpio_chip *bgc = &chips[i];
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const struct etraxfs_gpio_port *port = &info->ports[i];
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2015-07-22 16:05:19 +03:00
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unsigned long flags = BGPIOF_READ_OUTPUT_REG_SET;
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void __iomem *dat = regs + port->din;
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void __iomem *set = regs + port->dout;
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void __iomem *dirout = regs + port->oe;
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if (dirout == set) {
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dirout = set = NULL;
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flags = BGPIOF_NO_OUTPUT;
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}
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2015-06-06 23:30:40 +03:00
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ret = bgpio_init(bgc, dev, 4,
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2015-07-22 16:05:19 +03:00
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dat, set, NULL, dirout, NULL,
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flags);
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2015-06-06 23:30:40 +03:00
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if (ret)
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return ret;
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bgc->gc.ngpio = port->ngpio;
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bgc->gc.label = port->label;
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bgc->gc.of_node = dev->of_node;
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bgc->gc.of_gpio_n_cells = 3;
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bgc->gc.of_xlate = etraxfs_gpio_of_xlate;
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ret = gpiochip_add(&bgc->gc);
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if (ret)
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dev_err(dev, "Unable to register port %s\n",
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bgc->gc.label);
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}
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return 0;
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}
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static struct platform_driver etraxfs_gpio_driver = {
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.driver = {
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.name = "etraxfs-gpio",
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.of_match_table = of_match_ptr(etraxfs_gpio_of_table),
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},
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.probe = etraxfs_gpio_probe,
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};
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static int __init etraxfs_gpio_init(void)
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{
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return platform_driver_register(&etraxfs_gpio_driver);
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}
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device_initcall(etraxfs_gpio_init);
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