2006-06-29 13:24:40 +04:00
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#ifndef _LINUX_IRQ_H
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#define _LINUX_IRQ_H
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2005-04-17 02:20:36 +04:00
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/*
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* Please do not include this file in generic code. There is currently
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* no requirement for any architecture to implement anything held
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* within this file.
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*
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* Thanks. --rmk
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*/
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2005-12-21 04:27:50 +03:00
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#include <linux/smp.h>
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2005-04-17 02:20:36 +04:00
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2006-06-29 13:24:40 +04:00
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#ifndef CONFIG_S390
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2005-04-17 02:20:36 +04:00
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#include <linux/linkage.h>
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#include <linux/cache.h>
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#include <linux/spinlock.h>
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#include <linux/cpumask.h>
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2006-06-23 13:06:00 +04:00
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#include <linux/irqreturn.h>
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2005-04-17 02:20:36 +04:00
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#include <asm/irq.h>
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#include <asm/ptrace.h>
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/*
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* IRQ line status.
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2006-07-02 06:29:03 +04:00
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*
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* Bits 0-16 are reserved for the IRQF_* bits in linux/interrupt.h
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*
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* IRQ types
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2005-04-17 02:20:36 +04:00
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*/
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2006-07-02 06:29:03 +04:00
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#define IRQ_TYPE_NONE 0x00000000 /* Default, unspecified type */
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#define IRQ_TYPE_EDGE_RISING 0x00000001 /* Edge rising type */
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#define IRQ_TYPE_EDGE_FALLING 0x00000002 /* Edge falling type */
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#define IRQ_TYPE_EDGE_BOTH (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING)
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#define IRQ_TYPE_LEVEL_HIGH 0x00000004 /* Level high type */
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#define IRQ_TYPE_LEVEL_LOW 0x00000008 /* Level low type */
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#define IRQ_TYPE_SENSE_MASK 0x0000000f /* Mask of the above */
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#define IRQ_TYPE_PROBE 0x00000010 /* Probing in progress */
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/* Internal flags */
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#define IRQ_INPROGRESS 0x00010000 /* IRQ handler active - do not enter! */
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#define IRQ_DISABLED 0x00020000 /* IRQ disabled - do not enter! */
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#define IRQ_PENDING 0x00040000 /* IRQ pending - replay on enable */
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#define IRQ_REPLAY 0x00080000 /* IRQ has been replayed but not acked yet */
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#define IRQ_AUTODETECT 0x00100000 /* IRQ is being autodetected */
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#define IRQ_WAITING 0x00200000 /* IRQ not yet seen - for autodetection */
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#define IRQ_LEVEL 0x00400000 /* IRQ level triggered */
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#define IRQ_MASKED 0x00800000 /* IRQ masked - shouldn't be seen again */
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2006-07-30 14:03:33 +04:00
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#define IRQ_PER_CPU 0x01000000 /* IRQ is per CPU */
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2006-06-29 13:24:43 +04:00
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#ifdef CONFIG_IRQ_PER_CPU
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2005-09-07 02:17:25 +04:00
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# define CHECK_IRQ_PER_CPU(var) ((var) & IRQ_PER_CPU)
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#else
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# define CHECK_IRQ_PER_CPU(var) 0
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#endif
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2005-04-17 02:20:36 +04:00
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2006-07-02 06:29:03 +04:00
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#define IRQ_NOPROBE 0x02000000 /* IRQ is not valid for probing */
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#define IRQ_NOREQUEST 0x04000000 /* IRQ cannot be requested */
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#define IRQ_NOAUTOEN 0x08000000 /* IRQ will not be enabled on request irq */
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#define IRQ_DELAYED_DISABLE 0x10000000 /* IRQ disable (masking) happens delayed. */
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2006-07-30 14:03:08 +04:00
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#define IRQ_WAKEUP 0x20000000 /* IRQ triggers system wakeup */
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2006-10-04 13:16:27 +04:00
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#define IRQ_MOVE_PENDING 0x40000000 /* need to re-target IRQ destination */
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2006-06-29 13:24:51 +04:00
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struct proc_dir_entry;
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2006-06-29 13:24:45 +04:00
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/**
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2006-06-29 13:24:51 +04:00
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* struct irq_chip - hardware interrupt chip descriptor
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2006-06-29 13:24:45 +04:00
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*
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* @name: name for /proc/interrupts
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* @startup: start up the interrupt (defaults to ->enable if NULL)
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* @shutdown: shut down the interrupt (defaults to ->disable if NULL)
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* @enable: enable the interrupt (defaults to chip->unmask if NULL)
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* @disable: disable the interrupt (defaults to chip->mask if NULL)
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* @ack: start of a new interrupt
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* @mask: mask an interrupt source
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* @mask_ack: ack and mask an interrupt source
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* @unmask: unmask an interrupt source
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2006-06-29 13:25:03 +04:00
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* @eoi: end of interrupt - chip level
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* @end: end of interrupt - flow level
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2006-06-29 13:24:45 +04:00
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* @set_affinity: set the CPU affinity on SMP machines
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* @retrigger: resend an IRQ to the CPU
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* @set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
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* @set_wake: enable/disable power-management wake-on of an IRQ
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*
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* @release: release function solely used by UML
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2006-06-29 13:24:51 +04:00
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* @typename: obsoleted by name, kept as migration helper
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2005-04-17 02:20:36 +04:00
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*/
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2006-06-29 13:24:51 +04:00
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struct irq_chip {
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const char *name;
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2006-06-29 13:24:41 +04:00
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unsigned int (*startup)(unsigned int irq);
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void (*shutdown)(unsigned int irq);
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void (*enable)(unsigned int irq);
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void (*disable)(unsigned int irq);
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2006-06-29 13:24:51 +04:00
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2006-06-29 13:24:41 +04:00
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void (*ack)(unsigned int irq);
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2006-06-29 13:24:51 +04:00
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void (*mask)(unsigned int irq);
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void (*mask_ack)(unsigned int irq);
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void (*unmask)(unsigned int irq);
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2006-06-29 13:25:03 +04:00
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void (*eoi)(unsigned int irq);
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2006-06-29 13:24:51 +04:00
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2006-06-29 13:24:41 +04:00
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void (*end)(unsigned int irq);
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void (*set_affinity)(unsigned int irq, cpumask_t dest);
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2006-06-29 13:24:44 +04:00
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int (*retrigger)(unsigned int irq);
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2006-06-29 13:24:51 +04:00
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int (*set_type)(unsigned int irq, unsigned int flow_type);
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int (*set_wake)(unsigned int irq, unsigned int on);
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2006-06-29 13:24:44 +04:00
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2005-06-22 04:16:24 +04:00
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/* Currently used only by UML, might disappear one day.*/
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#ifdef CONFIG_IRQ_RELEASE_METHOD
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2006-06-29 13:24:41 +04:00
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void (*release)(unsigned int irq, void *dev_id);
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2005-06-22 04:16:24 +04:00
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#endif
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2006-06-29 13:24:51 +04:00
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/*
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* For compatibility, ->typename is copied into ->name.
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* Will disappear.
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*/
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const char *typename;
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2005-04-17 02:20:36 +04:00
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};
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2006-06-29 13:24:45 +04:00
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/**
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* struct irq_desc - interrupt descriptor
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*
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2006-06-29 13:24:51 +04:00
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* @handle_irq: highlevel irq-events handler [if NULL, __do_IRQ()]
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* @chip: low level interrupt hardware access
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* @handler_data: per-IRQ data for the irq_chip methods
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* @chip_data: platform-specific per-chip private data for the chip
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* methods, to allow shared chip implementations
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2006-06-29 13:24:45 +04:00
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* @action: the irq action chain
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* @status: status information
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* @depth: disable-depth, for nested irq_disable() calls
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2006-07-30 14:03:08 +04:00
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* @wake_depth: enable depth, for multiple set_irq_wake() callers
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2006-06-29 13:24:45 +04:00
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* @irq_count: stats field to detect stalled irqs
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* @irqs_unhandled: stats field for spurious unhandled interrupts
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* @lock: locking for SMP
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* @affinity: IRQ affinity on SMP
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2006-06-29 13:24:51 +04:00
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* @cpu: cpu index useful for balancing
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2006-06-29 13:24:45 +04:00
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* @pending_mask: pending rebalanced interrupts
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* @dir: /proc/irq/ procfs entry
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* @affinity_entry: /proc/irq/smp_affinity procfs entry on SMP
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2005-04-17 02:20:36 +04:00
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*
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* Pad this out to 32 bytes for cache and indexing reasons.
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*/
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2006-06-29 13:24:40 +04:00
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struct irq_desc {
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2006-06-29 13:24:51 +04:00
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void fastcall (*handle_irq)(unsigned int irq,
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struct irq_desc *desc,
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struct pt_regs *regs);
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struct irq_chip *chip;
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void *handler_data;
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2006-06-29 13:24:41 +04:00
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void *chip_data;
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struct irqaction *action; /* IRQ action list */
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unsigned int status; /* IRQ status */
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2006-06-29 13:24:51 +04:00
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2006-06-29 13:24:41 +04:00
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unsigned int depth; /* nested irq disables */
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2006-07-30 14:03:08 +04:00
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unsigned int wake_depth; /* nested wake enables */
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2006-06-29 13:24:41 +04:00
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unsigned int irq_count; /* For detecting broken IRQs */
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unsigned int irqs_unhandled;
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spinlock_t lock;
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2006-06-29 13:24:38 +04:00
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#ifdef CONFIG_SMP
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2006-06-29 13:24:41 +04:00
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cpumask_t affinity;
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2006-06-29 13:24:51 +04:00
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unsigned int cpu;
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2006-06-29 13:24:38 +04:00
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#endif
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2006-06-29 13:24:40 +04:00
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#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
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2006-06-29 13:24:42 +04:00
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cpumask_t pending_mask;
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
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#endif
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2006-06-29 13:24:42 +04:00
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#ifdef CONFIG_PROC_FS
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struct proc_dir_entry *dir;
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#endif
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2006-06-29 13:24:40 +04:00
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} ____cacheline_aligned;
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2005-04-17 02:20:36 +04:00
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2006-06-29 13:24:40 +04:00
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extern struct irq_desc irq_desc[NR_IRQS];
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2005-04-17 02:20:36 +04:00
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2006-06-29 13:24:40 +04:00
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/*
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* Migration helpers for obsolete names, they will go away:
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*/
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2006-06-29 13:24:51 +04:00
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#define hw_interrupt_type irq_chip
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typedef struct irq_chip hw_irq_controller;
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#define no_irq_type no_irq_chip
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2006-06-29 13:24:40 +04:00
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typedef struct irq_desc irq_desc_t;
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/*
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* Pick up the arch-dependent methods:
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*/
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#include <asm/hw_irq.h>
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2005-04-17 02:20:36 +04:00
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2006-06-29 13:24:40 +04:00
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extern int setup_irq(unsigned int irq, struct irqaction *new);
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2005-04-17 02:20:36 +04:00
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#ifdef CONFIG_GENERIC_HARDIRQS
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2006-06-29 13:24:40 +04:00
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2006-07-03 04:18:48 +04:00
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#ifndef handle_dynamic_tick
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# define handle_dynamic_tick(a) do { } while (0)
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#endif
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[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
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#ifdef CONFIG_SMP
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static inline void set_native_irq_info(int irq, cpumask_t mask)
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{
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2006-06-29 13:24:38 +04:00
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irq_desc[irq].affinity = mask;
|
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
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}
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#else
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static inline void set_native_irq_info(int irq, cpumask_t mask)
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{
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}
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#endif
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#ifdef CONFIG_SMP
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2006-06-29 13:24:40 +04:00
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#if defined(CONFIG_GENERIC_PENDING_IRQ) || defined(CONFIG_IRQBALANCE)
|
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
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2006-03-25 14:07:36 +03:00
|
|
|
void set_pending_irq(unsigned int irq, cpumask_t mask);
|
|
|
|
void move_native_irq(int irq);
|
2006-10-04 13:16:29 +04:00
|
|
|
void move_masked_irq(int irq);
|
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
|
|
|
|
2006-06-29 13:24:40 +04:00
|
|
|
#else /* CONFIG_GENERIC_PENDING_IRQ || CONFIG_IRQBALANCE */
|
|
|
|
|
|
|
|
static inline void move_irq(int irq)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void move_native_irq(int irq)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2006-10-04 13:16:29 +04:00
|
|
|
static inline void move_masked_irq(int irq)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2006-06-29 13:24:40 +04:00
|
|
|
static inline void set_pending_irq(unsigned int irq, cpumask_t mask)
|
|
|
|
{
|
|
|
|
}
|
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
|
|
|
|
2006-06-29 13:24:40 +04:00
|
|
|
#endif /* CONFIG_GENERIC_PENDING_IRQ */
|
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
|
|
|
|
2006-06-29 13:24:40 +04:00
|
|
|
#else /* CONFIG_SMP */
|
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
|
|
|
|
|
|
|
#define move_native_irq(x)
|
2006-10-04 13:16:29 +04:00
|
|
|
#define move_masked_irq(x)
|
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
|
|
|
|
2006-06-29 13:24:40 +04:00
|
|
|
#endif /* CONFIG_SMP */
|
[PATCH] x86/x86_64: deferred handling of writes to /proc/irqxx/smp_affinity
When handling writes to /proc/irq, current code is re-programming rte
entries directly. This is not recommended and could potentially cause
chipset's to lockup, or cause missing interrupts.
CONFIG_IRQ_BALANCE does this correctly, where it re-programs only when the
interrupt is pending. The same needs to be done for /proc/irq handling as well.
Otherwise user space irq balancers are really not doing the right thing.
- Changed pending_irq_balance_cpumask to pending_irq_migrate_cpumask for
lack of a generic name.
- added move_irq out of IRQ_BALANCE, and added this same to X86_64
- Added new proc handler for write, so we can do deferred write at irq
handling time.
- Display of /proc/irq/XX/smp_affinity used to display CPU_MASKALL, instead
it now shows only active cpu masks, or exactly what was set.
- Provided a common move_irq implementation, instead of duplicating
when using generic irq framework.
Tested on i386/x86_64 and ia64 with CONFIG_PCI_MSI turned on and off.
Tested UP builds as well.
MSI testing: tbd: I have cards, need to look for a x-over cable, although I
did test an earlier version of this patch. Will test in a couple days.
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Acked-by: Zwane Mwaikambo <zwane@holomorphy.com>
Grudgingly-acked-by: Andi Kleen <ak@muc.de>
Signed-off-by: Coywolf Qi Hunt <coywolf@lovecn.org>
Signed-off-by: Ashok Raj <ashok.raj@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-09-07 02:16:15 +04:00
|
|
|
|
2006-06-23 13:04:22 +04:00
|
|
|
#ifdef CONFIG_IRQBALANCE
|
|
|
|
extern void set_balance_irq_affinity(unsigned int irq, cpumask_t mask);
|
|
|
|
#else
|
|
|
|
static inline void set_balance_irq_affinity(unsigned int irq, cpumask_t mask)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2006-06-29 13:24:41 +04:00
|
|
|
#ifdef CONFIG_AUTO_IRQ_AFFINITY
|
|
|
|
extern int select_smp_affinity(unsigned int irq);
|
|
|
|
#else
|
|
|
|
static inline int select_smp_affinity(unsigned int irq)
|
|
|
|
{
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
extern int no_irq_affinity;
|
|
|
|
|
2006-06-29 13:24:51 +04:00
|
|
|
/* Handle irq action chains: */
|
|
|
|
extern int handle_IRQ_event(unsigned int irq, struct pt_regs *regs,
|
|
|
|
struct irqaction *action);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Built-in IRQ handlers for various IRQ types,
|
|
|
|
* callable via desc->chip->handle_irq()
|
|
|
|
*/
|
|
|
|
extern void fastcall
|
|
|
|
handle_level_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
|
|
|
|
extern void fastcall
|
2006-06-29 13:25:03 +04:00
|
|
|
handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc,
|
2006-06-29 13:24:51 +04:00
|
|
|
struct pt_regs *regs);
|
|
|
|
extern void fastcall
|
|
|
|
handle_edge_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
|
|
|
|
extern void fastcall
|
|
|
|
handle_simple_irq(unsigned int irq, struct irq_desc *desc,
|
|
|
|
struct pt_regs *regs);
|
|
|
|
extern void fastcall
|
|
|
|
handle_percpu_irq(unsigned int irq, struct irq_desc *desc,
|
|
|
|
struct pt_regs *regs);
|
|
|
|
extern void fastcall
|
|
|
|
handle_bad_irq(unsigned int irq, struct irq_desc *desc, struct pt_regs *regs);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Get a descriptive string for the highlevel handler, for
|
|
|
|
* /proc/interrupts output:
|
|
|
|
*/
|
|
|
|
extern const char *
|
|
|
|
handle_irq_name(void fastcall (*handle)(unsigned int, struct irq_desc *,
|
|
|
|
struct pt_regs *));
|
|
|
|
|
2006-06-29 13:24:39 +04:00
|
|
|
/*
|
2006-06-29 13:24:51 +04:00
|
|
|
* Monolithic do_IRQ implementation.
|
|
|
|
* (is an explicit fastcall, because i386 4KSTACKS calls it from assembly)
|
2006-06-29 13:24:39 +04:00
|
|
|
*/
|
2006-09-26 10:32:07 +04:00
|
|
|
#ifndef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
|
2005-04-17 02:20:36 +04:00
|
|
|
extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs);
|
2006-09-26 10:32:07 +04:00
|
|
|
#endif
|
2006-06-29 13:24:39 +04:00
|
|
|
|
2006-06-29 13:24:52 +04:00
|
|
|
/*
|
|
|
|
* Architectures call this to let the generic IRQ layer
|
|
|
|
* handle an interrupt. If the descriptor is attached to an
|
|
|
|
* irqchip-style controller then we call the ->handle_irq() handler,
|
|
|
|
* and it calls __do_IRQ() if it's attached to an irqtype-style controller.
|
|
|
|
*/
|
|
|
|
static inline void generic_handle_irq(unsigned int irq, struct pt_regs *regs)
|
|
|
|
{
|
|
|
|
struct irq_desc *desc = irq_desc + irq;
|
|
|
|
|
2006-09-26 10:32:07 +04:00
|
|
|
#ifdef CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ
|
|
|
|
desc->handle_irq(irq, desc, regs);
|
|
|
|
#else
|
2006-06-29 13:24:52 +04:00
|
|
|
if (likely(desc->handle_irq))
|
|
|
|
desc->handle_irq(irq, desc, regs);
|
|
|
|
else
|
|
|
|
__do_IRQ(irq, regs);
|
2006-09-26 10:32:07 +04:00
|
|
|
#endif
|
2006-06-29 13:24:52 +04:00
|
|
|
}
|
|
|
|
|
2006-06-29 13:24:51 +04:00
|
|
|
/* Handling of unhandled and spurious interrupts: */
|
2006-06-29 13:24:40 +04:00
|
|
|
extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
|
2006-06-29 13:24:39 +04:00
|
|
|
int action_ret, struct pt_regs *regs);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2006-06-29 13:24:48 +04:00
|
|
|
/* Resending of interrupts :*/
|
|
|
|
void check_irq_resend(struct irq_desc *desc, unsigned int irq);
|
|
|
|
|
2006-06-29 13:24:51 +04:00
|
|
|
/* Initialize /proc/irq/ */
|
2005-04-17 02:20:36 +04:00
|
|
|
extern void init_irq_proc(void);
|
2006-01-06 11:12:21 +03:00
|
|
|
|
2006-06-29 13:24:51 +04:00
|
|
|
/* Enable/disable irq debugging output: */
|
|
|
|
extern int noirqdebug_setup(char *str);
|
|
|
|
|
|
|
|
/* Checks whether the interrupt can be requested by request_irq(): */
|
|
|
|
extern int can_request_irq(unsigned int irq, unsigned long irqflags);
|
|
|
|
|
2006-07-02 01:30:08 +04:00
|
|
|
/* Dummy irq-chip implementations: */
|
2006-06-29 13:24:51 +04:00
|
|
|
extern struct irq_chip no_irq_chip;
|
2006-07-02 01:30:08 +04:00
|
|
|
extern struct irq_chip dummy_irq_chip;
|
2006-06-29 13:24:51 +04:00
|
|
|
|
|
|
|
extern void
|
|
|
|
set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
|
|
|
|
void fastcall (*handle)(unsigned int,
|
|
|
|
struct irq_desc *,
|
|
|
|
struct pt_regs *));
|
|
|
|
extern void
|
|
|
|
__set_irq_handler(unsigned int irq,
|
|
|
|
void fastcall (*handle)(unsigned int, struct irq_desc *,
|
|
|
|
struct pt_regs *),
|
|
|
|
int is_chained);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2006-06-29 13:24:51 +04:00
|
|
|
/*
|
|
|
|
* Set a highlevel flow handler for a given IRQ:
|
|
|
|
*/
|
|
|
|
static inline void
|
|
|
|
set_irq_handler(unsigned int irq,
|
|
|
|
void fastcall (*handle)(unsigned int, struct irq_desc *,
|
|
|
|
struct pt_regs *))
|
|
|
|
{
|
|
|
|
__set_irq_handler(irq, handle, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Set a highlevel chained flow handler for a given IRQ.
|
|
|
|
* (a chained handler is automatically enabled and set to
|
|
|
|
* IRQ_NOREQUEST and IRQ_NOPROBE)
|
|
|
|
*/
|
|
|
|
static inline void
|
|
|
|
set_irq_chained_handler(unsigned int irq,
|
|
|
|
void fastcall (*handle)(unsigned int, struct irq_desc *,
|
|
|
|
struct pt_regs *))
|
|
|
|
{
|
|
|
|
__set_irq_handler(irq, handle, 1);
|
|
|
|
}
|
|
|
|
|
2006-10-04 13:16:37 +04:00
|
|
|
/* Handle dynamic irq creation and destruction */
|
|
|
|
extern int create_irq(void);
|
|
|
|
extern void destroy_irq(unsigned int irq);
|
|
|
|
|
|
|
|
/* Dynamic irq helper functions */
|
|
|
|
extern void dynamic_irq_init(unsigned int irq);
|
|
|
|
extern void dynamic_irq_cleanup(unsigned int irq);
|
2006-06-29 13:24:53 +04:00
|
|
|
|
2006-10-04 13:16:37 +04:00
|
|
|
/* Set/get chip/data for an IRQ: */
|
2006-06-29 13:24:53 +04:00
|
|
|
extern int set_irq_chip(unsigned int irq, struct irq_chip *chip);
|
|
|
|
extern int set_irq_data(unsigned int irq, void *data);
|
|
|
|
extern int set_irq_chip_data(unsigned int irq, void *data);
|
|
|
|
extern int set_irq_type(unsigned int irq, unsigned int type);
|
|
|
|
|
|
|
|
#define get_irq_chip(irq) (irq_desc[irq].chip)
|
|
|
|
#define get_irq_chip_data(irq) (irq_desc[irq].chip_data)
|
|
|
|
#define get_irq_data(irq) (irq_desc[irq].handler_data)
|
|
|
|
|
2006-06-29 13:24:51 +04:00
|
|
|
#endif /* CONFIG_GENERIC_HARDIRQS */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2006-06-29 13:24:40 +04:00
|
|
|
#endif /* !CONFIG_S390 */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2006-06-29 13:24:40 +04:00
|
|
|
#endif /* _LINUX_IRQ_H */
|