WSL2-Linux-Kernel/arch/arc/plat-hsdk/Kconfig

# Copyright (C) 2017 Synopsys, Inc. (www.synopsys.com)
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License version 2 as
# published by the Free Software Foundation.
#

menuconfig ARC_SOC_HSDK
	bool "ARC HS Development Kit SOC"
	depends on ISA_ARCV2
	select ARC_HAS_ACCL_REGS
	select CLK_HSDK
	select RESET_HSDK
	select HAVE_PCI
ARC: [plat-hsdk] initial port for HSDK board This initial port adds support of ARC HS Development Kit board with some basic features such serial port, USB, SD/MMC and Ethernet. Essentially we run Linux kernel on all 4 cores (i.e. utilize SMP) and heavily use IO Coherency for speeding-up DMA-aware peripherals. Note as opposed to other ARC boards we link Linux kernel to 0x9000_0000 intentionally because cores 1 and 3 configured with DCCM situated at our more usual link base 0x8000_0000. We still can use memory region starting at 0x8000_0000 as we reallocate DCCM in our platform code. Note that PAE remapping for DMA clients does not work due to an RTL bug, so CREG_PAE register must be programmed to all zeroes, otherwise it will cause problems with DMA to/from peripherals even if PAE40 is not used. Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 2017-08-15 21:13:55 +03:00			`# Copyright (C) 2017 Synopsys, Inc. (www.synopsys.com)`
			`#`
			`# This program is free software; you can redistribute it and/or modify`
			`# it under the terms of the GNU General Public License version 2 as`
			`# published by the Free Software Foundation.`
			`#`

			`menuconfig ARC_SOC_HSDK`
ARC: [plat-hsdk] use actual clk driver to manage cpu clk With corresponding clk driver now merged upstream, switch to it. - core_clk now represent the PLL (vs. fixed clk before) - input_clk represent the clk signal src for PLL (basically xtal) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 2017-09-04 12:48:43 +03:00			`bool "ARC HS Development Kit SOC"`
ARCv2: [plat-hsdk]: Save accl reg pair by default This manifsted as strace segfaulting on HSDK because gcc was targetting the accumulator registers as GPRs, which kernek was not saving/restoring by default. Cc: stable@vger.kernel.org #4.14+ Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 2018-07-18 01:21:56 +03:00			`depends on ISA_ARCV2`
			`select ARC_HAS_ACCL_REGS`
ARC: [plat-hsdk] use actual clk driver to manage cpu clk With corresponding clk driver now merged upstream, switch to it. - core_clk now represent the PLL (vs. fixed clk before) - input_clk represent the clk signal src for PLL (basically xtal) Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 2017-09-04 12:48:43 +03:00			`select CLK_HSDK`
ARC: [plat-hsdk] select CONFIG_RESET_HSDK from Kconfig Signed-off-by: Vineet Gupta <vgupta@synopsys.com> 2017-10-07 02:44:27 +03:00			`select RESET_HSDK`
PCI: consolidate PCI config entry in drivers/pci There is no good reason to duplicate the PCI menu in every architecture. Instead provide a selectable HAVE_PCI symbol that indicates availability of PCI support, and a FORCE_PCI symbol to for PCI on and the handle the rest in drivers/pci. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> 2018-11-15 22:05:32 +03:00			`select HAVE_PCI`