2020-12-15 17:42:56 +03:00
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2020, Red Hat Inc. All rights reserved.
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*/
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#ifndef _VDPA_SIM_H
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#define _VDPA_SIM_H
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2021-03-15 19:34:37 +03:00
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#include <linux/iova.h>
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2020-12-15 17:42:56 +03:00
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#include <linux/vringh.h>
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#include <linux/vdpa.h>
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#include <linux/virtio_byteorder.h>
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#include <linux/vhost_iotlb.h>
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#include <uapi/linux/virtio_config.h>
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#define VDPASIM_FEATURES ((1ULL << VIRTIO_F_ANY_LAYOUT) | \
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(1ULL << VIRTIO_F_VERSION_1) | \
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(1ULL << VIRTIO_F_ACCESS_PLATFORM))
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struct vdpasim;
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struct vdpasim_virtqueue {
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struct vringh vring;
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struct vringh_kiov in_iov;
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struct vringh_kiov out_iov;
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unsigned short head;
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bool ready;
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u64 desc_addr;
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u64 device_addr;
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u64 driver_addr;
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u32 num;
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void *private;
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irqreturn_t (*cb)(void *data);
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};
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struct vdpasim_dev_attr {
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2021-01-05 13:32:03 +03:00
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struct vdpa_mgmt_dev *mgmt_dev;
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const char *name;
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2020-12-15 17:42:56 +03:00
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u64 supported_features;
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size_t config_size;
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size_t buffer_size;
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int nvqs;
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u32 id;
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2022-03-30 21:03:59 +03:00
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u32 ngroups;
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u32 nas;
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2020-12-15 17:42:56 +03:00
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work_func_t work_fn;
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void (*get_config)(struct vdpasim *vdpasim, void *config);
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void (*set_config)(struct vdpasim *vdpasim, const void *config);
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};
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/* State of each vdpasim device */
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struct vdpasim {
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struct vdpa_device vdpa;
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struct vdpasim_virtqueue *vqs;
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struct work_struct work;
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struct vdpasim_dev_attr dev_attr;
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/* spinlock to synchronize virtqueue state */
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spinlock_t lock;
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/* virtio config according to device type */
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void *config;
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struct vhost_iotlb *iommu;
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2021-03-15 19:34:37 +03:00
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struct iova_domain iova;
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2020-12-15 17:42:56 +03:00
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void *buffer;
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u32 status;
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u32 generation;
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u64 features;
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2022-03-30 21:03:45 +03:00
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u32 groups;
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2020-12-15 17:42:56 +03:00
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/* spinlock to synchronize iommu table */
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spinlock_t iommu_lock;
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};
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struct vdpasim *vdpasim_create(struct vdpasim_dev_attr *attr);
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/* TODO: cross-endian support */
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static inline bool vdpasim_is_little_endian(struct vdpasim *vdpasim)
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{
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return virtio_legacy_is_little_endian() ||
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(vdpasim->features & (1ULL << VIRTIO_F_VERSION_1));
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}
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static inline u16 vdpasim16_to_cpu(struct vdpasim *vdpasim, __virtio16 val)
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{
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return __virtio16_to_cpu(vdpasim_is_little_endian(vdpasim), val);
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}
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static inline __virtio16 cpu_to_vdpasim16(struct vdpasim *vdpasim, u16 val)
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{
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return __cpu_to_virtio16(vdpasim_is_little_endian(vdpasim), val);
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}
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static inline u32 vdpasim32_to_cpu(struct vdpasim *vdpasim, __virtio32 val)
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{
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return __virtio32_to_cpu(vdpasim_is_little_endian(vdpasim), val);
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}
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static inline __virtio32 cpu_to_vdpasim32(struct vdpasim *vdpasim, u32 val)
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{
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return __cpu_to_virtio32(vdpasim_is_little_endian(vdpasim), val);
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}
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static inline u64 vdpasim64_to_cpu(struct vdpasim *vdpasim, __virtio64 val)
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{
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return __virtio64_to_cpu(vdpasim_is_little_endian(vdpasim), val);
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}
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static inline __virtio64 cpu_to_vdpasim64(struct vdpasim *vdpasim, u64 val)
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{
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return __cpu_to_virtio64(vdpasim_is_little_endian(vdpasim), val);
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}
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#endif
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