2018-12-18 20:05:55 +03:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree Source for the RZA2MEVB board
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*
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* Copyright (C) 2018 Renesas Electronics
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*
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2021-03-04 12:49:45 +03:00
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* As upstream Linux does not support XIP, it cannot run in 8 MiB of HyperRAM.
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* Hence the 64 MiB of SDRAM on the sub-board needs to be enabled, which has
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* the following ramifications:
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* - SCIF4 connected to the on-board USB-serial can no longer be used as the
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* serial console,
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* - Instead, SCIF2 is used as the serial console, by connecting a 3.3V TTL
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* USB-to-Serial adapter to the CMOS camera connector:
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* - RXD = CN17-9,
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* - TXD = CN17-10,
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* - GND = CN17-2 or CN17-17,
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* - The first Ethernet channel can no longer be used,
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* - USB Channel 1 loses the overcurrent input signal.
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*
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* Please make sure your sub-board matches the following switch settings:
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*
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* SW6 SW6-1 set to SDRAM
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* ON SW6-2 set to Audio
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* +---------------------+ SW6-3 set to DRP
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* | = = = = = | SW6-4 set to CEU
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* | = = | SW6-5 set to Ether2
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* | 1 2 3 4 5 6 7 8 9 0 | SW6-6 set to VDC6
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* +---------------------+ SW6-7 set to VDC6
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2018-12-18 20:05:55 +03:00
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*/
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/dts-v1/;
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#include "r7s9210.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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2019-06-04 23:09:14 +03:00
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#include <dt-bindings/input/input.h>
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2018-12-18 20:05:55 +03:00
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#include <dt-bindings/pinctrl/r7s9210-pinctrl.h>
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/ {
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model = "RZA2MEVB";
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compatible = "renesas,rza2mevb", "renesas,r7s9210";
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aliases {
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2021-03-04 12:49:45 +03:00
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serial0 = &scif2;
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ethernet0 = ðer1;
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2018-12-18 20:05:55 +03:00
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};
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chosen {
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bootargs = "ignore_loglevel";
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stdout-path = "serial0:115200n8";
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};
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2019-06-04 23:09:14 +03:00
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keyboard {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&keyboard_pins>;
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key-3 {
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interrupt-parent = <&irqc>;
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interrupts = <0 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_3>;
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label = "SW3";
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wakeup-source;
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};
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};
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2018-12-18 20:05:55 +03:00
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lbsc {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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leds {
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compatible = "gpio-leds";
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red {
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gpios = <&pinctrl RZA2_PIN(PORT6, 0) GPIO_ACTIVE_HIGH>;
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};
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green {
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gpios = <&pinctrl RZA2_PIN(PORTC, 1) GPIO_ACTIVE_HIGH>;
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};
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};
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2019-05-17 17:43:07 +03:00
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2021-03-04 12:49:45 +03:00
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memory@c000000 {
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2019-05-17 17:43:07 +03:00
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device_type = "memory";
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2021-03-04 12:49:45 +03:00
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reg = <0x0c000000 0x04000000>; /* SDRAM */
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2019-05-17 17:43:07 +03:00
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};
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};
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&ehci0 {
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status = "okay";
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};
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&ehci1 {
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status = "okay";
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};
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ðer1 {
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pinctrl-names = "default";
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pinctrl-0 = <ð1_pins>;
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status = "okay";
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renesas,no-ether-link;
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phy-handle = <&phy1>;
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phy1: ethernet-phy@1 {
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reg = <0>;
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};
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2018-12-18 20:05:55 +03:00
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};
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/* EXTAL */
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&extal_clk {
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clock-frequency = <24000000>; /* 24MHz */
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};
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2019-05-17 17:43:07 +03:00
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/* High resolution System tick timers */
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&ostm0 {
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status = "okay";
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2018-12-18 20:05:55 +03:00
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};
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2019-05-17 17:43:07 +03:00
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&ostm1 {
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status = "okay";
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2019-05-14 17:55:52 +03:00
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};
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2018-12-18 20:05:55 +03:00
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&pinctrl {
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2019-04-30 16:23:08 +03:00
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eth0_pins: eth0 {
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pinmux = <RZA2_PINMUX(PORTE, 0, 7)>, /* REF50CK0 */
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<RZA2_PINMUX(PORT6, 1, 7)>, /* RMMI0_TXDEN */
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<RZA2_PINMUX(PORT6, 2, 7)>, /* RMII0_TXD0 */
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<RZA2_PINMUX(PORT6, 3, 7)>, /* RMII0_TXD1 */
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<RZA2_PINMUX(PORTE, 4, 7)>, /* RMII0_CRSDV */
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<RZA2_PINMUX(PORTE, 1, 7)>, /* RMII0_RXD0 */
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<RZA2_PINMUX(PORTE, 2, 7)>, /* RMII0_RXD1 */
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<RZA2_PINMUX(PORTE, 3, 7)>, /* RMII0_RXER */
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<RZA2_PINMUX(PORTE, 5, 1)>, /* ET0_MDC */
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<RZA2_PINMUX(PORTE, 6, 1)>, /* ET0_MDIO */
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<RZA2_PINMUX(PORTL, 0, 5)>; /* IRQ4 */
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};
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eth1_pins: eth1 {
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pinmux = <RZA2_PINMUX(PORTK, 3, 7)>, /* REF50CK1 */
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<RZA2_PINMUX(PORTK, 0, 7)>, /* RMMI1_TXDEN */
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<RZA2_PINMUX(PORTK, 1, 7)>, /* RMII1_TXD0 */
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<RZA2_PINMUX(PORTK, 2, 7)>, /* RMII1_TXD1 */
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<RZA2_PINMUX(PORT3, 2, 7)>, /* RMII1_CRSDV */
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<RZA2_PINMUX(PORTK, 4, 7)>, /* RMII1_RXD0 */
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<RZA2_PINMUX(PORT3, 5, 7)>, /* RMII1_RXD1 */
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<RZA2_PINMUX(PORT3, 1, 7)>, /* RMII1_RXER */
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<RZA2_PINMUX(PORT3, 3, 1)>, /* ET1_MDC */
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<RZA2_PINMUX(PORT3, 4, 1)>, /* ET1_MDIO */
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<RZA2_PINMUX(PORTL, 1, 5)>; /* IRQ5 */
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};
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2019-04-30 16:23:09 +03:00
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2019-06-04 23:09:14 +03:00
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keyboard_pins: keyboard {
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pinmux = <RZA2_PINMUX(PORTJ, 1, 6)>; /* IRQ0 */
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};
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2019-05-17 17:43:07 +03:00
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/* Serial Console */
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2021-03-04 12:49:45 +03:00
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scif2_pins: serial2 {
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pinmux = <RZA2_PINMUX(PORTE, 2, 3)>, /* TxD2 */
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<RZA2_PINMUX(PORTE, 1, 3)>; /* RxD2 */
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2019-05-17 17:43:07 +03:00
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};
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2019-04-30 16:23:09 +03:00
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sdhi0_pins: sdhi0 {
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pinmux = <RZA2_PINMUX(PORT5, 0, 3)>, /* SD0_CD */
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<RZA2_PINMUX(PORT5, 1, 3)>; /* SD0_WP */
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};
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sdhi1_pins: sdhi1 {
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pinmux = <RZA2_PINMUX(PORT5, 4, 3)>, /* SD1_CD */
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<RZA2_PINMUX(PORT5, 5, 3)>; /* SD1_WP */
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};
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2019-05-15 18:20:48 +03:00
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usb0_pins: usb0 {
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pinmux = <RZA2_PINMUX(PORT5, 2, 3)>, /* VBUSIN0 */
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<RZA2_PINMUX(PORTC, 6, 1)>, /* VBUSEN0 */
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<RZA2_PINMUX(PORTC, 7, 1)>; /* OVRCUR0 */
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};
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usb1_pins: usb1 {
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pinmux = <RZA2_PINMUX(PORTC, 0, 1)>, /* VBUSIN1 */
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2021-03-04 12:49:45 +03:00
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<RZA2_PINMUX(PORTC, 5, 1)>; /* VBUSEN1 */
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2019-05-15 18:20:48 +03:00
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};
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2018-12-18 20:05:55 +03:00
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};
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2019-05-17 17:43:07 +03:00
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/* RTC_X1 */
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&rtc_x1_clk {
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clock-frequency = <32768>;
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2018-12-18 20:05:55 +03:00
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};
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/* Serial Console */
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2021-03-04 12:49:45 +03:00
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&scif2 {
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2018-12-18 20:05:55 +03:00
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pinctrl-names = "default";
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2021-03-04 12:49:45 +03:00
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pinctrl-0 = <&scif2_pins>;
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2018-12-18 20:05:55 +03:00
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status = "okay";
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};
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2019-04-30 16:23:08 +03:00
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2019-04-30 16:23:09 +03:00
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&sdhi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdhi0_pins>;
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bus-width = <4>;
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status = "okay";
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};
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&sdhi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&sdhi1_pins>;
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bus-width = <4>;
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status = "okay";
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};
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2019-05-15 18:20:48 +03:00
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/* USB-0 as Host */
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&usb2_phy0 {
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pinctrl-names = "default";
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pinctrl-0 = <&usb0_pins>;
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dr_mode = "host"; /* Requires JP3 to be fitted */
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status = "okay";
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};
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/* USB-1 as Host */
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&usb2_phy1 {
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pinctrl-names = "default";
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pinctrl-0 = <&usb1_pins>;
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dr_mode = "host";
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status = "okay";
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};
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2019-05-17 17:43:07 +03:00
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/* USB_X1 */
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&usb_x1_clk {
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clock-frequency = <48000000>;
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2019-05-15 18:20:48 +03:00
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};
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