2018-09-05 09:25:12 +03:00
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ASM_CSKY_PGTABLE_H
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#define __ASM_CSKY_PGTABLE_H
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#include <asm/fixmap.h>
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2019-12-01 17:34:19 +03:00
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#include <asm/memory.h>
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2018-09-05 09:25:12 +03:00
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#include <asm/addrspace.h>
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#include <abi/pgtable-bits.h>
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#include <asm-generic/pgtable-nopmd.h>
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#define PGDIR_SHIFT 22
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE-1))
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2020-09-07 09:20:18 +03:00
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#define USER_PTRS_PER_PGD (PAGE_OFFSET/PGDIR_SIZE)
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2018-09-05 09:25:12 +03:00
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/*
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* C-SKY is two-level paging structure:
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*/
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2022-07-03 17:11:51 +03:00
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#define PTRS_PER_PGD (PAGE_SIZE / sizeof(pgd_t))
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2018-09-05 09:25:12 +03:00
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#define PTRS_PER_PMD 1
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2022-07-03 17:11:50 +03:00
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#define PTRS_PER_PTE (PAGE_SIZE / sizeof(pte_t))
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2018-09-05 09:25:12 +03:00
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#define pte_ERROR(e) \
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pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte_low)
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#define pgd_ERROR(e) \
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pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
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2022-02-04 21:49:20 +03:00
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#define pmd_pfn(pmd) (pmd_phys(pmd) >> PAGE_SHIFT)
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2018-09-05 09:25:12 +03:00
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#define pmd_page(pmd) (pfn_to_page(pmd_phys(pmd) >> PAGE_SHIFT))
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#define pte_clear(mm, addr, ptep) set_pte((ptep), \
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2020-12-24 03:12:06 +03:00
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(((unsigned int) addr >= PAGE_OFFSET) ? __pte(_PAGE_GLOBAL) : __pte(0)))
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2019-01-11 07:48:25 +03:00
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#define pte_none(pte) (!(pte_val(pte) & ~_PAGE_GLOBAL))
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2018-09-05 09:25:12 +03:00
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#define pte_present(pte) (pte_val(pte) & _PAGE_PRESENT)
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#define pte_pfn(x) ((unsigned long)((x).pte_low >> PAGE_SHIFT))
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#define pfn_pte(pfn, prot) __pte(((unsigned long long)(pfn) << PAGE_SHIFT) \
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| pgprot_val(prot))
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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#define pte_page(x) pfn_to_page(pte_pfn(x))
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#define __mk_pte(page_nr, pgprot) __pte(((page_nr) << PAGE_SHIFT) | \
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pgprot_val(pgprot))
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/*
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2021-01-11 18:02:38 +03:00
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* C-SKY only has VALID and DIRTY bit in hardware. So we need to use the
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* two bits emulate PRESENT, READ, WRITE, EXEC, MODIFIED, ACCESSED.
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2018-09-05 09:25:12 +03:00
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*/
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csky: Fixup _PAGE_ACCESSED for default pgprot
When the system memory is exhausted, linux will trigger kswapd to
shrink memory page cache. We found the csky's .text file mapping
pages would be reclaimed earlier than arm's elf. Because csky
doesn't give _PAGE_ACCESSED for default pgprot and in zap_pte_range
if (pte_young(ptent) &&
likely(!(vma->vm_flags & VM_SEQ_READ)))
mark_page_accessed(page);
mark_page_accessed will put the pages into active lru list.
[ 3.652722] delete busybox page from inactive file list
Call Trace:
[<9012a376>] dump_stack+0xe/0x24
[<9012a370>] dump_stack+0x8/0x24
[<9005b780>] activate_page+0x2b4/0x2d4
[<90132502>] vsnprintf+0x2c6/0x374
[<9005b880>] mark_page_accessed+0xe0/0x150
[<9006903e>] unmap_page_range+0x166/0x33c
[<90021844>] get_signal+0x98/0x3b4
[<90069232>] unmap_single_vma+0x1e/0x24
[<90069462>] unmap_vmas+0x26/0x40
[<9006d3d8>] exit_mmap+0x60/0xbc
[<9006a140>] handle_mm_fault+0x700/0xcec
[<900426b2>] ktime_get_with_offset+0x86/0x130
[<90017566>] mmput+0x2e/0x90
[<9001a30a>] do_exit+0x13e/0x6f0
[<90015448>] page_fault_end+0x14/0x74
[<9001b4bc>] SyS_exit_group+0x0/0xc
[<9001b47c>] do_group_exit+0x2c/0x6c
[<9001b4c8>] __wake_up_parent+0x0/0x20
[<9001399e>] csky_systemcall+0x6e/0x72
csky will throw the pages at first and keep them in active lru
list later after real accessed, but arm would keep them in active
lru list at the beginning.
The following are statistics of different architecture styles:
Default _PAGE_ACCESSED: alpha, arm, arm64, ia64, m68k, microblaze,
openrisc, powerpc, riscv, sh, um, x86,
xtensa
Not def _PAGE_ACCESSED: arc, c6x, h8300, hexgon, mips, s390, nds32,
nios2, parisc, sparc
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Co-developed-by: Xu Kai <xukai@nationalchip.com>
Signed-off-by: Xu Kai <xukai@nationalchip.com>
2021-01-11 15:16:28 +03:00
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#define _PAGE_BASE (_PAGE_PRESENT | _PAGE_ACCESSED)
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2021-01-13 10:28:16 +03:00
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#define PAGE_NONE __pgprot(_PAGE_PROT_NONE)
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2021-01-11 18:02:38 +03:00
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#define PAGE_READ __pgprot(_PAGE_BASE | _PAGE_READ | \
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2018-09-05 09:25:12 +03:00
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_CACHE_CACHED)
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2021-01-11 18:02:38 +03:00
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#define PAGE_WRITE __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_WRITE | \
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_CACHE_CACHED)
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#define PAGE_SHARED PAGE_WRITE
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#define PAGE_KERNEL __pgprot(_PAGE_BASE | _PAGE_READ | _PAGE_VALID | \
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_PAGE_WRITE | _PAGE_DIRTY | _PAGE_MODIFIED | \
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_PAGE_GLOBAL | \
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2018-09-05 09:25:12 +03:00
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_CACHE_CACHED)
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2021-01-11 18:02:38 +03:00
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#define _PAGE_IOREMAP (_PAGE_BASE | _PAGE_READ | _PAGE_VALID | \
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_PAGE_WRITE | _PAGE_DIRTY | _PAGE_MODIFIED | \
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_PAGE_GLOBAL | \
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_CACHE_UNCACHED | _PAGE_SO)
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2019-08-13 12:41:57 +03:00
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2021-01-13 10:28:16 +03:00
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#define _PAGE_CHG_MASK (~(unsigned long) \
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(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \
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_CACHE_MASK | _PAGE_GLOBAL))
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#define MAX_SWAPFILES_CHECK() \
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BUILD_BUG_ON(MAX_SWAPFILES_SHIFT != 5)
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2018-09-05 09:25:12 +03:00
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extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
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#define ZERO_PAGE(vaddr) (virt_to_page(empty_zero_page))
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extern void load_pgd(unsigned long pg_dir);
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extern pte_t invalid_pte_table[PTRS_PER_PTE];
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static inline void set_pte(pte_t *p, pte_t pte)
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{
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*p = pte;
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#if defined(CONFIG_CPU_NEED_TLBSYNC)
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dcache_wb_line((u32)p);
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#endif
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/* prevent out of order excution */
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smp_mb();
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}
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#define set_pte_at(mm, addr, ptep, pteval) set_pte(ptep, pteval)
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static inline pte_t *pmd_page_vaddr(pmd_t pmd)
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{
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unsigned long ptr;
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ptr = pmd_val(pmd);
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return __va(ptr);
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}
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#define pmd_phys(pmd) pmd_val(pmd)
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static inline void set_pmd(pmd_t *p, pmd_t pmd)
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{
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*p = pmd;
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#if defined(CONFIG_CPU_NEED_TLBSYNC)
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dcache_wb_line((u32)p);
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#endif
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/* prevent specul excute */
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smp_mb();
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}
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static inline int pmd_none(pmd_t pmd)
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{
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return pmd_val(pmd) == __pa(invalid_pte_table);
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}
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#define pmd_bad(pmd) (pmd_val(pmd) & ~PAGE_MASK)
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static inline int pmd_present(pmd_t pmd)
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{
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return (pmd_val(pmd) != __pa(invalid_pte_table));
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}
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static inline void pmd_clear(pmd_t *p)
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{
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pmd_val(*p) = (__pa(invalid_pte_table));
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#if defined(CONFIG_CPU_NEED_TLBSYNC)
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dcache_wb_line((u32)p);
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#endif
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}
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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static inline int pte_read(pte_t pte)
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{
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return pte.pte_low & _PAGE_READ;
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}
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static inline int pte_write(pte_t pte)
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{
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return (pte).pte_low & _PAGE_WRITE;
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}
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static inline int pte_dirty(pte_t pte)
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{
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return (pte).pte_low & _PAGE_MODIFIED;
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}
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static inline int pte_young(pte_t pte)
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{
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return (pte).pte_low & _PAGE_ACCESSED;
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}
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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pte_val(pte) &= ~(_PAGE_WRITE | _PAGE_DIRTY);
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return pte;
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}
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static inline pte_t pte_mkclean(pte_t pte)
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{
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pte_val(pte) &= ~(_PAGE_MODIFIED|_PAGE_DIRTY);
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return pte;
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}
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static inline pte_t pte_mkold(pte_t pte)
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{
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pte_val(pte) &= ~(_PAGE_ACCESSED|_PAGE_VALID);
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return pte;
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}
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static inline pte_t pte_mkwrite(pte_t pte)
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{
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pte_val(pte) |= _PAGE_WRITE;
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if (pte_val(pte) & _PAGE_MODIFIED)
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pte_val(pte) |= _PAGE_DIRTY;
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return pte;
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}
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static inline pte_t pte_mkdirty(pte_t pte)
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{
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pte_val(pte) |= _PAGE_MODIFIED;
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if (pte_val(pte) & _PAGE_WRITE)
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pte_val(pte) |= _PAGE_DIRTY;
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return pte;
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}
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static inline pte_t pte_mkyoung(pte_t pte)
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{
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pte_val(pte) |= _PAGE_ACCESSED;
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if (pte_val(pte) & _PAGE_READ)
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pte_val(pte) |= _PAGE_VALID;
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return pte;
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}
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2023-01-13 20:10:05 +03:00
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static inline int pte_swp_exclusive(pte_t pte)
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{
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return pte_val(pte) & _PAGE_SWP_EXCLUSIVE;
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}
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static inline pte_t pte_swp_mkexclusive(pte_t pte)
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{
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pte_val(pte) |= _PAGE_SWP_EXCLUSIVE;
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return pte;
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}
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static inline pte_t pte_swp_clear_exclusive(pte_t pte)
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{
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pte_val(pte) &= ~_PAGE_SWP_EXCLUSIVE;
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return pte;
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}
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2019-01-30 15:13:11 +03:00
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#define __HAVE_PHYS_MEM_ACCESS_PROT
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struct file;
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extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
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unsigned long size, pgprot_t vma_prot);
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2018-09-05 09:25:12 +03:00
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/*
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* Macro to make mark a page protection value as "uncacheable". Note
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* that "protection" is really a misnomer here as the protection value
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* contains the memory attribute bits, dirty bits, and various other
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* bits as well.
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*/
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#define pgprot_noncached pgprot_noncached
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static inline pgprot_t pgprot_noncached(pgprot_t _prot)
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{
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unsigned long prot = pgprot_val(_prot);
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2019-07-30 09:43:22 +03:00
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prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED | _PAGE_SO;
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return __pgprot(prot);
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}
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#define pgprot_writecombine pgprot_writecombine
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static inline pgprot_t pgprot_writecombine(pgprot_t _prot)
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{
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unsigned long prot = pgprot_val(_prot);
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2018-09-05 09:25:12 +03:00
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prot = (prot & ~_CACHE_MASK) | _CACHE_UNCACHED;
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return __pgprot(prot);
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}
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*/
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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return __pte((pte_val(pte) & _PAGE_CHG_MASK) |
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(pgprot_val(newprot)));
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}
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extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
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extern void paging_init(void);
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void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
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pte_t *pte);
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#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
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remap_pfn_range(vma, vaddr, pfn, size, prot)
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#endif /* __ASM_CSKY_PGTABLE_H */
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