2009-08-20 16:01:05 +04:00
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/*
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* Fifo-attached Serial Interface (FSI) support for SH7724
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*
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* Copyright (C) 2009 Renesas Solutions Corp.
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* Kuninori Morimoto <morimoto.kuninori@renesas.com>
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*
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* Based on ssi.c
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* Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/list.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <sound/pcm_params.h>
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#include <sound/sh_fsi.h>
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#include <asm/atomic.h>
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#define DO_FMT 0x0000
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#define DOFF_CTL 0x0004
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#define DOFF_ST 0x0008
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#define DI_FMT 0x000C
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#define DIFF_CTL 0x0010
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#define DIFF_ST 0x0014
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#define CKG1 0x0018
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#define CKG2 0x001C
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#define DIDT 0x0020
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#define DODT 0x0024
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#define MUTE_ST 0x0028
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#define REG_END MUTE_ST
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#define INT_ST 0x0200
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#define IEMSK 0x0204
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#define IMSK 0x0208
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#define MUTE 0x020C
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#define CLK_RST 0x0210
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#define SOFT_RST 0x0214
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#define MREG_START INT_ST
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#define MREG_END SOFT_RST
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/* DO_FMT */
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/* DI_FMT */
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#define CR_FMT(param) ((param) << 4)
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# define CR_MONO 0x0
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# define CR_MONO_D 0x1
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# define CR_PCM 0x2
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# define CR_I2S 0x3
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# define CR_TDM 0x4
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# define CR_TDM_D 0x5
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/* DOFF_CTL */
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/* DIFF_CTL */
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#define IRQ_HALF 0x00100000
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#define FIFO_CLR 0x00000001
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/* DOFF_ST */
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#define ERR_OVER 0x00000010
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#define ERR_UNDER 0x00000001
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/* CLK_RST */
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#define B_CLK 0x00000010
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#define A_CLK 0x00000001
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/* INT_ST */
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#define INT_B_IN (1 << 12)
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#define INT_B_OUT (1 << 8)
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#define INT_A_IN (1 << 4)
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#define INT_A_OUT (1 << 0)
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#define FSI_RATES SNDRV_PCM_RATE_8000_96000
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#define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
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/************************************************************************
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struct
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************************************************************************/
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struct fsi_priv {
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void __iomem *base;
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struct snd_pcm_substream *substream;
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int fifo_max;
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int chan;
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int byte_offset;
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int period_len;
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int buffer_len;
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int periods;
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};
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struct fsi_master {
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void __iomem *base;
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int irq;
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struct clk *clk;
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struct fsi_priv fsia;
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struct fsi_priv fsib;
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struct sh_fsi_platform_info *info;
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};
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static struct fsi_master *master;
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/************************************************************************
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basic read write function
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************************************************************************/
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static int __fsi_reg_write(u32 reg, u32 data)
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{
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/* valid data area is 24bit */
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data &= 0x00ffffff;
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return ctrl_outl(data, reg);
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}
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static u32 __fsi_reg_read(u32 reg)
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{
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return ctrl_inl(reg);
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}
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static int __fsi_reg_mask_set(u32 reg, u32 mask, u32 data)
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{
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u32 val = __fsi_reg_read(reg);
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val &= ~mask;
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val |= data & mask;
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return __fsi_reg_write(reg, val);
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}
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static int fsi_reg_write(struct fsi_priv *fsi, u32 reg, u32 data)
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{
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if (reg > REG_END)
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return -1;
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return __fsi_reg_write((u32)(fsi->base + reg), data);
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}
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static u32 fsi_reg_read(struct fsi_priv *fsi, u32 reg)
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{
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if (reg > REG_END)
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return 0;
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return __fsi_reg_read((u32)(fsi->base + reg));
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}
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static int fsi_reg_mask_set(struct fsi_priv *fsi, u32 reg, u32 mask, u32 data)
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{
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if (reg > REG_END)
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return -1;
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return __fsi_reg_mask_set((u32)(fsi->base + reg), mask, data);
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}
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static int fsi_master_write(u32 reg, u32 data)
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{
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if ((reg < MREG_START) ||
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(reg > MREG_END))
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return -1;
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return __fsi_reg_write((u32)(master->base + reg), data);
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}
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static u32 fsi_master_read(u32 reg)
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{
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if ((reg < MREG_START) ||
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(reg > MREG_END))
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return 0;
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return __fsi_reg_read((u32)(master->base + reg));
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}
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static int fsi_master_mask_set(u32 reg, u32 mask, u32 data)
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{
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if ((reg < MREG_START) ||
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(reg > MREG_END))
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return -1;
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return __fsi_reg_mask_set((u32)(master->base + reg), mask, data);
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}
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/************************************************************************
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basic function
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************************************************************************/
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static struct fsi_priv *fsi_get(struct snd_pcm_substream *substream)
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{
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struct snd_soc_pcm_runtime *rtd;
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struct fsi_priv *fsi = NULL;
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if (!substream || !master)
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return NULL;
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rtd = substream->private_data;
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switch (rtd->dai->cpu_dai->id) {
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case 0:
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fsi = &master->fsia;
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break;
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case 1:
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fsi = &master->fsib;
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break;
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}
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return fsi;
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}
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static int fsi_is_port_a(struct fsi_priv *fsi)
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{
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/* return
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* 1 : port a
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* 0 : port b
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*/
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if (fsi == &master->fsia)
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return 1;
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return 0;
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}
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static u32 fsi_get_info_flags(struct fsi_priv *fsi)
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{
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int is_porta = fsi_is_port_a(fsi);
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return is_porta ? master->info->porta_flags :
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master->info->portb_flags;
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}
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static int fsi_is_master_mode(struct fsi_priv *fsi, int is_play)
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{
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u32 mode;
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u32 flags = fsi_get_info_flags(fsi);
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mode = is_play ? SH_FSI_OUT_SLAVE_MODE : SH_FSI_IN_SLAVE_MODE;
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/* return
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* 1 : master mode
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* 0 : slave mode
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*/
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return (mode & flags) != mode;
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}
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static u32 fsi_port_ab_io_bit(struct fsi_priv *fsi, int is_play)
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{
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int is_porta = fsi_is_port_a(fsi);
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u32 data;
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if (is_porta)
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data = is_play ? (1 << 0) : (1 << 4);
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else
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data = is_play ? (1 << 8) : (1 << 12);
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return data;
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}
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static void fsi_stream_push(struct fsi_priv *fsi,
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struct snd_pcm_substream *substream,
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u32 buffer_len,
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u32 period_len)
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{
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fsi->substream = substream;
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fsi->buffer_len = buffer_len;
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fsi->period_len = period_len;
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fsi->byte_offset = 0;
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fsi->periods = 0;
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}
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static void fsi_stream_pop(struct fsi_priv *fsi)
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{
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fsi->substream = NULL;
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fsi->buffer_len = 0;
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fsi->period_len = 0;
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fsi->byte_offset = 0;
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fsi->periods = 0;
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}
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static int fsi_get_fifo_residue(struct fsi_priv *fsi, int is_play)
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{
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u32 status;
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u32 reg = is_play ? DOFF_ST : DIFF_ST;
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int residue;
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status = fsi_reg_read(fsi, reg);
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residue = 0x1ff & (status >> 8);
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residue *= fsi->chan;
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return residue;
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}
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/************************************************************************
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ctrl function
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************************************************************************/
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static void fsi_irq_enable(struct fsi_priv *fsi, int is_play)
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{
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u32 data = fsi_port_ab_io_bit(fsi, is_play);
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fsi_master_mask_set(IMSK, data, data);
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fsi_master_mask_set(IEMSK, data, data);
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}
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static void fsi_irq_disable(struct fsi_priv *fsi, int is_play)
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{
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u32 data = fsi_port_ab_io_bit(fsi, is_play);
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fsi_master_mask_set(IMSK, data, 0);
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fsi_master_mask_set(IEMSK, data, 0);
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}
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static void fsi_clk_ctrl(struct fsi_priv *fsi, int enable)
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{
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u32 val = fsi_is_port_a(fsi) ? (1 << 0) : (1 << 4);
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if (enable)
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fsi_master_mask_set(CLK_RST, val, val);
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else
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fsi_master_mask_set(CLK_RST, val, 0);
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}
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static void fsi_irq_init(struct fsi_priv *fsi, int is_play)
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{
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u32 data;
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u32 ctrl;
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data = fsi_port_ab_io_bit(fsi, is_play);
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ctrl = is_play ? DOFF_CTL : DIFF_CTL;
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/* set IMSK */
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fsi_irq_disable(fsi, is_play);
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/* set interrupt generation factor */
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fsi_reg_write(fsi, ctrl, IRQ_HALF);
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/* clear FIFO */
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fsi_reg_mask_set(fsi, ctrl, FIFO_CLR, FIFO_CLR);
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/* clear interrupt factor */
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fsi_master_mask_set(INT_ST, data, 0);
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}
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static void fsi_soft_all_reset(void)
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{
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u32 status = fsi_master_read(SOFT_RST);
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/* port AB reset */
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status &= 0x000000ff;
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fsi_master_write(SOFT_RST, status);
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mdelay(10);
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/* soft reset */
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status &= 0x000000f0;
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fsi_master_write(SOFT_RST, status);
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status |= 0x00000001;
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fsi_master_write(SOFT_RST, status);
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mdelay(10);
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}
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/* playback interrupt */
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static int fsi_data_push(struct fsi_priv *fsi)
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{
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struct snd_pcm_runtime *runtime;
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struct snd_pcm_substream *substream = NULL;
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int send;
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int fifo_free;
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int width;
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2009-10-30 06:02:39 +03:00
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u8 *start;
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int i;
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2009-08-20 16:01:05 +04:00
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if (!fsi ||
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!fsi->substream ||
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!fsi->substream->runtime)
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return -EINVAL;
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runtime = fsi->substream->runtime;
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/* FSI FIFO has limit.
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* So, this driver can not send periods data at a time
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*/
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if (fsi->byte_offset >=
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|
|
fsi->period_len * (fsi->periods + 1)) {
|
|
|
|
|
|
|
|
substream = fsi->substream;
|
|
|
|
fsi->periods = (fsi->periods + 1) % runtime->periods;
|
|
|
|
|
|
|
|
if (0 == fsi->periods)
|
|
|
|
fsi->byte_offset = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* get 1 channel data width */
|
|
|
|
width = frames_to_bytes(runtime, 1) / fsi->chan;
|
|
|
|
|
|
|
|
/* get send size for alsa */
|
|
|
|
send = (fsi->buffer_len - fsi->byte_offset) / width;
|
|
|
|
|
|
|
|
/* get FIFO free size */
|
|
|
|
fifo_free = (fsi->fifo_max * fsi->chan) - fsi_get_fifo_residue(fsi, 1);
|
|
|
|
|
|
|
|
/* size check */
|
|
|
|
if (fifo_free < send)
|
|
|
|
send = fifo_free;
|
|
|
|
|
2009-10-30 06:02:39 +03:00
|
|
|
start = runtime->dma_area;
|
|
|
|
start += fsi->byte_offset;
|
|
|
|
|
|
|
|
switch (width) {
|
|
|
|
case 2:
|
|
|
|
for (i = 0; i < send; i++)
|
|
|
|
fsi_reg_write(fsi, DODT,
|
|
|
|
((u32)*((u16 *)start + i) << 8));
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
for (i = 0; i < send; i++)
|
|
|
|
fsi_reg_write(fsi, DODT, *((u32 *)start + i));
|
|
|
|
break;
|
|
|
|
default:
|
2009-08-20 16:01:05 +04:00
|
|
|
return -EINVAL;
|
2009-10-30 06:02:39 +03:00
|
|
|
}
|
2009-08-20 16:01:05 +04:00
|
|
|
|
|
|
|
fsi->byte_offset += send * width;
|
|
|
|
|
|
|
|
fsi_irq_enable(fsi, 1);
|
|
|
|
|
|
|
|
if (substream)
|
|
|
|
snd_pcm_period_elapsed(substream);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static irqreturn_t fsi_interrupt(int irq, void *data)
|
|
|
|
{
|
|
|
|
u32 status = fsi_master_read(SOFT_RST) & ~0x00000010;
|
|
|
|
u32 int_st = fsi_master_read(INT_ST);
|
|
|
|
|
|
|
|
/* clear irq status */
|
|
|
|
fsi_master_write(SOFT_RST, status);
|
|
|
|
fsi_master_write(SOFT_RST, status | 0x00000010);
|
|
|
|
|
|
|
|
if (int_st & INT_A_OUT)
|
|
|
|
fsi_data_push(&master->fsia);
|
|
|
|
if (int_st & INT_B_OUT)
|
|
|
|
fsi_data_push(&master->fsib);
|
|
|
|
|
|
|
|
fsi_master_write(INT_ST, 0x0000000);
|
|
|
|
|
|
|
|
return IRQ_HANDLED;
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************
|
|
|
|
|
|
|
|
|
|
|
|
dai ops
|
|
|
|
|
|
|
|
|
|
|
|
************************************************************************/
|
|
|
|
static int fsi_dai_startup(struct snd_pcm_substream *substream,
|
|
|
|
struct snd_soc_dai *dai)
|
|
|
|
{
|
|
|
|
struct fsi_priv *fsi = fsi_get(substream);
|
|
|
|
const char *msg;
|
|
|
|
u32 flags = fsi_get_info_flags(fsi);
|
|
|
|
u32 fmt;
|
|
|
|
u32 reg;
|
|
|
|
u32 data;
|
|
|
|
int is_play = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK);
|
|
|
|
int is_master;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
clk_enable(master->clk);
|
|
|
|
|
|
|
|
/* CKG1 */
|
|
|
|
data = is_play ? (1 << 0) : (1 << 4);
|
|
|
|
is_master = fsi_is_master_mode(fsi, is_play);
|
|
|
|
if (is_master)
|
|
|
|
fsi_reg_mask_set(fsi, CKG1, data, data);
|
|
|
|
else
|
|
|
|
fsi_reg_mask_set(fsi, CKG1, data, 0);
|
|
|
|
|
|
|
|
/* clock inversion (CKG2) */
|
|
|
|
data = 0;
|
|
|
|
switch (SH_FSI_INVERSION_MASK & flags) {
|
|
|
|
case SH_FSI_LRM_INV:
|
|
|
|
data = 1 << 12;
|
|
|
|
break;
|
|
|
|
case SH_FSI_BRM_INV:
|
|
|
|
data = 1 << 8;
|
|
|
|
break;
|
|
|
|
case SH_FSI_LRS_INV:
|
|
|
|
data = 1 << 4;
|
|
|
|
break;
|
|
|
|
case SH_FSI_BRS_INV:
|
|
|
|
data = 1 << 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
fsi_reg_write(fsi, CKG2, data);
|
|
|
|
|
|
|
|
/* do fmt, di fmt */
|
|
|
|
data = 0;
|
|
|
|
reg = is_play ? DO_FMT : DI_FMT;
|
|
|
|
fmt = is_play ? SH_FSI_GET_OFMT(flags) : SH_FSI_GET_IFMT(flags);
|
|
|
|
switch (fmt) {
|
|
|
|
case SH_FSI_FMT_MONO:
|
|
|
|
msg = "MONO";
|
|
|
|
data = CR_FMT(CR_MONO);
|
|
|
|
fsi->chan = 1;
|
|
|
|
break;
|
|
|
|
case SH_FSI_FMT_MONO_DELAY:
|
|
|
|
msg = "MONO Delay";
|
|
|
|
data = CR_FMT(CR_MONO_D);
|
|
|
|
fsi->chan = 1;
|
|
|
|
break;
|
|
|
|
case SH_FSI_FMT_PCM:
|
|
|
|
msg = "PCM";
|
|
|
|
data = CR_FMT(CR_PCM);
|
|
|
|
fsi->chan = 2;
|
|
|
|
break;
|
|
|
|
case SH_FSI_FMT_I2S:
|
|
|
|
msg = "I2S";
|
|
|
|
data = CR_FMT(CR_I2S);
|
|
|
|
fsi->chan = 2;
|
|
|
|
break;
|
|
|
|
case SH_FSI_FMT_TDM:
|
|
|
|
msg = "TDM";
|
|
|
|
data = CR_FMT(CR_TDM) | (fsi->chan - 1);
|
|
|
|
fsi->chan = is_play ?
|
|
|
|
SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
|
|
|
|
break;
|
|
|
|
case SH_FSI_FMT_TDM_DELAY:
|
|
|
|
msg = "TDM Delay";
|
|
|
|
data = CR_FMT(CR_TDM_D) | (fsi->chan - 1);
|
|
|
|
fsi->chan = is_play ?
|
|
|
|
SH_FSI_GET_CH_O(flags) : SH_FSI_GET_CH_I(flags);
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(dai->dev, "unknown format.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (fsi->chan) {
|
|
|
|
case 1:
|
|
|
|
fsi->fifo_max = 256;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
fsi->fifo_max = 128;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
case 4:
|
|
|
|
fsi->fifo_max = 64;
|
|
|
|
break;
|
|
|
|
case 5:
|
|
|
|
case 6:
|
|
|
|
case 7:
|
|
|
|
case 8:
|
|
|
|
fsi->fifo_max = 32;
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
dev_err(dai->dev, "channel size error.\n");
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
fsi_reg_write(fsi, reg, data);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* clear clk reset if master mode
|
|
|
|
*/
|
|
|
|
if (is_master)
|
|
|
|
fsi_clk_ctrl(fsi, 1);
|
|
|
|
|
|
|
|
/* irq setting */
|
|
|
|
fsi_irq_init(fsi, is_play);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
|
|
|
|
struct snd_soc_dai *dai)
|
|
|
|
{
|
|
|
|
struct fsi_priv *fsi = fsi_get(substream);
|
|
|
|
int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
|
|
|
|
|
|
|
|
fsi_irq_disable(fsi, is_play);
|
|
|
|
fsi_clk_ctrl(fsi, 0);
|
|
|
|
|
|
|
|
clk_disable(master->clk);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
|
|
|
|
struct snd_soc_dai *dai)
|
|
|
|
{
|
|
|
|
struct fsi_priv *fsi = fsi_get(substream);
|
|
|
|
struct snd_pcm_runtime *runtime = substream->runtime;
|
|
|
|
int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
/* capture not supported */
|
|
|
|
if (!is_play)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
switch (cmd) {
|
|
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
|
|
fsi_stream_push(fsi, substream,
|
|
|
|
frames_to_bytes(runtime, runtime->buffer_size),
|
|
|
|
frames_to_bytes(runtime, runtime->period_size));
|
|
|
|
ret = fsi_data_push(fsi);
|
|
|
|
break;
|
|
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
|
|
fsi_irq_disable(fsi, is_play);
|
|
|
|
fsi_stream_pop(fsi);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct snd_soc_dai_ops fsi_dai_ops = {
|
|
|
|
.startup = fsi_dai_startup,
|
|
|
|
.shutdown = fsi_dai_shutdown,
|
|
|
|
.trigger = fsi_dai_trigger,
|
|
|
|
};
|
|
|
|
|
|
|
|
/************************************************************************
|
|
|
|
|
|
|
|
|
|
|
|
pcm ops
|
|
|
|
|
|
|
|
|
|
|
|
************************************************************************/
|
|
|
|
static struct snd_pcm_hardware fsi_pcm_hardware = {
|
|
|
|
.info = SNDRV_PCM_INFO_INTERLEAVED |
|
|
|
|
SNDRV_PCM_INFO_MMAP |
|
|
|
|
SNDRV_PCM_INFO_MMAP_VALID |
|
|
|
|
SNDRV_PCM_INFO_PAUSE,
|
|
|
|
.formats = FSI_FMTS,
|
|
|
|
.rates = FSI_RATES,
|
|
|
|
.rate_min = 8000,
|
|
|
|
.rate_max = 192000,
|
|
|
|
.channels_min = 1,
|
|
|
|
.channels_max = 2,
|
|
|
|
.buffer_bytes_max = 64 * 1024,
|
|
|
|
.period_bytes_min = 32,
|
|
|
|
.period_bytes_max = 8192,
|
|
|
|
.periods_min = 1,
|
|
|
|
.periods_max = 32,
|
|
|
|
.fifo_size = 256,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int fsi_pcm_open(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
struct snd_pcm_runtime *runtime = substream->runtime;
|
|
|
|
int ret = 0;
|
|
|
|
|
|
|
|
snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
|
|
|
|
|
|
|
|
ret = snd_pcm_hw_constraint_integer(runtime,
|
|
|
|
SNDRV_PCM_HW_PARAM_PERIODS);
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fsi_hw_params(struct snd_pcm_substream *substream,
|
|
|
|
struct snd_pcm_hw_params *hw_params)
|
|
|
|
{
|
|
|
|
return snd_pcm_lib_malloc_pages(substream,
|
|
|
|
params_buffer_bytes(hw_params));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fsi_hw_free(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
return snd_pcm_lib_free_pages(substream);
|
|
|
|
}
|
|
|
|
|
|
|
|
static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
|
|
|
|
{
|
|
|
|
struct snd_pcm_runtime *runtime = substream->runtime;
|
|
|
|
struct fsi_priv *fsi = fsi_get(substream);
|
|
|
|
long location;
|
|
|
|
|
2009-10-30 06:02:39 +03:00
|
|
|
location = (fsi->byte_offset - 1);
|
2009-08-20 16:01:05 +04:00
|
|
|
if (location < 0)
|
|
|
|
location = 0;
|
|
|
|
|
|
|
|
return bytes_to_frames(runtime, location);
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct snd_pcm_ops fsi_pcm_ops = {
|
|
|
|
.open = fsi_pcm_open,
|
|
|
|
.ioctl = snd_pcm_lib_ioctl,
|
|
|
|
.hw_params = fsi_hw_params,
|
|
|
|
.hw_free = fsi_hw_free,
|
|
|
|
.pointer = fsi_pointer,
|
|
|
|
};
|
|
|
|
|
|
|
|
/************************************************************************
|
|
|
|
|
|
|
|
|
|
|
|
snd_soc_platform
|
|
|
|
|
|
|
|
|
|
|
|
************************************************************************/
|
|
|
|
#define PREALLOC_BUFFER (32 * 1024)
|
|
|
|
#define PREALLOC_BUFFER_MAX (32 * 1024)
|
|
|
|
|
|
|
|
static void fsi_pcm_free(struct snd_pcm *pcm)
|
|
|
|
{
|
|
|
|
snd_pcm_lib_preallocate_free_for_all(pcm);
|
|
|
|
}
|
|
|
|
|
|
|
|
static int fsi_pcm_new(struct snd_card *card,
|
|
|
|
struct snd_soc_dai *dai,
|
|
|
|
struct snd_pcm *pcm)
|
|
|
|
{
|
|
|
|
/*
|
|
|
|
* dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
|
|
|
|
* in MMAP mode (i.e. aplay -M)
|
|
|
|
*/
|
|
|
|
return snd_pcm_lib_preallocate_pages_for_all(
|
|
|
|
pcm,
|
|
|
|
SNDRV_DMA_TYPE_CONTINUOUS,
|
|
|
|
snd_dma_continuous_data(GFP_KERNEL),
|
|
|
|
PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
|
|
|
|
}
|
|
|
|
|
|
|
|
/************************************************************************
|
|
|
|
|
|
|
|
|
|
|
|
alsa struct
|
|
|
|
|
|
|
|
|
|
|
|
************************************************************************/
|
|
|
|
struct snd_soc_dai fsi_soc_dai[] = {
|
|
|
|
{
|
|
|
|
.name = "FSIA",
|
|
|
|
.id = 0,
|
|
|
|
.playback = {
|
|
|
|
.rates = FSI_RATES,
|
|
|
|
.formats = FSI_FMTS,
|
|
|
|
.channels_min = 1,
|
|
|
|
.channels_max = 8,
|
|
|
|
},
|
|
|
|
/* capture not supported */
|
|
|
|
.ops = &fsi_dai_ops,
|
|
|
|
},
|
|
|
|
{
|
|
|
|
.name = "FSIB",
|
|
|
|
.id = 1,
|
|
|
|
.playback = {
|
|
|
|
.rates = FSI_RATES,
|
|
|
|
.formats = FSI_FMTS,
|
|
|
|
.channels_min = 1,
|
|
|
|
.channels_max = 8,
|
|
|
|
},
|
|
|
|
/* capture not supported */
|
|
|
|
.ops = &fsi_dai_ops,
|
|
|
|
},
|
|
|
|
};
|
|
|
|
EXPORT_SYMBOL_GPL(fsi_soc_dai);
|
|
|
|
|
|
|
|
struct snd_soc_platform fsi_soc_platform = {
|
|
|
|
.name = "fsi-pcm",
|
|
|
|
.pcm_ops = &fsi_pcm_ops,
|
|
|
|
.pcm_new = fsi_pcm_new,
|
|
|
|
.pcm_free = fsi_pcm_free,
|
|
|
|
};
|
|
|
|
EXPORT_SYMBOL_GPL(fsi_soc_platform);
|
|
|
|
|
|
|
|
/************************************************************************
|
|
|
|
|
|
|
|
|
|
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platform function
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************************************************************************/
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static int fsi_probe(struct platform_device *pdev)
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{
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struct resource *res;
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char clk_name[8];
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unsigned int irq;
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int ret;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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irq = platform_get_irq(pdev, 0);
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if (!res || !irq) {
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dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
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ret = -ENODEV;
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goto exit;
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}
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master = kzalloc(sizeof(*master), GFP_KERNEL);
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if (!master) {
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dev_err(&pdev->dev, "Could not allocate master\n");
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ret = -ENOMEM;
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goto exit;
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}
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master->base = ioremap_nocache(res->start, resource_size(res));
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if (!master->base) {
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ret = -ENXIO;
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dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
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goto exit_kfree;
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}
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master->irq = irq;
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master->info = pdev->dev.platform_data;
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master->fsia.base = master->base;
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master->fsib.base = master->base + 0x40;
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/* FSI is based on SPU mstp */
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snprintf(clk_name, sizeof(clk_name), "spu%d", pdev->id);
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master->clk = clk_get(NULL, clk_name);
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if (IS_ERR(master->clk)) {
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dev_err(&pdev->dev, "cannot get %s mstp\n", clk_name);
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ret = -EIO;
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2009-10-30 06:02:39 +03:00
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goto exit_iounmap;
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2009-08-20 16:01:05 +04:00
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}
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fsi_soc_dai[0].dev = &pdev->dev;
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fsi_soc_dai[1].dev = &pdev->dev;
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fsi_soft_all_reset();
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ret = request_irq(irq, &fsi_interrupt, IRQF_DISABLED, "fsi", master);
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if (ret) {
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dev_err(&pdev->dev, "irq request err\n");
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2009-10-30 06:02:39 +03:00
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goto exit_iounmap;
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2009-08-20 16:01:05 +04:00
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}
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ret = snd_soc_register_platform(&fsi_soc_platform);
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if (ret < 0) {
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dev_err(&pdev->dev, "cannot snd soc register\n");
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goto exit_free_irq;
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}
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return snd_soc_register_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
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exit_free_irq:
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free_irq(irq, master);
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exit_iounmap:
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iounmap(master->base);
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exit_kfree:
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kfree(master);
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master = NULL;
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exit:
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return ret;
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}
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static int fsi_remove(struct platform_device *pdev)
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{
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snd_soc_unregister_dais(fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
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snd_soc_unregister_platform(&fsi_soc_platform);
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clk_put(master->clk);
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free_irq(master->irq, master);
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iounmap(master->base);
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kfree(master);
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master = NULL;
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return 0;
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}
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static struct platform_driver fsi_driver = {
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.driver = {
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.name = "sh_fsi",
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},
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.probe = fsi_probe,
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.remove = fsi_remove,
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};
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static int __init fsi_mobile_init(void)
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{
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return platform_driver_register(&fsi_driver);
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}
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static void __exit fsi_mobile_exit(void)
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{
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platform_driver_unregister(&fsi_driver);
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}
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module_init(fsi_mobile_init);
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module_exit(fsi_mobile_exit);
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MODULE_LICENSE("GPL");
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MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
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MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
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