2005-04-17 02:20:36 +04:00
|
|
|
/*
|
|
|
|
* DEC I/O ASIC interrupts.
|
|
|
|
*
|
|
|
|
* Copyright (c) 2002, 2003 Maciej W. Rozycki
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License
|
|
|
|
* as published by the Free Software Foundation; either version
|
|
|
|
* 2 of the License, or (at your option) any later version.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include <linux/init.h>
|
|
|
|
#include <linux/irq.h>
|
|
|
|
#include <linux/types.h>
|
|
|
|
|
|
|
|
#include <asm/dec/ioasic.h>
|
|
|
|
#include <asm/dec/ioasic_addrs.h>
|
|
|
|
#include <asm/dec/ioasic_ints.h>
|
|
|
|
|
|
|
|
static int ioasic_irq_base;
|
|
|
|
|
2011-03-24 00:08:51 +03:00
|
|
|
static void unmask_ioasic_irq(struct irq_data *d)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
|
|
|
u32 simr;
|
|
|
|
|
|
|
|
simr = ioasic_read(IO_REG_SIMR);
|
2011-03-24 00:08:51 +03:00
|
|
|
simr |= (1 << (d->irq - ioasic_irq_base));
|
2005-04-17 02:20:36 +04:00
|
|
|
ioasic_write(IO_REG_SIMR, simr);
|
|
|
|
}
|
|
|
|
|
2011-03-24 00:08:51 +03:00
|
|
|
static void mask_ioasic_irq(struct irq_data *d)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
|
|
|
u32 simr;
|
|
|
|
|
|
|
|
simr = ioasic_read(IO_REG_SIMR);
|
2011-03-24 00:08:51 +03:00
|
|
|
simr &= ~(1 << (d->irq - ioasic_irq_base));
|
2005-04-17 02:20:36 +04:00
|
|
|
ioasic_write(IO_REG_SIMR, simr);
|
|
|
|
}
|
|
|
|
|
2011-03-24 00:08:51 +03:00
|
|
|
static void ack_ioasic_irq(struct irq_data *d)
|
2005-04-17 02:20:36 +04:00
|
|
|
{
|
2011-03-24 00:08:51 +03:00
|
|
|
mask_ioasic_irq(d);
|
2005-04-17 02:20:36 +04:00
|
|
|
fast_iob();
|
|
|
|
}
|
|
|
|
|
2006-07-02 17:41:42 +04:00
|
|
|
static struct irq_chip ioasic_irq_type = {
|
2007-01-14 18:07:25 +03:00
|
|
|
.name = "IO-ASIC",
|
2011-03-24 00:08:51 +03:00
|
|
|
.irq_ack = ack_ioasic_irq,
|
|
|
|
.irq_mask = mask_ioasic_irq,
|
|
|
|
.irq_mask_ack = ack_ioasic_irq,
|
|
|
|
.irq_unmask = unmask_ioasic_irq,
|
2005-04-17 02:20:36 +04:00
|
|
|
};
|
|
|
|
|
2006-07-02 17:41:42 +04:00
|
|
|
static struct irq_chip ioasic_dma_irq_type = {
|
2007-01-14 18:07:25 +03:00
|
|
|
.name = "IO-ASIC-DMA",
|
2011-03-24 00:08:51 +03:00
|
|
|
.irq_ack = ack_ioasic_irq,
|
|
|
|
.irq_mask = mask_ioasic_irq,
|
|
|
|
.irq_mask_ack = ack_ioasic_irq,
|
|
|
|
.irq_unmask = unmask_ioasic_irq,
|
2005-04-17 02:20:36 +04:00
|
|
|
};
|
|
|
|
|
|
|
|
void __init init_ioasic_irqs(int base)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
/* Mask interrupts. */
|
|
|
|
ioasic_write(IO_REG_SIMR, 0);
|
|
|
|
fast_iob();
|
|
|
|
|
2006-11-01 20:08:36 +03:00
|
|
|
for (i = base; i < base + IO_INR_DMA; i++)
|
2011-03-27 17:19:28 +04:00
|
|
|
irq_set_chip_and_handler(i, &ioasic_irq_type,
|
2006-11-13 19:13:18 +03:00
|
|
|
handle_level_irq);
|
2006-11-01 20:08:36 +03:00
|
|
|
for (; i < base + IO_IRQ_LINES; i++)
|
2011-03-27 17:19:28 +04:00
|
|
|
irq_set_chip(i, &ioasic_dma_irq_type);
|
2005-04-17 02:20:36 +04:00
|
|
|
|
|
|
|
ioasic_irq_base = base;
|
|
|
|
}
|