2017-06-06 13:22:51 +03:00
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// SPDX-License-Identifier: GPL-2.0
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/*
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* System Control and Management Interface (SCMI) Performance Protocol
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*
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* Copyright (C) 2018 ARM Ltd.
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*/
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_opp.h>
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#include <linux/sort.h>
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#include "common.h"
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enum scmi_performance_protocol_cmd {
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PERF_DOMAIN_ATTRIBUTES = 0x3,
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PERF_DESCRIBE_LEVELS = 0x4,
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PERF_LIMITS_SET = 0x5,
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PERF_LIMITS_GET = 0x6,
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PERF_LEVEL_SET = 0x7,
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PERF_LEVEL_GET = 0x8,
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PERF_NOTIFY_LIMITS = 0x9,
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PERF_NOTIFY_LEVEL = 0xa,
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};
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struct scmi_opp {
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u32 perf;
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u32 power;
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u32 trans_latency_us;
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};
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struct scmi_msg_resp_perf_attributes {
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__le16 num_domains;
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__le16 flags;
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#define POWER_SCALE_IN_MILLIWATT(x) ((x) & BIT(0))
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__le32 stats_addr_low;
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__le32 stats_addr_high;
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__le32 stats_size;
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};
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struct scmi_msg_resp_perf_domain_attributes {
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__le32 flags;
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#define SUPPORTS_SET_LIMITS(x) ((x) & BIT(31))
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#define SUPPORTS_SET_PERF_LVL(x) ((x) & BIT(30))
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#define SUPPORTS_PERF_LIMIT_NOTIFY(x) ((x) & BIT(29))
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#define SUPPORTS_PERF_LEVEL_NOTIFY(x) ((x) & BIT(28))
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__le32 rate_limit_us;
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__le32 sustained_freq_khz;
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__le32 sustained_perf_level;
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u8 name[SCMI_MAX_STR_SIZE];
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};
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struct scmi_msg_perf_describe_levels {
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__le32 domain;
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__le32 level_index;
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};
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struct scmi_perf_set_limits {
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__le32 domain;
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__le32 max_level;
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__le32 min_level;
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};
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struct scmi_perf_get_limits {
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__le32 max_level;
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__le32 min_level;
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};
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struct scmi_perf_set_level {
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__le32 domain;
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__le32 level;
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};
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struct scmi_perf_notify_level_or_limits {
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__le32 domain;
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__le32 notify_enable;
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};
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struct scmi_msg_resp_perf_describe_levels {
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__le16 num_returned;
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__le16 num_remaining;
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struct {
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__le32 perf_val;
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__le32 power;
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__le16 transition_latency_us;
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__le16 reserved;
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} opp[0];
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};
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struct perf_dom_info {
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bool set_limits;
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bool set_perf;
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bool perf_limit_notify;
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bool perf_level_notify;
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u32 opp_count;
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u32 sustained_freq_khz;
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u32 sustained_perf_level;
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u32 mult_factor;
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char name[SCMI_MAX_STR_SIZE];
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struct scmi_opp opp[MAX_OPPS];
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};
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struct scmi_perf_info {
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int num_domains;
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bool power_scale_mw;
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u64 stats_addr;
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u32 stats_size;
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struct perf_dom_info *dom_info;
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};
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static int scmi_perf_attributes_get(const struct scmi_handle *handle,
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struct scmi_perf_info *pi)
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{
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int ret;
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struct scmi_xfer *t;
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struct scmi_msg_resp_perf_attributes *attr;
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2018-05-09 19:52:06 +03:00
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ret = scmi_xfer_get_init(handle, PROTOCOL_ATTRIBUTES,
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2017-06-06 13:22:51 +03:00
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SCMI_PROTOCOL_PERF, 0, sizeof(*attr), &t);
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if (ret)
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return ret;
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attr = t->rx.buf;
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ret = scmi_do_xfer(handle, t);
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if (!ret) {
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u16 flags = le16_to_cpu(attr->flags);
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pi->num_domains = le16_to_cpu(attr->num_domains);
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pi->power_scale_mw = POWER_SCALE_IN_MILLIWATT(flags);
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pi->stats_addr = le32_to_cpu(attr->stats_addr_low) |
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(u64)le32_to_cpu(attr->stats_addr_high) << 32;
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pi->stats_size = le32_to_cpu(attr->stats_size);
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}
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2018-05-09 19:52:06 +03:00
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scmi_xfer_put(handle, t);
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2017-06-06 13:22:51 +03:00
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return ret;
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}
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static int
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scmi_perf_domain_attributes_get(const struct scmi_handle *handle, u32 domain,
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struct perf_dom_info *dom_info)
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{
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int ret;
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struct scmi_xfer *t;
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struct scmi_msg_resp_perf_domain_attributes *attr;
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2018-05-09 19:52:06 +03:00
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ret = scmi_xfer_get_init(handle, PERF_DOMAIN_ATTRIBUTES,
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2017-06-06 13:22:51 +03:00
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SCMI_PROTOCOL_PERF, sizeof(domain),
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sizeof(*attr), &t);
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if (ret)
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return ret;
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*(__le32 *)t->tx.buf = cpu_to_le32(domain);
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attr = t->rx.buf;
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ret = scmi_do_xfer(handle, t);
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if (!ret) {
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u32 flags = le32_to_cpu(attr->flags);
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dom_info->set_limits = SUPPORTS_SET_LIMITS(flags);
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dom_info->set_perf = SUPPORTS_SET_PERF_LVL(flags);
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dom_info->perf_limit_notify = SUPPORTS_PERF_LIMIT_NOTIFY(flags);
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dom_info->perf_level_notify = SUPPORTS_PERF_LEVEL_NOTIFY(flags);
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dom_info->sustained_freq_khz =
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le32_to_cpu(attr->sustained_freq_khz);
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dom_info->sustained_perf_level =
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le32_to_cpu(attr->sustained_perf_level);
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dom_info->mult_factor = (dom_info->sustained_freq_khz * 1000) /
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dom_info->sustained_perf_level;
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memcpy(dom_info->name, attr->name, SCMI_MAX_STR_SIZE);
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}
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2018-05-09 19:52:06 +03:00
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scmi_xfer_put(handle, t);
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2017-06-06 13:22:51 +03:00
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return ret;
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}
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static int opp_cmp_func(const void *opp1, const void *opp2)
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{
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const struct scmi_opp *t1 = opp1, *t2 = opp2;
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return t1->perf - t2->perf;
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}
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static int
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scmi_perf_describe_levels_get(const struct scmi_handle *handle, u32 domain,
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struct perf_dom_info *perf_dom)
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{
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int ret, cnt;
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u32 tot_opp_cnt = 0;
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u16 num_returned, num_remaining;
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struct scmi_xfer *t;
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struct scmi_opp *opp;
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struct scmi_msg_perf_describe_levels *dom_info;
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struct scmi_msg_resp_perf_describe_levels *level_info;
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2018-05-09 19:52:06 +03:00
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ret = scmi_xfer_get_init(handle, PERF_DESCRIBE_LEVELS,
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2017-06-06 13:22:51 +03:00
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SCMI_PROTOCOL_PERF, sizeof(*dom_info), 0, &t);
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if (ret)
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return ret;
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dom_info = t->tx.buf;
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level_info = t->rx.buf;
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do {
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dom_info->domain = cpu_to_le32(domain);
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/* Set the number of OPPs to be skipped/already read */
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dom_info->level_index = cpu_to_le32(tot_opp_cnt);
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ret = scmi_do_xfer(handle, t);
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if (ret)
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break;
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num_returned = le16_to_cpu(level_info->num_returned);
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num_remaining = le16_to_cpu(level_info->num_remaining);
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if (tot_opp_cnt + num_returned > MAX_OPPS) {
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dev_err(handle->dev, "No. of OPPs exceeded MAX_OPPS");
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break;
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}
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opp = &perf_dom->opp[tot_opp_cnt];
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for (cnt = 0; cnt < num_returned; cnt++, opp++) {
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opp->perf = le32_to_cpu(level_info->opp[cnt].perf_val);
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opp->power = le32_to_cpu(level_info->opp[cnt].power);
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opp->trans_latency_us = le16_to_cpu
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(level_info->opp[cnt].transition_latency_us);
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dev_dbg(handle->dev, "Level %d Power %d Latency %dus\n",
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opp->perf, opp->power, opp->trans_latency_us);
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}
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tot_opp_cnt += num_returned;
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/*
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* check for both returned and remaining to avoid infinite
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* loop due to buggy firmware
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*/
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} while (num_returned && num_remaining);
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perf_dom->opp_count = tot_opp_cnt;
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2018-05-09 19:52:06 +03:00
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scmi_xfer_put(handle, t);
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2017-06-06 13:22:51 +03:00
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sort(perf_dom->opp, tot_opp_cnt, sizeof(*opp), opp_cmp_func, NULL);
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return ret;
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}
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static int scmi_perf_limits_set(const struct scmi_handle *handle, u32 domain,
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u32 max_perf, u32 min_perf)
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{
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int ret;
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struct scmi_xfer *t;
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struct scmi_perf_set_limits *limits;
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2018-05-09 19:52:06 +03:00
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ret = scmi_xfer_get_init(handle, PERF_LIMITS_SET, SCMI_PROTOCOL_PERF,
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2017-06-06 13:22:51 +03:00
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sizeof(*limits), 0, &t);
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if (ret)
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return ret;
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limits = t->tx.buf;
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limits->domain = cpu_to_le32(domain);
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limits->max_level = cpu_to_le32(max_perf);
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limits->min_level = cpu_to_le32(min_perf);
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ret = scmi_do_xfer(handle, t);
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2018-05-09 19:52:06 +03:00
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scmi_xfer_put(handle, t);
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2017-06-06 13:22:51 +03:00
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return ret;
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}
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static int scmi_perf_limits_get(const struct scmi_handle *handle, u32 domain,
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u32 *max_perf, u32 *min_perf)
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{
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int ret;
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struct scmi_xfer *t;
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struct scmi_perf_get_limits *limits;
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2018-05-09 19:52:06 +03:00
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ret = scmi_xfer_get_init(handle, PERF_LIMITS_GET, SCMI_PROTOCOL_PERF,
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2017-06-06 13:22:51 +03:00
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sizeof(__le32), 0, &t);
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if (ret)
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return ret;
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*(__le32 *)t->tx.buf = cpu_to_le32(domain);
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ret = scmi_do_xfer(handle, t);
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if (!ret) {
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limits = t->rx.buf;
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*max_perf = le32_to_cpu(limits->max_level);
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*min_perf = le32_to_cpu(limits->min_level);
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}
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2018-05-09 19:52:06 +03:00
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scmi_xfer_put(handle, t);
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2017-06-06 13:22:51 +03:00
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return ret;
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}
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2017-07-21 13:42:24 +03:00
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static int scmi_perf_level_set(const struct scmi_handle *handle, u32 domain,
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u32 level, bool poll)
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2017-06-06 13:22:51 +03:00
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{
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int ret;
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struct scmi_xfer *t;
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struct scmi_perf_set_level *lvl;
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2018-05-09 19:52:06 +03:00
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ret = scmi_xfer_get_init(handle, PERF_LEVEL_SET, SCMI_PROTOCOL_PERF,
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2017-06-06 13:22:51 +03:00
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sizeof(*lvl), 0, &t);
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if (ret)
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return ret;
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2017-07-21 13:42:24 +03:00
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t->hdr.poll_completion = poll;
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2017-06-06 13:22:51 +03:00
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lvl = t->tx.buf;
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lvl->domain = cpu_to_le32(domain);
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lvl->level = cpu_to_le32(level);
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ret = scmi_do_xfer(handle, t);
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2018-05-09 19:52:06 +03:00
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scmi_xfer_put(handle, t);
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2017-06-06 13:22:51 +03:00
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return ret;
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}
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2017-07-21 13:42:24 +03:00
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static int scmi_perf_level_get(const struct scmi_handle *handle, u32 domain,
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u32 *level, bool poll)
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2017-06-06 13:22:51 +03:00
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{
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int ret;
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struct scmi_xfer *t;
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2018-05-09 19:52:06 +03:00
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ret = scmi_xfer_get_init(handle, PERF_LEVEL_GET, SCMI_PROTOCOL_PERF,
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2017-06-06 13:22:51 +03:00
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sizeof(u32), sizeof(u32), &t);
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if (ret)
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return ret;
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2017-07-21 13:42:24 +03:00
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t->hdr.poll_completion = poll;
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2017-06-06 13:22:51 +03:00
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*(__le32 *)t->tx.buf = cpu_to_le32(domain);
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ret = scmi_do_xfer(handle, t);
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if (!ret)
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*level = le32_to_cpu(*(__le32 *)t->rx.buf);
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2018-05-09 19:52:06 +03:00
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scmi_xfer_put(handle, t);
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2017-06-06 13:22:51 +03:00
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return ret;
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}
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/* Device specific ops */
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static int scmi_dev_domain_id(struct device *dev)
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{
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struct of_phandle_args clkspec;
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|
|
|
|
|
if (of_parse_phandle_with_args(dev->of_node, "clocks", "#clock-cells",
|
|
|
|
0, &clkspec))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
return clkspec.args[0];
|
|
|
|
}
|
|
|
|
|
2018-05-09 19:52:06 +03:00
|
|
|
static int scmi_dvfs_device_opps_add(const struct scmi_handle *handle,
|
|
|
|
struct device *dev)
|
2017-06-06 13:22:51 +03:00
|
|
|
{
|
|
|
|
int idx, ret, domain;
|
|
|
|
unsigned long freq;
|
|
|
|
struct scmi_opp *opp;
|
|
|
|
struct perf_dom_info *dom;
|
|
|
|
struct scmi_perf_info *pi = handle->perf_priv;
|
|
|
|
|
|
|
|
domain = scmi_dev_domain_id(dev);
|
|
|
|
if (domain < 0)
|
|
|
|
return domain;
|
|
|
|
|
|
|
|
dom = pi->dom_info + domain;
|
|
|
|
|
|
|
|
for (opp = dom->opp, idx = 0; idx < dom->opp_count; idx++, opp++) {
|
|
|
|
freq = opp->perf * dom->mult_factor;
|
|
|
|
|
|
|
|
ret = dev_pm_opp_add(dev, freq, 0);
|
|
|
|
if (ret) {
|
|
|
|
dev_warn(dev, "failed to add opp %luHz\n", freq);
|
|
|
|
|
|
|
|
while (idx-- > 0) {
|
|
|
|
freq = (--opp)->perf * dom->mult_factor;
|
|
|
|
dev_pm_opp_remove(dev, freq);
|
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-05-09 19:52:06 +03:00
|
|
|
static int scmi_dvfs_transition_latency_get(const struct scmi_handle *handle,
|
2017-06-06 13:22:51 +03:00
|
|
|
struct device *dev)
|
|
|
|
{
|
|
|
|
struct perf_dom_info *dom;
|
|
|
|
struct scmi_perf_info *pi = handle->perf_priv;
|
|
|
|
int domain = scmi_dev_domain_id(dev);
|
|
|
|
|
|
|
|
if (domain < 0)
|
|
|
|
return domain;
|
|
|
|
|
|
|
|
dom = pi->dom_info + domain;
|
|
|
|
/* uS to nS */
|
|
|
|
return dom->opp[dom->opp_count - 1].trans_latency_us * 1000;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int scmi_dvfs_freq_set(const struct scmi_handle *handle, u32 domain,
|
2017-07-21 13:42:24 +03:00
|
|
|
unsigned long freq, bool poll)
|
2017-06-06 13:22:51 +03:00
|
|
|
{
|
|
|
|
struct scmi_perf_info *pi = handle->perf_priv;
|
|
|
|
struct perf_dom_info *dom = pi->dom_info + domain;
|
|
|
|
|
2017-07-21 13:42:24 +03:00
|
|
|
return scmi_perf_level_set(handle, domain, freq / dom->mult_factor,
|
|
|
|
poll);
|
2017-06-06 13:22:51 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static int scmi_dvfs_freq_get(const struct scmi_handle *handle, u32 domain,
|
2017-07-21 13:42:24 +03:00
|
|
|
unsigned long *freq, bool poll)
|
2017-06-06 13:22:51 +03:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
u32 level;
|
|
|
|
struct scmi_perf_info *pi = handle->perf_priv;
|
|
|
|
struct perf_dom_info *dom = pi->dom_info + domain;
|
|
|
|
|
2017-07-21 13:42:24 +03:00
|
|
|
ret = scmi_perf_level_get(handle, domain, &level, poll);
|
2017-06-06 13:22:51 +03:00
|
|
|
if (!ret)
|
|
|
|
*freq = level * dom->mult_factor;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static struct scmi_perf_ops perf_ops = {
|
|
|
|
.limits_set = scmi_perf_limits_set,
|
|
|
|
.limits_get = scmi_perf_limits_get,
|
|
|
|
.level_set = scmi_perf_level_set,
|
|
|
|
.level_get = scmi_perf_level_get,
|
|
|
|
.device_domain_id = scmi_dev_domain_id,
|
2018-05-09 19:52:06 +03:00
|
|
|
.transition_latency_get = scmi_dvfs_transition_latency_get,
|
|
|
|
.device_opps_add = scmi_dvfs_device_opps_add,
|
2017-06-06 13:22:51 +03:00
|
|
|
.freq_set = scmi_dvfs_freq_set,
|
|
|
|
.freq_get = scmi_dvfs_freq_get,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int scmi_perf_protocol_init(struct scmi_handle *handle)
|
|
|
|
{
|
|
|
|
int domain;
|
|
|
|
u32 version;
|
|
|
|
struct scmi_perf_info *pinfo;
|
|
|
|
|
|
|
|
scmi_version_get(handle, SCMI_PROTOCOL_PERF, &version);
|
|
|
|
|
|
|
|
dev_dbg(handle->dev, "Performance Version %d.%d\n",
|
|
|
|
PROTOCOL_REV_MAJOR(version), PROTOCOL_REV_MINOR(version));
|
|
|
|
|
|
|
|
pinfo = devm_kzalloc(handle->dev, sizeof(*pinfo), GFP_KERNEL);
|
|
|
|
if (!pinfo)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
scmi_perf_attributes_get(handle, pinfo);
|
|
|
|
|
|
|
|
pinfo->dom_info = devm_kcalloc(handle->dev, pinfo->num_domains,
|
|
|
|
sizeof(*pinfo->dom_info), GFP_KERNEL);
|
|
|
|
if (!pinfo->dom_info)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
for (domain = 0; domain < pinfo->num_domains; domain++) {
|
|
|
|
struct perf_dom_info *dom = pinfo->dom_info + domain;
|
|
|
|
|
|
|
|
scmi_perf_domain_attributes_get(handle, domain, dom);
|
|
|
|
scmi_perf_describe_levels_get(handle, domain, dom);
|
|
|
|
}
|
|
|
|
|
|
|
|
handle->perf_ops = &perf_ops;
|
|
|
|
handle->perf_priv = pinfo;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int __init scmi_perf_init(void)
|
|
|
|
{
|
|
|
|
return scmi_protocol_register(SCMI_PROTOCOL_PERF,
|
|
|
|
&scmi_perf_protocol_init);
|
|
|
|
}
|
|
|
|
subsys_initcall(scmi_perf_init);
|